1. 28 Oct, 2020 12 commits
    • Ard Biesheuvel's avatar
      ARM: efistub: replace adrl pseudo-op with adr_l macro invocation · 67e3f828
      Ard Biesheuvel authored
      The ARM 'adrl' pseudo instruction is a bit problematic, as it does not
      exist in Thumb mode, and it is not implemented by Clang either. Since
      the Thumb variant has a slightly bigger range, it is sometimes necessary
      to emit the 'adrl' variant in ARM mode where Thumb mode can use adr just
      fine. However, that still leaves the Clang issue, which does not appear
      to be supporting this any time soon.
      
      So let's switch to the adr_l macro, which works for both ARM and Thumb,
      and has unlimited range.
      Reviewed-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      67e3f828
    • Ard Biesheuvel's avatar
      ARM: p2v: reduce p2v alignment requirement to 2 MiB · 9443076e
      Ard Biesheuvel authored
      The ARM kernel's linear map starts at PAGE_OFFSET, which maps to a
      physical address (PHYS_OFFSET) that is platform specific, and is
      discovered at boot. Since we don't want to slow down translations
      between physical and virtual addresses by keeping the offset in a
      variable in memory, we implement this by patching the code performing
      the translation, and putting the offset between PAGE_OFFSET and the
      start of physical RAM directly into the instruction opcodes.
      
      As we only patch up to 8 bits of offset, yielding 4 GiB >> 8 == 16 MiB
      of granularity, we have to round up PHYS_OFFSET to the next multiple if
      the start of physical RAM is not a multiple of 16 MiB. This wastes some
      physical RAM, since the memory that was skipped will now live below
      PAGE_OFFSET, making it inaccessible to the kernel.
      
      We can improve this by changing the patchable sequences and the patching
      logic to carry more bits of offset: 11 bits gives us 4 GiB >> 11 == 2 MiB
      of granularity, and so we will never waste more than that amount by
      rounding up the physical start of DRAM to the next multiple of 2 MiB.
      (Note that 2 MiB granularity guarantees that the linear mapping can be
      created efficiently, whereas less than 2 MiB may result in the linear
      mapping needing another level of page tables)
      
      This helps Zhen Lei's scenario, where the start of DRAM is known to be
      occupied. It also helps EFI boot, which relies on the firmware's page
      allocator to allocate space for the decompressed kernel as low as
      possible. And if the KASLR patches ever land for 32-bit, it will give
      us 3 more bits of randomization of the placement of the kernel inside
      the linear region.
      
      For the ARM code path, it simply comes down to using two add/sub
      instructions instead of one for the carryless version, and patching
      each of them with the correct immediate depending on the rotation
      field. For the LPAE calculation, which has to deal with a carry, it
      patches the MOVW instruction with up to 12 bits of offset (but we only
      need 11 bits anyway)
      
      For the Thumb2 code path, patching more than 11 bits of displacement
      would be somewhat cumbersome, but the 11 bits we need fit nicely into
      the second word of the u16[2] opcode, so we simply update the immediate
      assignment and the left shift to create an addend of the right magnitude.
      Suggested-by: default avatarZhen Lei <thunder.leizhen@huawei.com>
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      9443076e
    • Ard Biesheuvel's avatar
      ARM: p2v: switch to MOVW for Thumb2 and ARM/LPAE · e8e00f5a
      Ard Biesheuvel authored
      In preparation for reducing the phys-to-virt minimum relative alignment
      from 16 MiB to 2 MiB, switch to patchable sequences involving MOVW
      instructions that can more easily be manipulated to carry a 12-bit
      immediate. Note that the non-LPAE ARM sequence is not updated: MOVW
      may not be supported on non-LPAE platforms, and the sequence itself
      can be updated more easily to apply the 12 bits of displacement.
      
      For Thumb2, which has many more versions of opcodes, switch to a sequence
      that can be patched by the same patching code for both versions. Note
      that the Thumb2 opcodes for MOVW and MVN are unambiguous, and have no
      rotation bits in their immediate fields, so there is no need to use
      placeholder constants in the asm blocks.
      
      While at it, drop the 'volatile' qualifiers from the asm blocks: the
      code does not have any side effects that are invisible to the compiler,
      so it is free to omit these sequences if the outputs are not used.
      Suggested-by: default avatarRussell King <linux@armlinux.org.uk>
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      e8e00f5a
    • Ard Biesheuvel's avatar
      ARM: p2v: simplify __fixup_pv_table() · 0e3db6c9
      Ard Biesheuvel authored
      Declutter the code in __fixup_pv_table() by using the new adr_l/str_l
      macros to take PC relative references to external symbols, and by
      using the value of PHYS_OFFSET passed in r8 to calculate the p2v
      offset.
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      0e3db6c9
    • Ard Biesheuvel's avatar
      ARM: p2v: use relative references in patch site arrays · 2730e8ea
      Ard Biesheuvel authored
      Free up a register in the p2v patching code by switching to relative
      references, which don't require keeping the phys-to-virt displacement
      live in a register.
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      2730e8ea
    • Ard Biesheuvel's avatar
      ARM: p2v: drop redundant 'type' argument from __pv_stub · 0869f3b9
      Ard Biesheuvel authored
      We always pass the same value for 'type' so pull it into the __pv_stub
      macro itself.
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      0869f3b9
    • Ard Biesheuvel's avatar
      ARM: p2v: factor out BE8 handling · 7a94849e
      Ard Biesheuvel authored
      The big and little endian versions of the ARM p2v patching routine only
      differ in the values of the constants, so factor those out into macros
      so that we only have one version of the logic sequence to maintain.
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      7a94849e
    • Ard Biesheuvel's avatar
      ARM: p2v: factor out shared loop processing · 4b16421c
      Ard Biesheuvel authored
      The ARM and Thumb2 versions of the p2v patching loop have some overlap
      at the end of the loop, so factor that out. As numeric labels are not
      required to be unique, and may therefore be ambiguous, use named local
      labels for the start and end of the loop instead.
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      4b16421c
    • Ard Biesheuvel's avatar
      ARM: p2v: move patching code to separate assembler source file · eae78e1a
      Ard Biesheuvel authored
      Move the phys2virt patching code into a separate .S file before doing
      some work on it.
      Suggested-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      eae78e1a
    • Ard Biesheuvel's avatar
      ARM: module: add support for place relative relocations · 22f2d230
      Ard Biesheuvel authored
      When using the new adr_l/ldr_l/str_l macros to refer to external symbols
      from modules, the linker may emit place relative ELF relocations that
      need to be fixed up by the module loader. So add support for these.
      Reviewed-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      22f2d230
    • Ard Biesheuvel's avatar
      ARM: assembler: introduce adr_l, ldr_l and str_l macros · 0b167463
      Ard Biesheuvel authored
      Like arm64, ARM supports position independent code sequences that
      produce symbol references with a greater reach than the ordinary
      adr/ldr instructions. Since on ARM, the adrl pseudo-instruction is
      only supported in ARM mode (and not at all when using Clang), having
      a adr_l macro like we do on arm64 is useful, and increases symmetry
      as well.
      
      Currently, we use open coded instruction sequences involving literals
      and arithmetic operations. Instead, we can use movw/movt pairs on v7
      CPUs, circumventing the D-cache entirely.
      
      E.g., on v7+ CPUs, we can emit a PC-relative reference as follows:
      
             movw         <reg>, #:lower16:<sym> - (1f + 8)
             movt         <reg>, #:upper16:<sym> - (1f + 8)
        1:   add          <reg>, <reg>, pc
      
      For older CPUs, we can emit the literal into a subsection, allowing it
      to be emitted out of line while retaining the ability to perform
      arithmetic on label offsets.
      
      E.g., on pre-v7 CPUs, we can emit a PC-relative reference as follows:
      
             ldr          <reg>, 2f
        1:   add          <reg>, <reg>, pc
             .subsection  1
        2:   .long        <sym> - (1b + 8)
             .previous
      
      This is allowed by the assembler because, unlike ordinary sections,
      subsections are combined into a single section in the object file, and
      so the label references are not true cross-section references that are
      visible as relocations. (Subsections have been available in binutils
      since 2004 at least, so they should not cause any issues with older
      toolchains.)
      
      So use the above to implement the macros mov_l, adr_l, ldr_l and str_l,
      all of which will use movw/movt pairs on v7 and later CPUs, and use
      PC-relative literals otherwise.
      Reviewed-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      0b167463
    • Ard Biesheuvel's avatar
      ARM: p2v: fix handling of LPAE translation in BE mode · 4e79f021
      Ard Biesheuvel authored
      When running in BE mode on LPAE hardware with a PA-to-VA translation
      that exceeds 4 GB, we patch bits 39:32 of the offset into the wrong
      byte of the opcode. So fix that, by rotating the offset in r0 to the
      right by 8 bits, which will put the 8-bit immediate in bits 31:24.
      
      Note that this will also move bit #22 in its correct place when
      applying the rotation to the constant #0x400000.
      
      Fixes: d9a790df ("ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE")
      Acked-by: default avatarNicolas Pitre <nico@fluxnic.net>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
      4e79f021
  2. 25 Oct, 2020 17 commits
  3. 24 Oct, 2020 11 commits
    • Linus Torvalds's avatar
      Merge tag 'block-5.10-2020-10-24' of git://git.kernel.dk/linux-block · d7691390
      Linus Torvalds authored
      Pull block fixes from Jens Axboe:
      
       - NVMe pull request from Christoph
           - rdma error handling fixes (Chao Leng)
           - fc error handling and reconnect fixes (James Smart)
           - fix the qid displace when tracing ioctl command (Keith Busch)
           - don't use BLK_MQ_REQ_NOWAIT for passthru (Chaitanya Kulkarni)
           - fix MTDT for passthru (Logan Gunthorpe)
           - blacklist Write Same on more devices (Kai-Heng Feng)
           - fix an uninitialized work struct (zhenwei pi)"
      
       - lightnvm out-of-bounds fix (Colin)
      
       - SG allocation leak fix (Doug)
      
       - rnbd fixes (Gioh, Guoqing, Jack)
      
       - zone error translation fixes (Keith)
      
       - kerneldoc markup fix (Mauro)
      
       - zram lockdep fix (Peter)
      
       - Kill unused io_context members (Yufen)
      
       - NUMA memory allocation cleanup (Xianting)
      
       - NBD config wakeup fix (Xiubo)
      
      * tag 'block-5.10-2020-10-24' of git://git.kernel.dk/linux-block: (27 commits)
        block: blk-mq: fix a kernel-doc markup
        nvme-fc: shorten reconnect delay if possible for FC
        nvme-fc: wait for queues to freeze before calling update_hr_hw_queues
        nvme-fc: fix error loop in create_hw_io_queues
        nvme-fc: fix io timeout to abort I/O
        null_blk: use zone status for max active/open
        nvmet: don't use BLK_MQ_REQ_NOWAIT for passthru
        nvmet: cleanup nvmet_passthru_map_sg()
        nvmet: limit passthru MTDS by BIO_MAX_PAGES
        nvmet: fix uninitialized work for zero kato
        nvme-pci: disable Write Zeroes on Sandisk Skyhawk
        nvme: use queuedata for nvme_req_qid
        nvme-rdma: fix crash due to incorrect cqe
        nvme-rdma: fix crash when connect rejected
        block: remove unused members for io_context
        blk-mq: remove the calling of local_memory_node()
        zram: Fix __zram_bvec_{read,write}() locking order
        skd_main: remove unused including <linux/version.h>
        sgl_alloc_order: fix memory leak
        lightnvm: fix out-of-bounds write to array devices->info[]
        ...
      d7691390
    • Linus Torvalds's avatar
      Merge tag 'io_uring-5.10-2020-10-24' of git://git.kernel.dk/linux-block · af004187
      Linus Torvalds authored
      Pull io_uring fixes from Jens Axboe:
      
       - fsize was missed in previous unification of work flags
      
       - Few fixes cleaning up the flags unification creds cases (Pavel)
      
       - Fix NUMA affinities for completely unplugged/replugged node for io-wq
      
       - Two fallout fixes from the set_fs changes. One local to io_uring, one
         for the splice entry point that io_uring uses.
      
       - Linked timeout fixes (Pavel)
      
       - Removal of ->flush() ->files work-around that we don't need anymore
         with referenced files (Pavel)
      
       - Various cleanups (Pavel)
      
      * tag 'io_uring-5.10-2020-10-24' of git://git.kernel.dk/linux-block:
        splice: change exported internal do_splice() helper to take kernel offset
        io_uring: make loop_rw_iter() use original user supplied pointers
        io_uring: remove req cancel in ->flush()
        io-wq: re-set NUMA node affinities if CPUs come online
        io_uring: don't reuse linked_timeout
        io_uring: unify fsize with def->work_flags
        io_uring: fix racy REQ_F_LINK_TIMEOUT clearing
        io_uring: do poll's hash_node init in common code
        io_uring: inline io_poll_task_handler()
        io_uring: remove extra ->file check in poll prep
        io_uring: make cached_cq_overflow non atomic_t
        io_uring: inline io_fail_links()
        io_uring: kill ref get/drop in personality init
        io_uring: flags-based creds init in queue
      af004187
    • Linus Torvalds's avatar
      Merge tag 'libata-5.10-2020-10-24' of git://git.kernel.dk/linux-block · cb6b2897
      Linus Torvalds authored
      Pull libata fixes from Jens Axboe:
       "Two minor libata fixes:
      
         - Fix a DMA boundary mask regression for sata_rcar (Geert)
      
         - kerneldoc markup fix (Mauro)"
      
      * tag 'libata-5.10-2020-10-24' of git://git.kernel.dk/linux-block:
        ata: fix some kernel-doc markups
        ata: sata_rcar: Fix DMA boundary mask
      cb6b2897
    • Linus Torvalds's avatar
      Merge branch 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs · 0eac1102
      Linus Torvalds authored
      Pull misc vfs updates from Al Viro:
       "Assorted stuff all over the place (the largest group here is
        Christoph's stat cleanups)"
      
      * 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
        fs: remove KSTAT_QUERY_FLAGS
        fs: remove vfs_stat_set_lookup_flags
        fs: move vfs_fstatat out of line
        fs: implement vfs_stat and vfs_lstat in terms of vfs_fstatat
        fs: remove vfs_statx_fd
        fs: omfs: use kmemdup() rather than kmalloc+memcpy
        [PATCH] reduce boilerplate in fsid handling
        fs: Remove duplicated flag O_NDELAY occurring twice in VALID_OPEN_FLAGS
        selftests: mount: add nosymfollow tests
        Add a "nosymfollow" mount option.
      0eac1102
    • Linus Torvalds's avatar
      Merge tag 'dma-mapping-5.10-1' of git://git.infradead.org/users/hch/dma-mapping · 1b307ac8
      Linus Torvalds authored
      Pull dma-mapping fixes from Christoph Hellwig:
      
       - document the new dma_{alloc,free}_pages() API
      
       - two fixups for the dma-mapping.h split
      
      * tag 'dma-mapping-5.10-1' of git://git.infradead.org/users/hch/dma-mapping:
        dma-mapping: document dma_{alloc,free}_pages
        dma-mapping: move more functions to dma-map-ops.h
        ARM/sa1111: add a missing include of dma-map-ops.h
      1b307ac8
    • Linus Torvalds's avatar
      Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm · 9bf8d8bc
      Linus Torvalds authored
      Pull KVM fixes from Paolo Bonzini:
       "Two fixes for this merge window, and an unrelated bugfix for a host
        hang"
      
      * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
        KVM: ioapic: break infinite recursion on lazy EOI
        KVM: vmx: rename pi_init to avoid conflict with paride
        KVM: x86/mmu: Avoid modulo operator on 64-bit value to fix i386 build
      9bf8d8bc
    • Linus Torvalds's avatar
      Merge tag 'x86_seves_fixes_for_v5.10_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · c51ae124
      Linus Torvalds authored
      Pull x86 SEV-ES fixes from Borislav Petkov:
       "Three fixes to SEV-ES to correct setting up the new early pagetable on
        5-level paging machines, to always map boot_params and the kernel
        cmdline, and disable stack protector for ../compressed/head{32,64}.c.
        (Arvind Sankar)"
      
      * tag 'x86_seves_fixes_for_v5.10_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        x86/boot/64: Explicitly map boot_params and command line
        x86/head/64: Disable stack protection for head$(BITS).o
        x86/boot/64: Initialize 5-level paging variables earlier
      c51ae124
    • Willy Tarreau's avatar
      random32: add a selftest for the prandom32 code · c6e169bc
      Willy Tarreau authored
      Given that this code is new, let's add a selftest for it as well.
      It doesn't rely on fixed sets, instead it picks 1024 numbers and
      verifies that they're not more correlated than desired.
      
      Link: https://lore.kernel.org/netdev/20200808152628.GA27941@SDF.ORG/
      Cc: George Spelvin <lkml@sdf.org>
      Cc: Amit Klein <aksecurity@gmail.com>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: tytso@mit.edu
      Cc: Florian Westphal <fw@strlen.de>
      Cc: Marc Plumb <lkml.mplumb@gmail.com>
      Signed-off-by: default avatarWilly Tarreau <w@1wt.eu>
      c6e169bc
    • Willy Tarreau's avatar
      random32: add noise from network and scheduling activity · 3744741a
      Willy Tarreau authored
      With the removal of the interrupt perturbations in previous random32
      change (random32: make prandom_u32() output unpredictable), the PRNG
      has become 100% deterministic again. While SipHash is expected to be
      way more robust against brute force than the previous Tausworthe LFSR,
      there's still the risk that whoever has even one temporary access to
      the PRNG's internal state is able to predict all subsequent draws till
      the next reseed (roughly every minute). This may happen through a side
      channel attack or any data leak.
      
      This patch restores the spirit of commit f227e3ec ("random32: update
      the net random state on interrupt and activity") in that it will perturb
      the internal PRNG's statee using externally collected noise, except that
      it will not pick that noise from the random pool's bits nor upon
      interrupt, but will rather combine a few elements along the Tx path
      that are collectively hard to predict, such as dev, skb and txq
      pointers, packet length and jiffies values. These ones are combined
      using a single round of SipHash into a single long variable that is
      mixed with the net_rand_state upon each invocation.
      
      The operation was inlined because it produces very small and efficient
      code, typically 3 xor, 2 add and 2 rol. The performance was measured
      to be the same (even very slightly better) than before the switch to
      SipHash; on a 6-core 12-thread Core i7-8700k equipped with a 40G NIC
      (i40e), the connection rate dropped from 556k/s to 555k/s while the
      SYN cookie rate grew from 5.38 Mpps to 5.45 Mpps.
      
      Link: https://lore.kernel.org/netdev/20200808152628.GA27941@SDF.ORG/
      Cc: George Spelvin <lkml@sdf.org>
      Cc: Amit Klein <aksecurity@gmail.com>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: tytso@mit.edu
      Cc: Florian Westphal <fw@strlen.de>
      Cc: Marc Plumb <lkml.mplumb@gmail.com>
      Tested-by: default avatarSedat Dilek <sedat.dilek@gmail.com>
      Signed-off-by: default avatarWilly Tarreau <w@1wt.eu>
      3744741a
    • George Spelvin's avatar
      random32: make prandom_u32() output unpredictable · c51f8f88
      George Spelvin authored
      Non-cryptographic PRNGs may have great statistical properties, but
      are usually trivially predictable to someone who knows the algorithm,
      given a small sample of their output.  An LFSR like prandom_u32() is
      particularly simple, even if the sample is widely scattered bits.
      
      It turns out the network stack uses prandom_u32() for some things like
      random port numbers which it would prefer are *not* trivially predictable.
      Predictability led to a practical DNS spoofing attack.  Oops.
      
      This patch replaces the LFSR with a homebrew cryptographic PRNG based
      on the SipHash round function, which is in turn seeded with 128 bits
      of strong random key.  (The authors of SipHash have *not* been consulted
      about this abuse of their algorithm.)  Speed is prioritized over security;
      attacks are rare, while performance is always wanted.
      
      Replacing all callers of prandom_u32() is the quick fix.
      Whether to reinstate a weaker PRNG for uses which can tolerate it
      is an open question.
      
      Commit f227e3ec ("random32: update the net random state on interrupt
      and activity") was an earlier attempt at a solution.  This patch replaces
      it.
      Reported-by: default avatarAmit Klein <aksecurity@gmail.com>
      Cc: Willy Tarreau <w@1wt.eu>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: "Jason A. Donenfeld" <Jason@zx2c4.com>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: tytso@mit.edu
      Cc: Florian Westphal <fw@strlen.de>
      Cc: Marc Plumb <lkml.mplumb@gmail.com>
      Fixes: f227e3ec ("random32: update the net random state on interrupt and activity")
      Signed-off-by: default avatarGeorge Spelvin <lkml@sdf.org>
      Link: https://lore.kernel.org/netdev/20200808152628.GA27941@SDF.ORG/
      [ willy: partial reversal of f227e3ec; moved SIPROUND definitions
        to prandom.h for later use; merged George's prandom_seed() proposal;
        inlined siprand_u32(); replaced the net_rand_state[] array with 4
        members to fix a build issue; cosmetic cleanups to make checkpatch
        happy; fixed RANDOM32_SELFTEST build ]
      Signed-off-by: default avatarWilly Tarreau <w@1wt.eu>
      c51f8f88
    • Linus Torvalds's avatar
      Merge tag 'powerpc-5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux · b6f96e75
      Linus Torvalds authored
      Pull powerpc fixes from Michael Ellerman:
      
       - A fix for undetected data corruption on Power9 Nimbus <= DD2.1 in the
         emulation of VSX loads. The affected CPUs were not widely available.
      
       - Two fixes for machine check handling in guests under PowerVM.
      
       - A fix for our recent changes to SMP setup, when
         CONFIG_CPUMASK_OFFSTACK=y.
      
       - Three fixes for races in the handling of some of our powernv sysfs
         attributes.
      
       - One change to remove TM from the set of Power10 CPU features.
      
       - A couple of other minor fixes.
      
      Thanks to: Aneesh Kumar K.V, Christophe Leroy, Ganesh Goudar, Jordan
      Niethe, Mahesh Salgaonkar, Michael Neuling, Oliver O'Halloran, Qian Cai,
      Srikar Dronamraju, Vasant Hegde.
      
      * tag 'powerpc-5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
        powerpc/pseries: Avoid using addr_to_pfn in real mode
        powerpc/uaccess: Don't use "m<>" constraint with GCC 4.9
        powerpc/eeh: Fix eeh_dev_check_failure() for PE#0
        powerpc/64s: Remove TM from Power10 features
        selftests/powerpc: Make alignment handler test P9N DD2.1 vector CI load workaround
        powerpc: Fix undetected data corruption with P9N DD2.1 VSX CI load emulation
        powerpc/powernv/dump: Handle multiple writes to ack attribute
        powerpc/powernv/dump: Fix race while processing OPAL dump
        powerpc/smp: Use GFP_ATOMIC while allocating tmp mask
        powerpc/smp: Remove unnecessary variable
        powerpc/mce: Avoid nmi_enter/exit in real mode on pseries hash
        powerpc/opal_elog: Handle multiple writes to ack attribute
      b6f96e75