- 16 May, 2022 3 commits
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Yang Wang authored
the pp_features can't display full feauture information when these mapping is not exiting. Signed-off-by:
Yang Wang <KevinYang.Wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Sathishkumar S authored
support reading smartshift apu and dgpu power for smu11 based asic v2: add new version of SmuMetrics and make calculation more readable (Lijo) v3: avoid calculations that result in -ve values and skip related checks v4: use the current power limit on dGPU and exclude smu 11_0_7 (Lijo) v5: remove redundant code (Lijo) Signed-off-by:
Sathishkumar S <sathishkumar.sundararaju@amd.com> Acked-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Yang Wang authored
- set_pp_feature_mask - get_pp_feature_mask the pp_feature device node isn't working when above callback functions aren't provided. Signed-off-by:
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- 13 May, 2022 1 commit
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Jiapeng Chong authored
Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:35 nbio_v7_7_get_rev_id() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:214 nbio_v7_7_init_registers() warn: inconsistent indenting. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
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- 10 May, 2022 36 commits
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Wan Jiabing authored
Fix following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c:724:4-36: duplicated argument to & or | Remove duplicated UVD_SUVD_CGC_GATE__SRE_H264_MASK. Signed-off-by:
Wan Jiabing <wanjiabing@vivo.com> Signed-off-by:
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Alex Deucher authored
This reverts commit eaa09053. Commit ebc002e3 ("drm/amdgpu: don't use BACO for reset in S3") stops using BACO for reset during suspend, so it's no longer necessary to leave BACO enabled during suspend. This fixes resume from suspend on the navy flounder dGPU in the ASUS ROG Strix G513QY. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2008 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1982Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Philip Yang authored
If page table PDEs is evicted and restored, after updating PDEs, need increase vm->tlb_seq, then amdgpu_vm_flush will flush TLB before command submission. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Aric Cyr authored
This version brings along following fixes: - Refactor LTTPR code - Fix PSR after hibernate - Fix DC build errors - Fix IRQ unregister error when unloading amdgpu - Improve DP link training - Fix stutter - Remove redundant CONFIG_DRM_AMD_DC_DCN guards - Fix 2nd connected USB-C display not lighting up Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Stylon Wang authored
This reverts commit 4b7786d8. Commit 4b7786d8 ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping") is causing 2nd USB-C display not lighting up. Phy id remapping is done differently than is assumed in this patch. Signed-off-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Tested-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN guards for #if-#else clause. Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by:
Alex Hung <alex.hung@amd.com> Tested-by:
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James Zhu authored
Fixed warning: no previous prototype for 'vcn_dec_sw_ring_emit_fence'. v2: regenerate patch after git rebase. v3: update commit message. Signed-off-by:
James Zhu <James.Zhu@amd.com> Reported-by:
kernel test robot <lkp@intel.com> Reviewed-by:
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Danijel Slivka authored
Managing power profiles mode is not allowed in SRIOV mode for Sienna Cichlid. This patch is adjusting the "pp_power_profile_mode" and "power_dpm_force_performance_level" accordingly. Signed-off-by:
Danijel Slivka <danijel.slivka@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in amdgpu_dm directory. Reviewed-by:
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Evan Quan authored
Suppress the following compile warning: In file included from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.c:39: >> drivers/gpu/drm/amd/amdgpu/../pm/inc/smu_v13_0_0_pptable.h:194:39: warning: field overdrive_table within 'struct smu_13_0_0_powerplay_table' is less aligned than 'struct smu_13_0_0_overdrive_table' and is usually due to 'struct smu_13_0_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] Reported-by:
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Mohammad Zafar Ziya authored
Add vcn ras poison consumption event handling V2: Removed default poison consumption handling function cb Signed-off-by:
Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Mohammad Zafar Ziya authored
Add jpeg ras poison event callback and consumption handling V2: Removed the default poison consumption cb handle Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN for enabling z10. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in irq directory. Reviewed-by:
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Tao Zhou authored
Qeury ras status before ras poison consumption handling, add more comment and log. Signed-off-by:
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Tao Zhou authored
Enable RAS IH if poison consumption handler is implemented. Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in gpio directory. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dce directory. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dc and dc/core directories. Reviewed-by:
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Josip Pavic authored
[Why] Waiting for the vlbank every time a global sync update is requested, including during full update flips, results in a stutter. [How] Do not wait for vblank during pipe programming. Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Tested-by:
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Wenjing Liu authored
[Why & How] There is a chance where the RX issues HPD deassert in the middle of link training, this will cause our logic to abort link training and turn off link. However our payload allocation logic needs to use current link settings to determine average time slot per MTP. This will need to use current link bandwidth as divider. This causes divide by zero error occasionally. The fix is to skip DP2.0 payload allocation logic if current link is not in 128b/132b mode. Reviewed-by:
George Shen <George.Shen@amd.com> Acked-by:
Wenjing Liu <wenjing.liu@amd.com> Tested-by:
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Alan Liu authored
[why] Observing error log about trying to disable non-implemented irq source when user unload the driver. [how] Check and filter the invalid irq source before disabling it. Reviewed-by:
Qingqing (Lillian) Zhuo <Qingqing.Zhuo@amd.com> Acked-by:
Alan Liu <HaoPing.Liu@amd.com> Tested-by:
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Josip Pavic authored
[Why & How] Move definition of dc_flip_addrs struct from dc.h to dc_hw_types.h to prevent build errors Reviewed-by:
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Evgenii Krasnikov authored
[WHY] After hibernate system might be using old invalid psr_power_opt and psr_allow_active that never get reset [HOW] Reset cached Panel Self Refresh parameters when PSR is first configured for eDP in dc_link_setup_psr. Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Evgenii Krasnikov <Evgenii.Krasnikov@amd.com> Tested-by:
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Michael Strauss authored
[WHY] Split LTTPR mode selection between platform support and downstream link support Reviewed-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Likun Gao authored
Support memory power gating control for lsdma 6.0.2. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
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Likun Gao authored
Support memory power gating control for LSDMA. Signed-off-by:
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Likun Gao authored
Add LSDMA ip block for LSDMA v6.0.2. Signed-off-by:
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Likun Gao authored
Add LSDMA ip block for LSDMA v6.0.0. Signed-off-by:
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Likun Gao authored
Support constant data filling in PIO mode for LSDMA. Signed-off-by:
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Likun Gao authored
Support memory to memory linear copy in PIO mode for LSDMA. Signed-off-by:
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Likun Gao authored
Add Light SDMA (LSDMA) block and related function. LSDMA is a small instance of SDMA mainly for kernel driver use. Signed-off-by:
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Hawking Zhang authored
Add lsdma v6_0_0 register offset and shift masks header files v2: squash in updates (Alex) Signed-off-by:
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Dan Carpenter authored
Add a missing amdgpu_bo_unreserve(ring->mqd_obj) to an error path in gfx_v11_0_kiq_resume(). Fixes: 3d879e81 ("drm/amdgpu: add init support for GFX11 (v2)") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Alex Deucher authored
To avoid a warning on 32 bit. Reported-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Alex Deucher authored
It's not used outside of the this file. Reviewed-by:
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