sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3
add the vcc3v3_sd_s0 regulator, and control it with gpio4_a5
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20240102024054.1030313-1-inindev@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

An earlier commit defined an alias for all SPI controllers found on the
RK3399, so there's no need to duplicate the aliases in helios64's device
tree.

Cc: Quentin Schulz <foss+kernel@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-2-2009e44e734a@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

There are 6 SPI controllers on RK3399 and they are all numbered in the
TRM, so let's add the appropriate aliases to the main DTSI so that any
RK3399-based board doesn't need to define the aliases themselves to
benefit from stable SPI indices in userspace.

Cc: Quentin Schulz <foss+kernel@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-1-2009e44e734a@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

NanoPi R6C is mostly same as R6S variant. It has M2 port instead of a
NIC port and different led labeling.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Link: https://lore.kernel.org/r/0f9ee0baa6c9de4d54dd6d13957ca15a63ec934f.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add basic NanoPi R6S support that comes with USB2, PCIe, SD card, eMMC
support.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Link: https://lore.kernel.org/r/6db3b653efc6f0a2dca8e96fdd0503906db72fb6.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add support for NanoPi R6 series boards that based on RK3588S.

NanoPi R6S basically has:
- USB3
- USB2
- eMMC
- 2x 2.5GBe & 1x 1GBe ethernet
- HDMI
- SD card support

Unlike R6S variant, NanoPi R6C has PCIe M.2 M-key instead of 1x 2.5GBe.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/30c1c7eac02cd32b76edb77572523f6ad8de89fb.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX
Technology Limited XT25F32) with a maximum clock frequency of 108 MHz.
Use this value for the device node's spi-max-frequency property.

This patch has been tested on ROCK Pi 4A.
Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231217113208.64056-1-stefan.nagy@ixypsilon.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is
active low.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add missing cache information to the Rockchip RK3399 SoC dtsi.  The specified
values were derived by hand from the cache size specifications available from
the RK3399 datasheet;  for future reference, here's a brief summary:

  - Each Cortex-A72 core has 48 KB of L1 instruction cache and
    32 KB of L1 data cache available, four-way set associative
  - Each Cortex-A53 core core has 32 KB of instruction cache and
    32 KB of L1 data cache available, four-way set associative
  - The big (A72) cluster has 1 MB of unified L2 cache available
  - The little (A53) cluster has 512 KB of unified L2 cache available

This patch allows /proc/cpuinfo and lscpu(1) to display proper RK3399 cache
information, and it eliminates the following error in the kernel log:

  cacheinfo: Unable to detect cache hierarchy for CPU 0

While there, add a couple of somewhat useful comments, which may help a bit
anyone going through the RK3399 SoC dtsi.
Co-developed-by: Kyle Copperfield <kmcopper@danwin1210.me>
Signed-off-by: Kyle Copperfield <kmcopper@danwin1210.me>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/be3cbcae5c40fa72a52845d30dcc66c847a98cfa.1702616304.git.dsimic@manjaro.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

By default the GPIO pin that connects to the WiFi enable signal
inside the M.2 Key E slot is driven low, resulting in impossibility
to connect to any network. Add a DT node to expose it as an RFKILL
device, which lets the WiFi driver or userspace toggle it as
required.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20240106202650.22310-1-alchark@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE
modem. This slot has no PCIe functionality, only USB 2.0 pins are wired
to the SoC, and USIM pins are wired to a SIM card slot on the board.
Define the 3.3v supply for the slot so it can be used.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A, NCM6B SoM has Green LED on the module.

Enable them with heartbeat function.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-11-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has 2 port USB2.0 Host and USB2.0 on E-Key.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-10-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has M.2 B-Key, E-Key via PCI3x2.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-9-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has M.2 M-Key via PCI3x4.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-8-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has 2.5Gbps Ethernet via PCI2_0.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-7-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The RK8602 and RK8603 voltage regulators on the Rock 5B board provide
the power lines vdd_cpu_big0 and vdd_cpu_big1, respectively.

Add the necessary device tree nodes and bind them to the corresponding
CPU big core nodes.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-6-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A SOM has on-module M.2 1216-compatible WiFi modules.

Currently, AW-XM548NF WiFi6 and Intel 8260D2W WiFi5 modules are supported.

WiFi modules are fixed on SoM, not pluggable M.2 slots, so different SoM's
for each type of WiFi module.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-5-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble Neu6a and Neu6b are compatible with common IO board.

So, maintain the IO board in rk3588-edgeble-neu6a-io.dtsi.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-4-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO is common compatible IO board for both NCM6A
and NCM6B. Add a common io DTSI for it to include them in both
NCM6A and NCM6B DTS files.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-3-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The 'regulator-init-microvolt' property is not currently supported by
any driver, it was simply carried on from downstream kernels.

rk3588-edgeble-neu6b-io.dtb: pmic@0: regulators:dcdc-reg4: Unevaluated properties are not allowed ('regulator-init-microvolt' was unexpected)

Remove the invalid property.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-2-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Two pmuio domains on ringneck are not defined:
	1- PMUIO1: supplied by vcc_3v3 regulator(PMIC RK809)
	2- PMUIO2: supplied by vcc_3v3 regulator(PMIC RK809)

The reason why no functional effect was observed is because of that
the above mentionned PMUIO domains were supplied by a regulator
which is always on.

So let's add their definition in the dtsi.
Signed-off-by: Iskander Amara <iskander.amara@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240103164734.1151290-1-iskander.amara@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add support for the Anbernic RG-ARC S and RG-ARC D devices. These
devices feature the following:
 - Rockchip RK3566 SoC
 - 4 inch 480x640 display (rotated)
 - Goodix multi-touch (ARC D only, untested as I lack the device)
 - 1GB (ARC S) or 2GB (ARC D) of RAM
 - 2 SDMMC slots
 - eMMC (ARC D only)
 - Realtek 8821CS WiFi/Bluetooth
 - External stereo speakers
 - 6 face buttons (A, B, C, X, Y, Z) along with a D-Pad and start and
   select buttons.
 - A PWM vibrator.

Note that the Goodix touchscreen on I2C2 is not defined, as I lack
the necessary hardware to confirm it works correctly with the mainline
driver.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20240123212111.202146-5-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the Anbernic RG-Arc S and RG-Arc D devices, and consolidate
all Anbernic RK3566 based devices under a single description.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240123212111.202146-3-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Move device specific properties related to the ADC Joystick to
different board specific device trees. This is in preparation for
adding the Anbernic RG-Arc series of devices.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20240123212111.202146-2-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Pull more bcachefs updates from Kent Overstreet:
 "Some fixes, Some refactoring, some minor features:

   - Assorted prep work for disk space accounting rewrite

   - BTREE_TRIGGER_ATOMIC: after combining our trigger callbacks, this
     makes our trigger context more explicit

   - A few fixes to avoid excessive transaction restarts on
     multithreaded workloads: fstests (in addition to ktest tests) are
     now checking slowpath counters, and that's shaking out a few bugs

   - Assorted tracepoint improvements

   - Starting to break up bcachefs_format.h and move on disk types so
     they're with the code they belong to; this will make room to start
     documenting the on disk format better.

   - A few minor fixes"

* tag 'bcachefs-2024-01-21' of https://evilpiepirate.org/git/bcachefs: (46 commits)
  bcachefs: Improve inode_to_text()
  bcachefs: logged_ops_format.h
  bcachefs: reflink_format.h
  bcachefs; extents_format.h
  bcachefs: ec_format.h
  bcachefs: subvolume_format.h
  bcachefs: snapshot_format.h
  bcachefs: alloc_background_format.h
  bcachefs: xattr_format.h
  bcachefs: dirent_format.h
  bcachefs: inode_format.h
  bcachefs; quota_format.h
  bcachefs: sb-counters_format.h
  bcachefs: counters.c -> sb-counters.c
  bcachefs: comment bch_subvolume
  bcachefs: bch_snapshot::btime
  bcachefs: add missing __GFP_NOWARN
  bcachefs: opts->compression can now also be applied in the background
  bcachefs: Prep work for variable size btree node buffers
  bcachefs: grab s_umount only if snapshotting
  ...

Pull timer updates from Thomas Gleixner:
 "Updates for time and clocksources:

   - A fix for the idle and iowait time accounting vs CPU hotplug.

     The time is reset on CPU hotplug which makes the accumulated
     systemwide time jump backwards.

   - Assorted fixes and improvements for clocksource/event drivers"

* tag 'timers-core-2024-01-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tick-sched: Fix idle and iowait sleeptime accounting vs CPU hotplug
  clocksource/drivers/ep93xx: Fix error handling during probe
  clocksource/drivers/cadence-ttc: Fix some kernel-doc warnings
  clocksource/drivers/timer-ti-dm: Fix make W=n kerneldoc warnings
  clocksource/timer-riscv: Add riscv_clock_shutdown callback
  dt-bindings: timer: Add StarFive JH8100 clint
  dt-bindings: timer: thead,c900-aclint-mtimer: separate mtime and mtimecmp regs

Pull powerpc fixes from Aneesh Kumar:

 - Increase default stack size to 32KB for Book3S

Thanks to Michael Ellerman.

* tag 'powerpc-6.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/64s: Increase default stack size to 32KB

Add line breaks - inode_to_text() is now much easier to read.
Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>

Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>