- 29 Feb, 2016 40 commits
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Marc Zyngier authored
We already have virt/kvm/arm/ containing timer and vgic stuff. Add yet another subdirectory to contain the hyp-specific files (timer and vgic again). Acked-by:
Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
In order to be able to move code outside of kvm/hyp, we need to make the global hyp.h file accessible from a standard location. include/asm/kvm_hyp.h seems good enough. Acked-by:
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Marc Zyngier authored
With ARMv8.1 VHE, the architecture is able to (almost) transparently run the kernel at EL2, despite being written for EL1. This patch takes care of the "almost" part, mostly preventing the kernel from dropping from EL2 to EL1, and setting up the HYP configuration. Reviewed-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
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Marc Zyngier authored
With VHE, we place kernel {watch,break}-points at EL2 to get things like kgdb and "perf -e mem:..." working. This requires a bit of repainting in the low-level encore/decode, but is otherwise pretty simple. Acked-by:Will Deacon <will.deacon@arm.com> Signed-off-by:
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Marc Zyngier authored
When the kernel is running in HYP (with VHE), it is necessary to include EL2 events if the user requests counting kernel or hypervisor events. Reviewed-by:
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Marc Zyngier authored
The fault decoding process (including computing the IPA in the case of a permission fault) would be much better done in C code, as we have a reasonable infrastructure to deal with the VHE/non-VHE differences. Let's move the whole thing to C, including the workaround for erratum 834220, and just patch the odd ESR_EL2 access remaining in hyp-entry.S. Reviewed-by:
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Marc Zyngier authored
As the kernel fully runs in HYP when VHE is enabled, we can directly branch to the kernel's panic() implementation, and not perform an exception return. Add the alternative code to deal with this. Reviewed-by:
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Marc Zyngier authored
Despite the fact that a VHE enabled kernel runs at EL2, it uses CPACR_EL1 to trap FPSIMD access. Add the required alternative code to re-enable guest FPSIMD access when it has trapped to EL2. Reviewed-by:
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Marc Zyngier authored
Switch the timer code to the unified sysreg accessors. Reviewed-by:
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Marc Zyngier authored
Running the kernel in HYP mode requires the HCR_E2H bit to be set at all times, and the HCR_TGE bit to be set when running as a host (and cleared when running as a guest). At the same time, the vector must be set to the current role of the kernel (either host or hypervisor), and a couple of system registers differ between VHE and non-VHE. We implement these by using another set of alternate functions that get dynamically patched. Reviewed-by:
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Marc Zyngier authored
As non-VHE and VHE have different ways to express the trapping of FPSIMD registers to EL2, make __fpsimd_enabled a patchable predicate and provide a VHE implementation. Reviewed-by:
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Marc Zyngier authored
We're now in a position where we can introduce VHE's minimal save/restore, which is limited to the handful of shared sysregs. Add the required alternative function calls that result in a "do nothing" call on VHE, and the normal save/restore for non-VHE. Reviewed-by:
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Marc Zyngier authored
Use the recently introduced unified system register accessors for those sysregs that behave differently depending on VHE being in use or not. Reviewed-by:
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Marc Zyngier authored
A handful of system registers are still shared between host and guest, even while using VHE (tpidr*_el[01] and actlr_el1). Also, some of the vcpu state (sp_el0, PC and PSTATE) must be save/restored on entry/exit, as they are used on the host as well. In order to facilitate the introduction of a VHE-specific sysreg save/restore, make move the access to these registers to their own save/restore functions. No functional change. Reviewed-by:
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Marc Zyngier authored
With ARMv8, host and guest share the same system register file, making the save/restore procedure completely symetrical. With VHE, host and guest now have different requirements, as they use different sysregs. In order to prepare for this, add split sysreg save/restore functions for both host and guest. No functional changes yet. Acked-by:
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Marc Zyngier authored
VHE brings its own bag of new system registers, or rather system register accessors, as it define new ways to access both guest and host system registers. For example, from the host: - The host TCR_EL2 register is accessed using the TCR_EL1 accessor - The guest TCR_EL1 register is accessed using the TCR_EL12 accessor Obviously, this is confusing. A way to somehow reduce the complexity of writing code for both ARMv8 and ARMv8.1 is to use a set of unified accessors that will generate the right sysreg, depending on the mode the CPU is running in. For example: - read_sysreg_el1(tcr) will use TCR_EL1 on ARMv8, and TCR_EL12 on ARMv8.1 with VHE. - read_sysreg_el2(tcr) will use TCR_EL2 on ARMv8, and TCR_EL1 on ARMv8.1 with VHE. We end up with three sets of accessors ({read,write}_sysreg_el[012]) that can be directly used from C code. We take this opportunity to also add the definition for the new VHE sysregs. Reviewed-by: -
Marc Zyngier authored
The kern_hyp_va macro is pretty meaninless with VHE, as there is only one mapping - the kernel one. In order to keep the code readable and efficient, use runtime patching to replace the 'and' instruction used to compute the VA with a 'nop'. Reviewed-by:
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Marc Zyngier authored
With VHE, the host never issues an HVC instruction to get into the KVM code, as we can simply branch there. Use runtime code patching to simplify things a bit. Reviewed-by:
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Marc Zyngier authored
With the kernel running at EL2, there is no point trying to configure page tables for HYP, as the kernel is already mapped. Take this opportunity to refactor the whole init a bit, allowing the various parts of the hypervisor bringup to be split across multiple functions. Reviewed-by:
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Marc Zyngier authored
Add a new ARM64_HAS_VIRT_HOST_EXTN features to indicate that the CPU has the ARMv8.1 VHE capability. This will be used to trigger kernel patching in KVM. Acked-by:
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Marc Zyngier authored
With the ARMv8.1 VHE, the kernel can run in HYP mode, and thus use the HYP timer instead of the normal guest timer in a mostly transparent way, except for the interrupt line. This patch reworks the arch timer code to allow the selection of the HYP PPI, possibly falling back to the guest timer if not available. Reviewed-by:
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Marc Zyngier authored
With ARMv8.1 VHE extension, it will be possible to run the kernel at EL2 (aka HYP mode). In order for the kernel to easily find out where it is running, add a new predicate that returns whether or not the kernel is in HYP mode. For completeness, the 32bit code also get such a predicate (always returning false) so that code common to both architecture (timers, KVM) can use it transparently. Acked-by:
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Marc Zyngier authored
There is no real need to leave the stage2 initialization as part of the early HYP bootstrap, and we can easily postpone it to the point where we can safely run C code. This will help VHE, which doesn't need any of this bootstrap. Reviewed-by:
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Marc Zyngier authored
So far, our handling of cache maintenance by VA has been pretty simple: Either the access is in the guest RAM and generates a S2 fault, which results in the page being mapped RW, or we go down the io_mem_abort() path, and nuke the guest. The first one is fine, but the second one is extremely weird. Treating the CM as an I/O is wrong, and nothing in the ARM ARM indicates that we should generate a fault for something that cannot end-up in the cache anyway (even if the guest maps it, it will keep on faulting at stage-2 for emulation). So let's just skip this instruction, and let the guest get away with it. Reviewed-by:
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Marc Zyngier authored
I have no idea what these were for - probably a leftover from an early implementation. Good bye! Acked-by:
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Marc Zyngier authored
These are now handled as a panic, so there is little point in keeping them around. Acked-by:
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Marc Zyngier authored
This field was never populated, and the panic code already does something similar. Delete the related code. Acked-by:
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Marc Zyngier authored
Since we don't have much assembler left, most of the KVM stuff in asm-offsets.c is now superfluous. Let's get rid of it. Acked-by:
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Marc Zyngier authored
Just like on arm64, having the CP15 registers expressed as a set of #defines has been very conflict-prone. Let's turn it into an enum, which should make it more manageable. Acked-by:
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Marc Zyngier authored
Now that the old code is long gone, we can remove all the weak attributes, as there is only one version of the code. Acked-by:
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Marc Zyngier authored
As we now have hooks to setup VTCR from C code, let's drop the original VTCR setup and reimplement it as part of the HYP code. Reviewed-by:
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Marc Zyngier authored
As we now have a full reimplementation of the world switch, it is time to kiss the old stuff goodbye. I'm not sure we'll miss it. Acked-by:
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Marc Zyngier authored
Having u64 as the kvm_call_hyp return type is problematic, as it forces all kind of tricks for the return values from HYP to be promoted to 64bit (LE has the LSB in r0, and BE has them in r1). Since the only user of the return value is perfectly happy with a 32bit value, let's make kvm_call_hyp return an unsigned long, which is 32bit on ARM. This solves yet another headache. Reviewed-by:
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Marc Zyngier authored
Instead of spinning forever, let's "properly" handle any unexpected exception ("properly" meaning "print a spat on the console and die"). This has proved useful quite a few times... Reviewed-by: -
Marc Zyngier authored
This part is almost entierely borrowed from the existing code, just slightly simplifying the HYP function call (as we now save SPSR_hyp in the world switch). Reviewed-by:
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Marc Zyngier authored
On guest exit, we must take care of populating our fault data structure so that the host code can handle it. This includes resolving the IPA for permission faults, which can result in restarting the guest. Reviewed-by:
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Marc Zyngier authored
The new world switch implementation is modeled after the arm64 one, calling the various save/restore functions in turn, and having as little state as possible. Reviewed-by:
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Marc Zyngier authored
Similar to the arm64 version, add the code that deals with VFP traps, re-enabling VFP, save/restoring the registers and resuming the guest. Reviewed-by:
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Marc Zyngier authored
Add the very minimal piece of code that is now required to jump into the guest (and return from it). This code is only concerned with save/restoring the USR registers (r0-r12+lr for the guest, r4-r12+lr for the host), as everything else is dealt with in C (VFP is another matter though). Reviewed-by:
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Marc Zyngier authored
Banked registers are one of the many perks of the 32bit architecture, and the world switch needs to cope with it. This requires some "special" accessors, as these are not accessed using a standard coprocessor instruction. Reviewed-by:
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