An error occurred fetching the project authors.
- 20 Dec, 2013 1 commit
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Sachin Kamat authored
'div_reg' is a pointer. Assign NULL instead of 0. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Acked-by:
Dinh Nguyen <dinguyen@altera.com> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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- 27 Nov, 2013 1 commit
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Dinh Nguyen authored
The function socfpga_clk_init() can support clocks that do not have a divider register, but a fixed-divider that can be read from DTS. Therefore, the "reg" property is not a failing condition for socfpga_clk_init(). Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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- 08 Oct, 2013 1 commit
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Dinh Nguyen authored
The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this, the SD driver was getting the incorrect clock value. This prevented the SD driver from initializing correctly. Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Reviewed-by:
Pavel Machek <pavel@denx.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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- 11 Jun, 2013 1 commit
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Dinh Nguyen authored
Add support to gate the clocks that directly feed peripherals. For clocks with multiple parents, add the ability to determine the correct parent, and also set parents. Also add support to calculate and set the clocks' rate. Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> Reviewed-by:
Pavel Machek <pavel@denx.de> Acked-by:
Mike Turquette <mturquette@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Cc: Pavel Machek <pavel@denx.de> CC: <linux@arm.linux.org.uk> v4: - Add Acked-by: Mike Turquette v3: - Addressed comments from Pavel v2: - Fix space/indent errors - Add streq for strcmp == 0 Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 15 Apr, 2013 1 commit
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Dinh Nguyen authored
With this patch, the socfpga clk driver is able to query the clock and clock rates appropriately. Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> Reviewed-by:
Pavel Machek <pavel@denx.de> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 19 Jul, 2012 1 commit
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Dinh Nguyen authored
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> Reviewed-by:
Pavel Machek <pavel@denx.de> Reviewed-by:
Rob Herring <rob.herring@calxeda.com> Reviewed-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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