- 27 Feb, 2010 40 commits
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Wu Zhangjin authored
Use the new unreachable() macro instead of while(1); Signed-off-by:
Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/823/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Wu Zhangjin authored
Without this patch, when copying large amounts of data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by:
Hu Hongbing <huhb@lemote.com> Signed-off-by:
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Wu Zhangjin authored
Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by:
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David Daney authored
Signed-off-by:
David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: gregkh@suse.de Patchwork: http://patchwork.linux-mips.org/patch/837/Signed-off-by:
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David Daney authored
Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. A gather list of up to six fragments will fit in the SKB's CB structure, so no extra memory is required. If a SKB has more than six fragments, we must linearize it. Signed-off-by:
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David Daney authored
Convert the driver to be a reasonably well behaved NAPI citizen. There is one NAPI instance per CPU shared between all input ports. As receive backlog increases, NAPI is scheduled on additional CPUs. Receive buffer refill code factored out so it can also be called from the periodic timer. This is needed to recover from temporary buffer starvation conditions. Signed-off-by:
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David Daney authored
Stop the queue if too many packets are queued. Restart it from a high resolution timer. Rearrange and simplify locking and SKB freeing code Signed-off-by:
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David Daney authored
After aligning the blocks returned by kmalloc, we need to save the original pointer so they can be correctly freed. There are no guarantees about the alignment of SKB data, so we need to handle worst case alignment. Since right shifts over subtraction have no distributive property, we need to fix the back pointer calculation. Signed-off-by:
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David Daney authored
Remove unused code, reindent, and join some spilt strings. Signed-off-by:
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David Daney authored
If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EOI function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by:
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David Daney authored
In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: -
David Daney authored
Replace some instances of smp_llsc_mb() with a new macro smp_mb__before_llsc(). It is used before ll/sc sequences that are documented as needing write barrier semantics. The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(), so there are no changes in semantics. Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just barrier() in the non-SMP case. Signed-off-by:
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David Daney authored
The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, remove them. Signed-off-by:
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David Daney authored
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Rade Bozic authored
Signed-off-by:
Rade Bozic <rade.bozic.ext@nsn.com> Signed-off-by:
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David Daney authored
Signed-off-by:
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Robert P. J. Day authored
Signed-off-by:
Robert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/810/Signed-off-by:
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Manuel Lauss authored
Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by:
Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by:
Yoichi Yuasa <yuasa@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/Signed-off-by:
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David Daney authored
For 64-bit kernels with 64KB pages and two level page tables, there are 42 bits worth of virtual address space This is larger than the 40 bits of virtual address space obtained with the default 4KB Page size and three levels, so there are no draw backs for using two level tables with this configuration. Signed-off-by:
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Manuel Lauss authored
Use runtime CPU detection instead of relying on preprocessor symbols. Signed-off-by:
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Manuel Lauss authored
Use the GPIO config symbol to only build Au1000 interrupt code on chips with compatible hw. Signed-off-by:
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Manuel Lauss authored
Remove the cpu subtype cpp macros in favor of runtime detection, to improve compile coverage of the alchemy common code. (Increases kernel size by 700 bytes). Signed-off-by:
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Florian Fainelli authored
This patch converts the au1000-eth driver to become a full platform-driver as it ought to be. We now pass PHY-speficic configurations through platform_data but for compatibility the driver still assumes the default settings (search for PHY1 on MAC0) when no platform_data is passed. Tested on my MTX-1 board. Signed-off-by:
Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Acked-by:
David S. Miller <davem@davemloft.net> Patchwork: http://patchwork.linux-mips.org/patch/619/ Patchwork: http://patchwork.linux-mips.org/patch/963/Signed-off-by:
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Florian Fainelli authored
This patch makes the board code register the au1000-eth platform device. The au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg function like it has to be done for the Bosporus board which uses a different MAC/PHY setup. Signed-off-by:
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Manuel Lauss authored
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Manuel Lauss authored
Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper reference asoc machine for Alchemy-based systems. AC97/I2S can be selected at boot time by setting switch S6.7. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
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Manuel Lauss authored
Create own directory for DB1200 code and update it with new features. - SPI support: - tmp121 temperature sensor - SPI flash on DB1200 - I2C support - NE1619 sensor - AT24 eeprom - I2C/SPI can be selected at boot time via switch S6.8 - Carddetect IRQs for SD cards. - gen_nand based NAND support. - hexleds count sleep/wake transitions. Signed-off-by:
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Manuel Lauss authored
Replace the devboard NOR MTD mapping driver with physmap-flash support. Also honor the "swapboot" switch settings wrt. to the layout of the NOR partitions. Signed-off-by:
David Woodhouse <David.Woodhouse@intel.com> Signed-off-by:
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Ralf Baechle authored
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Manuel Lauss authored
Limit the amount of address space claimed for Alchemy serial ports to 0x1000. On the Au1300, ports are only 0x1000 apart, and the registers only extend to 0x110 at most on all supported alchemy models. On the Au1300 the autodetect logic no longer works and this makes it necessary to specify the port type through platform data. Because of this the MSR quirk needs to be moved outside the autoconfig() function which will no longer be called when UPF_FIXED_TYPE is specified. Signed-off-by:
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Manuel Lauss authored
UART autodetection breaks on the Au1300 but the IP blocks are identical, at least according to the datasheets. Help the 8250 driver by passing on uart type information via platform data. Signed-off-by:
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Florian Fainelli authored
Warnings being suppressed, we can now turn on -Werror for boards which did not have it already (devboards and xss1500). Signed-off-by:
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Florian Fainelli authored
This patch fixes warnings due to potentially unused variables in board setup code or mixed variables declaration and code (forbidden by ISO C90). Signed-off-by:
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Manuel Lauss authored
Nothing in-tree uses it, so get rid of it. Signed-off-by:
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Manuel Lauss authored
Remove unused uart bit definitions and base macros. Signed-off-by:
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Manuel Lauss authored
This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by:
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Manuel Lauss authored
DMA can only be done from physical addresses; move the "virt_to_phys" source/destination buffer address translation from the dbdma queueing functions (since the hardware can only DMA to/from physical addresses) to their respective users. Signed-off-by:
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Manuel Lauss authored
Remove dbdma compat macros, move remaining users over to default queueing functions and -flags. (Queueing function signature has changed in order to give a build failure instead of silent functional changes due to the no longer implicitly specified DDMA_FLAGS_IE flag) Signed-off-by:
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Manuel Lauss authored
By replacing an extra do_IRQ with a goto, the assembly shrinks from 260 to 212 bytes (gcc-4.3.4). Signed-off-by:
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Manuel Lauss authored
Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by:
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