- 20 Mar, 2024 2 commits
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Mukul Joshi authored
In certain situations, some apps can import a BO multiple times (through IPC for example). To restore such processes successfully, we need to tell drm to ignore duplicate BOs. While at it, also add additional logging to prevent silent failures when process restore fails. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Mario Limonciello authored
The monitor shipped with the Framework 16 supports VRR [1], but it's not being advertised. This is because the detailed timing block doesn't contain `EDID_DETAIL_MONITOR_RANGE` which amdgpu looks for to find min and max frequencies. This check however is superfluous for this case because update_display_info() calls drm_get_monitor_range() to get these ranges already. So if the `DRM_EDID_FEATURE_CONTINUOUS_FREQ` EDID feature is found then turn on freesync without extra checks. v2: squash in fix from Harry Closes: https://www.reddit.com/r/framework/comments/1b4y2i5/no_variable_refresh_rate_on_the_framework_16_on/ Closes: https://www.reddit.com/r/framework/comments/1b6vzcy/framework_16_variable_refresh_rate/ Closes: https://community.frame.work/t/resolved-no-vrr-freesync-with-amd-version/42338 Link: https://gist.github.com/superm1/e8fbacfa4d0f53150231d3a3e0a13fafSigned-off-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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- 11 Mar, 2024 1 commit
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Dave Airlie authored
Merge tag 'amd-drm-next-6.9-2024-03-08-1' of https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.9-2024-03-08-1: amdgpu: - DCN 3.5.1 support - Fixes for IOMMUv2 removal - UAF fix - Misc small fixes and cleanups - SR-IOV fixes - MCBP cleanup - devcoredump update - NBIF 6.3.1 support - VPE 6.1.1 support amdkfd: - Misc fixes and cleanups - GFX10.1 trap fixes Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240308170741.3691166-1-alexander.deucher@amd.com
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- 08 Mar, 2024 5 commits
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https://gitlab.freedesktop.org/drm/msmDave Airlie authored
Late updates for v6.9, the main part is CDM (YUV over DP) which was waiting for drm-misc-next-2024-02-29. DPU: - Add support for YUV420 over DP - Patchset to ease debugging of vblank timeouts - Small cleanup Signed-off-by:
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https://git.pengutronix.de/git/lst/linuxDave Airlie authored
- various code cleanups - enhancements for NPU and MRT support Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-xe-next-fixes-2024-03-04' of ssh://gitlab.freedesktop.org/drm/xe/kernel into drm-next Driver Changes: - Fix kunit link failure with built-in xe - Fix one more 32-bit build failure with ARM compiler - Fix initialization order of topology struct - Cleanup unused fields in struct xe_vm - Fix xe_vm leak when handling page fault on a VM not in fault mode - Drop use of "grouped target" feature in Makefile since that's only available in make >= 4.3 Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2024-03-07' of https://anongit.freedesktop.org/git/drm/drm-misc into drm-next Short summary of fixes pull: - i915: Fix applying placement flags - fbdev: Fix build on PowerMacs after header cleanup Signed-off-by:
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https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.9-2024-03-01: amdgpu: - GC 11.5.1 updates - Misc display cleanups - NBIO 7.9 updates - Backlight fixes - DMUB fixes - MPO fixes - atomfirmware table updates - SR-IOV fixes - VCN 4.x updates - use RMW accessors for pci config registers - PSR fixes - Suspend/resume fixes - RAS fixes - ABM fixes - Misc code cleanups - SI DPM fix - Revert freesync video amdkfd: - Misc cleanups - Error handling fixes radeon: - use RMW accessors for pci config registers From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240301204857.13960-1-alexander.deucher@amd.comSigned-off-by:
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- 07 Mar, 2024 19 commits
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R SUNDAR authored
For linux-next repository. ./drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h:1: warning: no structured comments found ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:132: warning: Incorrect use of kernel-doc format: * @@overlap_only: Whether overlapping of different planes is allowed. ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:132: warning: Incorrect use of kernel-doc format: * @@overlap_only: Whether overlapping of different planes is allowed. ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:1: warning: no structured comments found ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:132: warning: Incorrect use of kernel-doc format: * @@overlap_only: Whether overlapping of different planes is allowed. ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:162: warning: Function parameter or struct member 'pre_multiplied_alpha' not described in 'mpcc_blnd_cfg' Signed-off-by:
R SUNDAR <prosunofficial@gmail.com> Signed-off-by:
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Tim Huang authored
Wait for completion of sending the EnableGfxImu message when using the PSP FW loading for SMU ip v14.0. Signed-off-by:
Tim Huang <Tim.Huang@amd.com> Signed-off-by:
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lima1002 authored
Set the default reset method to mode2 for SMU IP v14.0.1 Signed-off-by:
lima1002 <li.ma@amd.com> Signed-off-by:
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Yifan Zhang authored
This patch to add smu 14.0.1 support. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Alex Deucher authored
Enable VPE 6.1.1. Signed-off-by: -
Lang Yu authored
Add initial support for VPE 6.1.1. v2: squash in updates (Alex) Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Signed-off-by:
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Lang Yu authored
Not ready now. Signed-off-by:
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Lang Yu authored
Under clollaborate mode, multiple VPE instances share a ring buferr and work together to finish a job. Signed-off-by:
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Lang Yu authored
To support multi VPE collaborate mode. Signed-off-by:
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Lang Yu authored
Add support for multi instance VPE processing. Signed-off-by:
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Likun Gao authored
Add nbif v6_3_1 ip block. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Hawking Zhang authored
Add nbif v6_3_1 ip block support. Signed-off-by:
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Hawking Zhang authored
v1: Add pcie v6_1_0 register offset and shift masks header files. (Hawking) v2: Update pcie v6_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update pcie v6_1_0 register offset and shift masks header files to RE2.5. (Likun) v4: Update pcie v6_1_0 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: -
Hawking Zhang authored
v1: Add nbif v6_3_1 register offset and shift masks header files. (Hawking) v2: Update nbif v6_3_1 register offset and shift masks header files to RE2. (Likun) v3: Update nbif v6_3_1 register offset and shift masks header files to RE2.5. (Likun) v4: Update nbif v6_3_1 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: -
Thomas Zimmermann authored
Replace <linux/fb.h> with a forward declaration in <asm/backlight.h> to resolve an unnecessary dependency. Remove pmac_backlight_curve_lookup() and struct fb_info from source and header files. The function and the framebuffer struct are unused. No functional changes. v3: * Add Fixes tag (Christophe) * fix typos in commit message (Jani) Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Fixes: d565dd3b ("[PATCH] powerpc: More via-pmu backlight fixes") Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> # (powerpc) Link: https://patchwork.freedesktop.org/patch/msgid/20240306122935.10626-4-tzimmermann@suse.de
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Thomas Zimmermann authored
Fix builds with CONFIG_PMAC_BACKLIGHT=y. The include statement for the backlight header has recently been removed from <linux/fb.h>. Add it to via-pmu-backlight.c to get the necessary symbols. Reported-by:
Naresh Kamboju <naresh.kamboju@linaro.org> Closes: https://lore.kernel.org/dri-devel/CA+G9fYsAk5TbqqxFC2W4oHLGA0CbTHMxbeq8QayFXTU75YiueA@mail.gmail.com/Signed-off-by:
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Thomas Zimmermann authored
Fix builds with CONFIG_PMAC_BACKLIGHT=y. The include statement for the backlight header has recently been removed from <linux/fb.h>. Reported-by:
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Thomas Zimmermann authored
Backmerging to get a few more commits that came from drm-misc-next. See [1] Signed-off-by:
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Christian Gmeiner authored
The hwdb selection logic as a feature that allows it to mark some fields as 'don't care'. If we match with such a field we memcpy(..) the current etnaviv_chip_identity into ident. This step can overwrite some id values read from the GPU with the 'don't care' value. Fix this issue by restoring the affected values after the memcpy(..). As this is crucial for user space to know when this feature works as expected increment the minor version too. Fixes: 4078a118 ("drm/etnaviv: update hwdb selection logic") Cc: stable@vger.kernel.org Signed-off-by:
Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by:
Tomeu Vizoso <tomeu@tomeuvizoso.net> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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- 06 Mar, 2024 8 commits
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Ricardo B. Marliere authored
Since commit 43a7206b ("driver core: class: make class_register() take a const *"), the driver core allows for struct class to be in read-only memory, so move the kfd_class structure to be declared at build time placing it into read-only memory, instead of having to be dynamically allocated at boot time. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Suggested-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
Ricardo B. Marliere <ricardo@marliere.net> Signed-off-by:
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Sunil Khatri authored
Add ring timeout related information in the amdgpu devcoredump file for debugging purposes. During the gpu recovery process the registered call is triggered and add the debug information in data file created by devcoredump framework under the directory /sys/class/devcoredump/devcdx/ Signed-off-by:
Sunil Khatri <sunil.khatri@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Yifan Zhang authored
This patch to add dcn3.5.1 support. Signed-off-by:
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Laurent Morichetti authored
Similarly to gfx9, gfx10.1 drops vector stores when an xnack error is raised. To work around this issue, use scalar stores instead of vector stores when trapsts.xnack_error == 1. Signed-off-by:
Laurent Morichetti <laurent.morichetti@amd.com> Reviewed-by:
Jay Cornwall <jay.cornwall@amd.com> Signed-off-by:
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Laurent Morichetti authored
In a future commit, the cwsr trap handler code size for gfx10.1 will increase to slightly above the one page mark. Since the TMA does not need to be page aligned, and only 2 pointers are stored in it, push the TMA offset by 2 KiB and keep the TBA+TMA reserved memory size to two pages. Signed-off-by:
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Pierre-Eric Pelloux-Prayer authored
Using the ring_muxer without preemption adds overhead for no reason since mcbp cannot be triggered. Moving back to a single queue in this case also helps when high priority app are used: in this case the gpu_scheduler priority handling will work as expected - much better than ring_muxer with its 2 independant schedulers competing for the same hardware queue. This change requires moving amdgpu_device_set_mcbp above amdgpu_device_ip_early_init because we use adev->gfx.mcbp. Signed-off-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by:
Jiadong Zhu <Jiadong.Zhu@amd.com> Signed-off-by:
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Yang Wang authored
the dce dpm is not available on gfx 11.0.3 sriov device. Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Jesse Zhang authored
Remove the unused function - amdgpu_vm_pt_is_root_clean and remove the impossible condition v1: entries == 0 is not possible any more, so this condition could probably be removed (Felix) Signed-off-by:Jesse Zhang <jesse.zhang@amd.com> Suggested-by：Felix Kuehling <felix.kuehling@amd.com> Reviewed-by:
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- 04 Mar, 2024 5 commits
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Christian König authored
It turned out that executing the SET_Q_MODE packet on every submission creates to much overhead. Implement a workaround which allows skipping the SET_Q_MODE packet if subsequent submissions all use the same parameters. v2: add a NULL check for ring_obj Signed-off-by:
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Christian König authored
First of all calculating the number of dw to patch into a conditional execution is not something HW generation specific. This is just standard ring buffer calculations. While at it also reduce the BUG_ON() into WARN_ON(). Then instead of a random bit pattern use 0 as default value for the number of dw skipped, this way it's not mandatory any more to patch the conditional execution. And last make the address to check a parameter of the conditional execution instead of getting this from the ring. Signed-off-by:
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Ma Jun authored
Because the rpm_mode flag is already set when the driver is initialized, we use it directly for runtime suspend/resume instead of checking it again Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Ma Jun authored
Fix the pwm_mode value error which used for pwm1_enable setting Signed-off-by:
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Shashank Sharma authored
This patch changes the handling and lifecycle of vm->task_info object. The major changes are: - vm->task_info is a dynamically allocated ptr now, and its uasge is reference counted. - introducing two new helper funcs for task_info lifecycle management - amdgpu_vm_get_task_info: reference counts up task_info before returning this info - amdgpu_vm_put_task_info: reference counts down task_info - last put to task_info() frees task_info from the vm. This patch also does logistical changes required for existing usage of vm->task_info. V2: Do not block all the prints when task_info not found (Felix) V3: Fixed review comments from Felix - Fix wrong indentation - No debug message for -ENOMEM - Add NULL check for task_info - Do not duplicate the debug messages (ti vs no ti) - Get first reference of task_info in vm_init(), put last in vm_fini() V4: Fixed review comments from Felix - fix double reference increment in create_task_info - change amdgpu_vm_get_task_info_pasid - additional changes in amdgpu_gem.c while porting Cc: Christian Koenig <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:Shashank Sharma <shashank.sharma@amd.com> Signed-off-by:
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