1. 16 Nov, 2017 38 commits
  2. 15 Nov, 2017 2 commits
    • Linus Torvalds's avatar
      Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux · c9b012e5
      Linus Torvalds authored
      Pull arm64 updates from Will Deacon:
       "The big highlight is support for the Scalable Vector Extension (SVE)
        which required extensive ABI work to ensure we don't break existing
        applications by blowing away their signal stack with the rather large
        new vector context (<= 2 kbit per vector register). There's further
        work to be done optimising things like exception return, but the ABI
        is solid now.
      
        Much of the line count comes from some new PMU drivers we have, but
        they're pretty self-contained and I suspect we'll have more of them in
        future.
      
        Plenty of acronym soup here:
      
         - initial support for the Scalable Vector Extension (SVE)
      
         - improved handling for SError interrupts (required to handle RAS
           events)
      
         - enable GCC support for 128-bit integer types
      
         - remove kernel text addresses from backtraces and register dumps
      
         - use of WFE to implement long delay()s
      
         - ACPI IORT updates from Lorenzo Pieralisi
      
         - perf PMU driver for the Statistical Profiling Extension (SPE)
      
         - perf PMU driver for Hisilicon's system PMUs
      
         - misc cleanups and non-critical fixes"
      
      * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (97 commits)
        arm64: Make ARMV8_DEPRECATED depend on SYSCTL
        arm64: Implement __lshrti3 library function
        arm64: support __int128 on gcc 5+
        arm64/sve: Add documentation
        arm64/sve: Detect SVE and activate runtime support
        arm64/sve: KVM: Hide SVE from CPU features exposed to guests
        arm64/sve: KVM: Treat guest SVE use as undefined instruction execution
        arm64/sve: KVM: Prevent guests from using SVE
        arm64/sve: Add sysctl to set the default vector length for new processes
        arm64/sve: Add prctl controls for userspace vector length management
        arm64/sve: ptrace and ELF coredump support
        arm64/sve: Preserve SVE registers around EFI runtime service calls
        arm64/sve: Preserve SVE registers around kernel-mode NEON use
        arm64/sve: Probe SVE capabilities and usable vector lengths
        arm64: cpufeature: Move sys_caps_initialised declarations
        arm64/sve: Backend logic for setting the vector length
        arm64/sve: Signal handling support
        arm64/sve: Support vector length resetting for new processes
        arm64/sve: Core task context handling
        arm64/sve: Low-level CPU setup
        ...
      c9b012e5
    • Linus Torvalds's avatar
      Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of... · b293fca4
      Linus Torvalds authored
      Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux
      
      Pull RISC-V architecture support from Palmer Dabbelt:
       "This contains the core RISC-V Linux port, which has been through nine
        rounds of review on various mailing lists. The port is not complete:
        there's some cleanup patches moving through the review process, a
        whole bunch of drivers that need some work, and a lot of feature
        additions that will be needed.
      
        The patches contained in this tag have been through nine rounds of
        review on the various mailing lists. I have some outstanding cleanup
        patches, but since there's been so much review on these patches I
        thought it would be best to submit them as-is and then submit explicit
        cleanup patches so everyone can review them. This first patch set is
        big enough that it's a bit of a pain to constantly rewrite, and it's
        caused a few headaches with various contributors.
      
        The port is definately a work in progress. While what's there builds
        and boots with 4.14, it's a bit hard to actually see anything happen
        because there are no device drivers yet. I maintain a staging branch
        that contains all the device drivers and cleanup that actually works,
        but those patches won't all be ready for a while. I'd like to get what
        we currently have into your tree so everyone can start working from a
        single base -- of particular importance is allowing the glibc
        upstreaming process to proceed so we can sort out any possibly
        lingering user-visible ABI problems we might have.
      
        Copied below is the ChangeLog that contains the history of this patch
        set:
      
         (v9) As per suggestions on our v8 patch set, I've split the core
              architecture code out from our drivers and would like to submit
              this patch set to be included into linux-next, with the goal
              being to be merged in during the next merge window. This patch
              set is based on 4.14-rc2, but if it's better to have it based on
              something else then I can change it around.
      
              This patch set contains just the core arch code for RISC-V, so
              while it builds an nominally boots, you can't print or take an
              interrupt so it's not that useful. If you're looking to actually
              boot a system it would probably be better to use the full patch
              set listed below.
      
              We've collected a handful of tags from reviewers, and the
              remainder of the patch set only got minimal feedback last time.
              Here's what changed:
      
               - We now use the device tree to initialize the timer driver so
                 it's less tighly coupled with the arch port.
      
               - I cleaned up the defconfigs -- there's actually now just one,
                 and it's empty. For now I think we're OK with what the kernel
                 sets as defaults, but I anticipate we'll begin to expand this
                 as people start to use the port more.
      
               - The VDSO symbols version is sane.
      
               - We WFI while spinning in the boot loop.
      
               - A handful of comments have been added.
      
              While there are still a handful of FIXMEs in this patch set,
              we've started to get enough interest from various users and
              contributors that maintaining an out of tree patch set is
              starting to become a big burden. Hopefully the patches are good
              enough to merge now, which will at least get everyone working in
              a more reasonable manner as we clean up the remaining issues.
      
         (v8) I know it may not be the ideal time to submit a patch set right
              now, as it's the middle of the merge window, but things have
              calmed down quite a bit in the last month so I thought it would
              be good to get everyone on the same page. There's been a handful
              of changes since the last patch set, but most of them are fairly
              minor:
      
               - We changed PAGE_OFFSET to allowing mapping more physical
                 memory on 64-bit systems. This is user configurable, as it
                 triggers a different code model that generates slightly less
                 efficient code.
      
               - The device tree binding documentation is back, I'd managed to
                 lose it at some point.
      
               - We now pass the atomic64 test suite
      
               - The SBI timer driver has been refactored.
      
         (v7) It's been a while since my last patch set, but the changes han
              been fairly minimal:
      
               - The PCI cleanup patches have been dropped, we'll do them as a
                 separate patch set later.
      
               - We've the Kconfig entries from CONFIG_ISA_* to
                 CONFIG_RISCV_ISA_*, to make grep easier.
      
               - There have been a handful of memory model related tweaks in
                 I/O land, particularly relating the PCI and the upcoming
                 platform specification. There are significant comments in the
                 relevant files. This is still a WIP, but I think we're close
                 to getting as good as we're going to get until we end up with
                 some more specifications.
      
         (v6) As it's been only a day since the v5 patch set, the changes are
              pretty minimal:
      
               - The patch set is now based on linux-next/master, which I
                 believe is a better base now that we're getting closer to
                 upstream.
      
               - EARLY_PRINTK is no longer an option. Since the SBI console is
                 reasonable, there's no penalty to enabling it (and thus no
                 benefit to disabling it).
      
               - The mmap syscalls were refactored a bit.
      
         (v5) Things have really started to calm down, so this is fairly
              similar to the v4 patch set. The most interesting changes
              include:
      
               - We've moved back to a single patch set.
      
               - SMP support has been fixed, I was accidentally running on a
                 non-SMP configuration. There were various mistakes all over
                 the tree as a result of this.
      
               - The cmpxchg syscalls have been removed, as they were deemed a
                 bad idea. As a result, RISC-V Linux systems mandate the A
                 extension. The corresponding Kconfig entry to enable builds
                 on non-A systems has been removed.
      
               - A few more atomic fixes: mostly fence changes, but those
                 resulted in a handful of additional macros that were no
                 longer necessary.
      
               - riscv_early_sie has been removed.
      
         (v4) There have only been a few changes since the v3 patch set:
      
               - The cmpxchg64 syscall is no longer enabled on 32-bit systems.
                 It's not possible to provide this on SMP systems, and it's
                 not necessary as glibc knows not to call it.
      
               - We provide a ELF_HWCAP so users can determine the ISA of the
                 machine the kernel is running on.
      
               - The multi-line comments are in a better form.
      
               - There were a handful of headers that could be replaced with
                 the asm-generic versions, and a few unnecessary definitions.
      
               - We no longer use printk, but instead use pr_*.
      
               - A few Kconfig and defconfig entries have been cleaned up.
      
         (v3) A highlight of the changes since the v2 patch set includes:
      
               - We've split out all our drivers into separate patch sets,
                 which I've already sent out to the relevant maintainers. I
                 haven't included those patches in this patch set, but some of
                 them are necessary to build our port.
      
               - The patch set is now split up differently: rather than being
                 split per directory it is split per topic. Hopefully this
                 will make it easier to review the port on the mailing list.
                 The split is a bit rough, so you probably still want to look
                 at the patch set as a whole.
      
               - atomic.h has been completely rewritten and is hopefully now
                 correct. I've attempted to sanitize the various other memory
                 model related code as well, and I think it should all be sane
                 now aside from a handful of FIXMEs commented in the code.
      
               - We've changed the cmpexchg syscall to always exist and to not
                 be multiplexed. There is also a VDSO entry for compare and
                 exchange, which allows kernels with the A extension to
                 execute user code without the A extension reasonably fast.
      
               - Our user-visible register state now contains enough space for
                 the Q extension for 128-bit floating point, as well as a few
                 words to allow extensibility to future ISA extensions like
                 the eventual V extension for vectors.
      
               - A handful of driver cleanups, but these have been split into
                 separate patch sets now so I won't duplicate them here.
      
         (v2) A highlight of the changes since the v1 patch set includes:
      
               - We've split out our drivers into the right places, which
                 means now there's a lot more patches. I'll be submitting
                 these patches to various subsystem maintainers and including
                 them in any future RISC-V patch sets until they've been
                 merged.
      
               - The SBI console driver has been completely rewritten to use
                 the HVC helpers and is now significantly smaller.
      
               - We've begun to use weaker barriers as opposed to just the big
                 "fence". There's still some work to do here, specifically:
                  - We need fences in the relaxed MMIO functions.
                  - The non-relaxed MMIO functions are missing R/W bits on their fences.
                  - Many AMOs need the aq and rl bits set.
      
               - We now have thread_info in task_struct. As a result, sscratch
                 now contains TP instead of SP. This was necessary because
                 thread_info is no longer on the stack.
      
               - A few shared routines have been added that we use instead of
                 creating another arch copy"
      Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
      
      * tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
        RISC-V: Build Infrastructure
        RISC-V: User-facing API
        RISC-V: Paging and MMU
        RISC-V: Device, timer, IRQs, and the SBI
        RISC-V: Task implementation
        RISC-V: ELF and module implementation
        RISC-V: Generic library routines and assembly
        RISC-V: Atomic and Locking Code
        RISC-V: Init and Halt Code
        dt-bindings: RISC-V CPU Bindings
        lib: Add shared copies of some GCC library routines
        MAINTAINERS: Add RISC-V
      b293fca4