- 17 Dec, 2018 1 commit
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Boris Brezillon authored
The opcodes used by the controller when doing batched page prog should be written in NFC_REG_WCMD_SET not FC_REG_RCMD_SET. Luckily, the default NFC_REG_WCMD_SET value matches the one we set in the driver which explains why we didn't notice the problem. Fixes: 614049a8 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by:
Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com>
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- 15 Dec, 2018 1 commit
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Miquel Raynal authored
marvell_nfc_wait_op() waits for completion during 'timeout_ms' milliseconds before throwing an error. While the logic is fine, the value of 'timeout_ms' is given by the core and actually correspond to the maximum time the NAND chip will take to complete the operation. Assuming there is no overhead in the propagation of the interrupt signal to the the NAND controller (through the Ready/Busy line), this delay does not take into account the latency of the operating system. For instance, for a page write, the delay given by the core is rounded up to 1ms. Hence, when the machine is over loaded, there is chances that this timeout will be reached. There are two ways to solve this issue that are not incompatible: 1/ Enlarge the timeout value (if so, how much?). 2/ Check after the waiting method if we did not miss any interrupt because of the OS latency (an interrupt is still pending). In this case, we assume the operation exited successfully. We choose the second approach that is a must in all cases, with the possibility to also modify the timeout value to be, e.g. at least 1 second in all cases. Fixes: 02f26ecf ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org Signed-off-by:
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- 14 Dec, 2018 2 commits
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Boris Brezillon authored
Commit e1e6255c ("mtd: rawnand: omap2: convert driver to nand_scan()") moved part of the init code in the ->attach_chip hook and at the same time changed the struct device object passed to dma_request_chan() (&pdev->dev instead of pdev->dev.parent). Fixes: e1e6255c ("mtd: rawnand: omap2: convert driver to nand_scan()") Reported-by:
Alexander Sverdlin <alexander.sverdlin@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by:
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Boris Brezillon authored
nand_jedec_detect() should return 1 when the PARAM page parsing succeeds, otherwise the core considers JEDEC detection failed and falls back to ID-based detection. Fixes: 480139d9 ("mtd: rawnand: get rid of the JEDEC parameter page in nand_chip") Cc: <stable@vger.kernel.org> Signed-off-by:
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- 07 Dec, 2018 36 commits
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Mathieu Malaterre authored
There is a plan to build the kernel with -Wimplicit-fallthrough and these places in the code produced warnings. Fix them up. Signed-off-by:
Mathieu Malaterre <malat@debian.org> Signed-off-by:
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Chuanhong Guo authored
Add support for GigaDevice GD5F1G/2G/4GQ4xA SPI NAND. Signed-off-by:
Chuanhong Guo <gch981213@gmail.com> Reviewed-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by:
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Boris Brezillon authored
We try to force NAND controller drivers to properly separate the NAND controller object from the NAND chip one, so let's deprecate the dummy controller object embedded in nand_chip to encourage them to create their own instance. Signed-off-by:
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Boris Brezillon authored
Replace the license text by an SPDX tag. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
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Boris Brezillon authored
The dummy controller is kept around to support old drivers. Let's patch this one and declare our own nand_controller instance. Signed-off-by:
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Boris Brezillon authored
Mimic what has been done in the core and avoid passing mtd_info object internally. Signed-off-by:
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Boris Brezillon authored
checkpatch reports a bunch of coding style issues. Let's fix them all in one step. Signed-off-by:
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Boris Brezillon authored
Add an SPDX GPL-2.0 tag and update MODULE_LICENSE() to match the license text. Signed-off-by:
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Boris Brezillon authored
The dummy controller is kept around to support old drivers. Let's patch this one and declare our own nand_controller instance. Signed-off-by:
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Boris Brezillon authored
nand_to_fsmc() is used almost everywhere except in fsmc_setup_data_interface() where nand_get_controller_data() is used instead. Make that consistent and drop the nand_set_controller_data() call in the probe path. Signed-off-by:
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Boris Brezillon authored
The kernel-doc describing struct fsmc_nand_data is not in sync with the struct itself. Add missing entries and drop invalid ones. Signed-off-by:
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Boris Brezillon authored
Mimic what has been done in the core and stop passing mtd_info objects to internal functions. Signed-off-by:
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Masahiro Yamada authored
In nand_scan_ident(), the controller driver resets every NAND chip. This is done by sending NAND_CMD_RESET. The Denali IP provides another way to do the equivalent thing; if a bit is set in the DEVICE_RESET register, the controller sends the RESET command to the corresponding device. denali_reset_banks() uses it to reset all devices beforehand. This redundant reset sequence was needed to know the actual number of chips before calling nand_scan_ident(); if DEVICE_RESET fails, there is no chip in that chip select. Then, denali_reset_banks() sets denali->max_banks to the number of detected chips. As commit f486287d ("mtd: nand: denali: fix bank reset function to detect the number of chips") explained, nand_scan_ident() issued Set Features (0xEF) command to all CS lines, some of which may not be connected with a chip. Then, the driver would wait for R/B# response, which never happens. This problem was solved by commit 107b7d6a ("mtd: rawnand: avoid setting again the timings to mode 0 after a reset"). In the current code, nand_setup_data_interface() is called from nand_scan_tail(), which is invoked after the chip detection. Now, we can really remove the redundant denali_nand_banks() by simply passing the maximum number of chip selects supported by this IP (typically 4 or 8) to nand_scan(). Let's leave all the chip detection process to nand_scan_ident(). Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Masahiro Yamada authored
The Denali NAND IP has no way to read out the current signal level of the R/B# pin. Instead, denali_dev_ready() checks if the R/B# transition has already happened. (The INTR__INT_ACT interrupt is asserted at the rising edge of the R/B# pin.) It is not a correct way to implement the ->dev_ready() hook. In fact, it has a drawback; in the nand_scan_ident phase, the chip detection iterates over maxchips until it fails to find a homogeneous chip. For the last loop, nand_reset() fails if no chip is there. If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready() after NAND_CMD_RESET. However, we know denali_dev_ready() never returns 1 unless there exists a chip that toggles R/B# in that chip select. Then, nand_wait_ready() just ends up with wasting 400 msec, in the end, shows the "timeout while waiting for chip to become ready" warning. Let's remove the mis-implemented dev_ready hook, and fallback to sending the NAND_CMD_STATUS and nand_wait_status_ready(), which bails out more quickly. Signed-off-by:
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Miquel Raynal authored
Correct the spelling mistake 'Regiters' -> 'Registers'. Fixes: 961ba15c ("mtd: rawnand: marvell: Fix clock resource by adding a register clock") Signed-off-by:
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Janusz Krzysztofik authored
Amstrad Delta NAND driver now uses GPIO API for data I/O so there is no need to assign memory I/O resource to the device any longer. Drop it. Signed-off-by:
Janusz Krzysztofik <jmkrzyszt@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Janusz Krzysztofik authored
Don't readw()/writew() data directly from/to GPIO port which is under control of gpio-omap driver, use GPIO consumer API instead. The driver should now work with any 8-bit bidirectional GPIO port, not only OMAP. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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Janusz Krzysztofik authored
Data port used by the driver is actually an OMAP MPUIO device, already under control of gpio-omap driver. For that reason we used to not request the memory region of the port as that would fail because the region is already busy. Despite that, we are still accessing the port by just ioremapping it and performing read/write operations. Moreover, we are doing that without any proteciton from other users legally manipulating the port pins over GPIO API. The plan is to convert the driver to access the port over GPIO consumer API. Before that happens, already prevent from other users accessing the port pins by requesting an array of its GPIO descriptors. Signed-off-by:
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Janusz Krzysztofik authored
Data port used by Amstrad Delta NAND driver is actually an OMAP MPUIO device, already under control of gpio-omap driver. The NAND driver gets access to the port by ioremapping it and performs read/write operations. That is done without any proteciton from other users legally manipulating the port pins over GPIO API. The plan is to convert the driver to access the port over GPIO consumer API. Before that is implemented, the driver can already obtain exclusive access to the port by requesting an array of its GPIO descriptors. Add respective entries to the NAND GPIO lookup table. Signed-off-by:
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Boris Brezillon authored
->setup_data_interface() is a controller specific method and should thus be placed in nand_controller_ops. In order to make that work with controllers that support keeping pre-configured timings we need to add a new NAND_KEEP_TIMINGS flag to inform the core it should skip the timings selection step. Signed-off-by:
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Boris Brezillon authored
->exec_op() is a controller method and has nothing to do in the nand_chip struct. Let's move it to the nand_controller_ops struct and adjust the core and drivers accordingly. Signed-off-by:
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Boris Brezillon authored
Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by:
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Boris Brezillon authored
Now that the CS to be selected is passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() hook. Signed-off-by:
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Boris Brezillon authored
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by:
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Boris Brezillon authored
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by:
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Boris Brezillon authored
Now that the CS to be selected is kept in chip->cur_cs and passed in nand_operation->cs, we can get rid of the ->select_chip() implementation and replace it by an internal function which is called from the chip->exec_op() and chip->ecc.read/write_xxx() hooks. Signed-off-by:
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Boris Brezillon authored
Now that the CS line to assert is directly passed through the nand_operation struct we can replace the fsmc_select_chip() implementation by an internal fsmc_ce_ctrl() function which is directly called from fsmc_exec_op() Signed-off-by:
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Boris Brezillon authored
Now that the CS to be selected on a nand_operation is passed in nand_operation->cs we can make the ->select_chip() hook optional for drivers implementing ->exec_op(). When not implemented, the core is assuming the CS line is automatically asserted/deasserted by the driver ->exec_op() implementation. Signed-off-by:
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Boris Brezillon authored
In order to deprecate the ->select_chip hook we need to pass the CS line a NAND operations are targeting. This is done through the addition of a cs field to the nand_operation struct. We also need to keep track of the currently selected target to properly initialize op->cs, hence the ->cur_cs field addition to the nand_chip struct. Note that op->cs is not assigned in nand_exec_op() because we might rework the way we execute NAND operations in the future (adopt a queuing mechanism instead of the serialization we have right now). Signed-off-by:
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Boris Brezillon authored
Add a wrapper to prevent drivers and core code from directly calling the ->select_chip hook which we are about to deprecate. Signed-off-by:
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Boris Brezillon authored
All NAND objects are supposed to inherit from nand_controller. The framework is providing a dummy controller object, but we're moving away from this approach in favor of explicit inheritance. Signed-off-by:
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Boris Brezillon authored
mtd_device_register() can fail, and when it does we should propagate the error and cleanup what has been done before. Signed-off-by:
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Boris Brezillon authored
Remove unused labels, rename out_mtd into err_unmap to make it clearer and return 0 instead of using a goto out at the end of the registration procedure. Signed-off-by:
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Boris Brezillon authored
Most of them were reported by checkpatch: * s/u_char/u8/ * remove unneeded blank lines * don't print warning messages when devm_kzalloc() fails * Use ! instead of == NULL * Remove invalid comment Signed-off-by:
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Boris Brezillon authored
Add an SPDX GPL-2.0 tag and update MODULE_LICENSE() to match the license text. Signed-off-by:
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Boris Brezillon authored
Drop the asm and mach headers inclusion and allow this driver to be compiled when COMPILE_TEST=y in order to increase compile-test coverage. Signed-off-by:
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