- 26 Mar, 2015 10 commits
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Al Stone authored
One more documentation file are also being added: A section by section review of the ACPI spec (acpi_object_usage.txt) to note recommendations and prohibitions on the use of the numerous ACPI tables and objects. This sets out the current expectations of the firmware by Linux very explicitly (or as explicitly as I can, for now). CC: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> CC: Yi Li <phoenix.liyi@huawei.com> CC: Mark Langsdorf <mlangsdo@redhat.com> CC: Ashwin Chaugule <ashwinc@codeaurora.org> Acked-by:
Robert Richter <rrichter@cavium.com> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
Add documentation for the guidelines of how to use ACPI on ARM64. Reviewed-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Reviewed-by:
Yi Li <phoenix.liyi@huawei.com> Reviewed-by:
Mark Langsdorf <mlangsdo@redhat.com> Reviewed-by:
Ashwin Chaugule <ashwinc@codeaurora.org> Acked-by:
Robert Richter <rrichter@cavium.com> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
Add Kconfigs to build ACPI on ARM64, and make ACPI available on ARM64. acpi_idle driver is x86/IA64 dependent now, so make CONFIG_ACPI_PROCESSOR depend on X86 || IA64, and implement it on ARM64 in the future. CC: Rafael J. Wysocki <rjw@rjwysocki.net> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
When ACPI is enabled on ARM64, XEN ACPI will also compiled into the kernel, but XEN ACPI is x86 dependent, so introduce CONFIG_XEN_ACPI to make it depend on x86 before XEN ACPI is functional on ARM64. CC: Julien Grall <julien.grall@linaro.org> CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> CC: Boris Ostrovsky <boris.ostrovsky@oracle.com> CC: David Vrabel <david.vrabel@citrix.com> Acked-by:
Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Al Stone authored
ACPI reduced hardware mode is disabled by default, but ARM64 can only run properly in ACPI hardware reduced mode, so select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64. If the firmware is not using hardware reduced ACPI mode, we will disable ACPI to avoid nightmare such as accessing some registers which are not available on ARM64. CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
Using the information presented by GTDT (Generic Timer Description Table) to initialize the arch timer (not memory-mapped). CC: Daniel Lezcano <daniel.lezcano@linaro.org> CC: Thomas Gleixner <tglx@linutronix.de> Originally-by:
Amit Daniel Kachhap <amit.daniel@samsung.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Tomasz Nowicki authored
ACPI kernel uses MADT table for proper GIC initialization. It needs to parse GIC related subtables, collect CPU interface and distributor addresses and call driver initialization function (which is hardware abstraction agnostic). In a similar way, FDT initialize GICv1/2. NOTE: This commit allow to initialize GICv1/2 basic functionality. While now simple GICv2 init call is used, any further GIC features require generic infrastructure for proper ACPI irqchip initialization. That mechanism and stacked irqdomains to support GICv2 MSI/virtualization extension, GICv3/4 and its ITS are considered as next steps. CC: Jason Cooper <jason@lakedaemon.net> CC: Marc Zyngier <marc.zyngier@arm.com> CC: Thomas Gleixner <tglx@linutronix.de> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Marc Zyngier <marc.zyngier@arm.com> Acked-by:
Jason Cooper <jason@lakedaemon.net> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is used, and then register device's gsi with the core IRQ subsystem. acpi_register_gsi() is similar to DT based irq_of_parse_and_map(), since gsi is unique in the system, so use hwirq number directly for the mapping. We are going to implement stacked domains when GICv2m, GICv3, ITS support are added. CC: Marc Zyngier <marc.zyngier@arm.com> Originally-by:
Amit Daniel Kachhap <amit.daniel@samsung.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
Introduce a new function map_gicc_mpidr() to allow MPIDRs to be obtained from the GICC Structure introduced by ACPI 5.1, since MPIDR for ARM64 is 64-bit, so typedef u64 for phys_cpuid_t. The ARM architecture defines the MPIDR register as the CPU hardware identifier. This patch adds the code infrastructure to retrieve the MPIDR values from the ARM ACPI GICC structure in order to look-up the kernel CPU hardware ids required by the ACPI core code to identify CPUs. CC: Rafael J. Wysocki <rjw@rjwysocki.net> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Catalin Marinas authored
CPU hardware ID (phys_id) is defined as u32 in structure acpi_processor, but phys_id is used as int in acpi processor driver, so it will lead to some inconsistence for the drivers. Furthermore, to cater for ACPI arch ports that implement 64 bits CPU ids a generic CPU physical id type is required. So introduce typedef u32 phys_cpuid_t in a common file, and introduce a macro PHYS_CPUID_INVALID as (phys_cpuid_t)(-1) if it's not defined by other archs, this will solve the inconsistence in acpi processor driver, and will prepare for the ACPI on ARM64 for the 64 bit CPU hardware ID in the following patch. CC: Rafael J Wysocki <rjw@rjwysocki.net> Suggested-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Acked-by:
Sudeep Holla <sudeep.holla@arm.com> Acked-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> [hj: reworked cpu physid map return codes] Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- 25 Mar, 2015 12 commits
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Hanjun Guo authored
MADT contains the information for MPIDR which is essential for SMP initialization, parse the GIC cpu interface structures to get the MPIDR value and map it to cpu_logical_map(), and add enabled cpu with valid MPIDR into cpu_possible_map. ACPI 5.1 only has two explicit methods to boot up SMP, PSCI and Parking protocol, but the Parking protocol is only specified for ARMv7 now, so make PSCI as the only way for the SMP boot protocol before some updates for the ACPI spec or the Parking protocol spec. Parking protocol patches for SMP boot will be sent to upstream when the new version of Parking protocol is ready. CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> CC: Mark Rutland <mark.rutland@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Olof Johansson <olof@lixom.net> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
When MADT is parsed, print GIC information as debug message: ACPI: GICC (acpi_id[0x0000] address[00000000e112f000] MPIDR[0x0] enabled) ACPI: GICC (acpi_id[0x0001] address[00000000e112f000] MPIDR[0x1] enabled) ... ACPI: GICC (acpi_id[0x0201] address[00000000e112f000] MPIDR[0x201] enabled) This debug information will be very helpful to bring up early systems to see if acpi_id and MPIDR are matched or not as spec defined. CC: Rafael J. Wysocki <rjw@rjwysocki.net> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Sudeep Holla <sudeep.holla@arm.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
There are two flags: PSCI_COMPLIANT and PSCI_USE_HVC. When set, the former signals to the OS that the firmware is PSCI compliant. The latter selects the appropriate conduit for PSCI calls by toggling between Hypervisor Calls (HVC) and Secure Monitor Calls (SMC). FADT table contains such information in ACPI 5.1, FADT table was parsed in ACPI table init and copy to struct acpi_gbl_FADT, so use the flags in struct acpi_gbl_FADT for PSCI init. Since ACPI 5.1 doesn't support self defined PSCI function IDs, which means that only PSCI 0.2+ is supported in ACPI. CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
If the early boot methods of acpi are happy that we have valid ACPI tables and acpi=force has been passed, then do not unflat devicetree effectively disabling further hardware probing from DT. CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Al Stone authored
This implements the following policy to decide whether ACPI should be used to boot the system: - acpi=off: ACPI will not be used to boot the system, even if there is no alternative available (e.g., device tree is empty) - acpi=force: only ACPI will be used to boot the system; if that fails, there will be no fallback to alternative methods (such as device tree) - otherwise, ACPI will be used as a fallback if the device tree turns out to lack a platform description; the heuristic to decide this is whether /chosen is the only node present at depth 1 CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> CC: Rafael J. Wysocki <rjw@rjwysocki.net> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Grant Likely <grant.likely@linaro.org> Tested-by:
Timur Tabi <timur@codeaurora.org> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
CONFIG_ACPI depends CONFIG_PCI on x86 and ia64, in ARM64 server world we will have PCIe in most cases, but some of them may not, make CONFIG_ACPI depend CONFIG_PCI on ARM64 will satisfy both. With that case, we need some arch dependent PCI functions to access the config space before the PCI root bridge is created, and pci_acpi_scan_root() to create the PCI root bus. So introduce some stub function here to make ACPI core compile and revisit them later when implemented on ARM64. CC: Liviu Dudau <Liviu.Dudau@arm.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
ACPI 5.1 does not currently support S states for ARM64 hardware but ACPI code will call acpi_target_system_state() and acpi_sleep_init() for device power management, so introduce CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT and select it for x86 and ia64 only to make sleep functions available, and also introduce stub function to allow other drivers to function until S states are defined for ARM64. It will be no functional change for x86 and IA64. Suggested-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Mark Salter authored
The acpi_os_ioremap() function may be used to map normal RAM or IO regions. The current implementation simply uses ioremap_cache(). This will work for some architectures, but arm64 ioremap_cache() cannot be used to map IO regions which don't support caching. So for arm64, use ioremap() for non-RAM regions. CC: Rafael J Wysocki <rjw@rjwysocki.net> CC: Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Robert Richter <rrichter@cavium.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Mark Salter <msalter@redhat.com> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Al Stone authored
As we want to get ACPI tables to parse and then use the information for system initialization, we should get the RSDP (Root System Description Pointer) first, it then locates Extended Root Description Table (XSDT) which contains all the 64-bit physical address that pointer to other boot-time tables. Introduce acpi.c and its related head file in this patch to provide fundamental needs of extern variables and functions for ACPI core, and then get boot-time tables as needed. - asm/acenv.h for arch specific ACPICA environments and implementation, It is needed unconditionally by ACPI core; - asm/acpi.h for arch specific variables and functions needed by ACPI driver core; - acpi.c for ARM64 related ACPI implementation for ACPI driver core; acpi_boot_table_init() is introduced to get RSDP and boot-time tables, it will be called in setup_arch() before paging_init(), so we should use eary_memremap() mechanism here to get the RSDP and all the table pointers. FADT Major.Minor version was introduced in ACPI 5.1, it is the same as ACPI version. In ACPI 5.1, some major gaps are fixed for ARM, such as updates in MADT table for GIC and SMP init, without those updates, we can not get the MPIDR for SMP init, and GICv2/3 related init information, so we can't boot arm64 ACPI properly with table versions predating 5.1. If firmware provides ACPI tables with ACPI version less than 5.1, OS has no way to retrieve the configuration data that is necessary to init SMP boot protocol and the GIC properly, so disable ACPI if we get an FADT table with version less that 5.1 when acpi_boot_table_init() called. CC: Catalin Marinas <catalin.marinas@arm.com> CC: Will Deacon <will.deacon@arm.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Yijing Wang <wangyijing@huawei.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Tested-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Tomasz Nowicki <tomasz.nowicki@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Mark Salter authored
Commit 0e63ea48 (arm64/efi: add missing call to early_ioremap_reset()) added a missing call to early_ioremap_reset(). This triggers a BUG if code tries using early_ioremap() after the early_ioremap_reset(). This is a problem for some ACPI code which needs short-lived temporary mappings after paging_init() but before acpi_early_init() in start_kernel(). This patch adds definitions for the __late_set_fixmap() and __late_clear_fixmap() which avoids the BUG by allowing later use of early_ioremap(). CC: Leif Lindholm <leif.lindholm@linaro.org> CC: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by:
Mark Langsdorf <mlangsdo@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Robert Richter <rrichter@cavium.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Acked-by:
Robert Richter <rrichter@cavium.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Mark Salter <msalter@redhat.com> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Graeme Gregory authored
Now with the base changes to the arm memory mapping it is safe to convert to using ioremap to map in the tables after acpi_gbl_permanent_mmap is set. CC: Rafael J Wysocki <rjw@rjwysocki.net> Tested-by:
Robert Richter <rrichter@cavium.com> Tested-by:
Timur Tabi <timur@codeaurora.org> Acked-by:
Robert Richter <rrichter@cavium.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by:
Grant Likely <grant.likely@linaro.org> Signed-off-by:
Al Stone <al.stone@linaro.org> Signed-off-by:
Graeme Gregory <graeme.gregory@linaro.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Hanjun Guo authored
For a normal 8 cpu sockets system, it will up to 240 cpu threads (Xeon E7 v2 family for now), and we need 240 entries for local apic or local x2apic in MADT table, so it will be much verbose information printed with a slow uart console when system booted, this will be even worse with large system with 16/32 cpu sockets. This patch just use pr_debug() instead of pr_info() for ioapic/iosapic, local apic/x2apic/sapic structures when scanning the MADT table to remove those verbose information, but leave other structures unchanged. CC: Rafael J Wysocki <rjw@rjwysocki.net> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Grant Likely <grant.likely@linaro.org> Tested-by:
Timur Tabi <timur@codeaurora.org> Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- 16 Mar, 2015 1 commit
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Linus Torvalds authored
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- 15 Mar, 2015 6 commits
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fix from Dave Airlie: "An oops snuck in in an -rc3 patch, this fixes it" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: [PATCH] drm/mm: Fix support 4 GiB and larger ranges
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds authored
Pull clock framework fixes from Michael Turquette: "The clk fixes for 4.0-rc4 comprise three themes. First are the usual driver fixes for new regressions since v3.19. Second are fixes to the common clock divider type caused by recent changes to how we round clock rates. This affects many clock drivers that use this common code. Finally there are fixes for drivers that improperly compared struct clk pointers (drivers must not deref these pointers). While some of these drivers have done this for a long time, this did not cause a problem until we started generating unique struct clk pointers for every consumer. A new function, clk_is_match was introduced to get these drivers working again and they are fixed up to no longer deref the pointers themselves" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: ASoC: kirkwood: fix struct clk pointer comparing ASoC: fsl_spdif: fix struct clk pointer comparing ARM: imx: fix struct clk pointer comparing clk: introduce clk_is_match clk: don't export static symbol clk: divider: fix calculation of initial best divider when rounding to closest clk: divider: fix selection of divider when rounding to closest clk: divider: fix calculation of maximal parent rate for a given divider clk: divider: return real rate instead of divider value clk: qcom: fix platform_no_drv_owner.cocci warnings clk: qcom: fix platform_no_drv_owner.cocci warnings clk: qcom: Add PLL4 vote clock clk: qcom: lcc-msm8960: Fix PLL rate detection clk: qcom: Fix slimbus n and m val offsets clk: ti: Fix FAPLL parent enable bit handling
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Krzysztof Kolasa authored
bad argument if(tmp)... in check_free_hole fix oops: kernel BUG at drivers/gpu/drm/drm_mm.c:305! [airlied: excellent, this was my task for today]. Signed-off-by:
Krzysztof Kolasa <kkolasa@winsoft.pl> Reviewed-by:
Chris wilson <chris@chris-wilson.co.uk> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Arnd Bergmann: "This is a rather unpleasantly large set of bug fixes for arm-soc, Most of them because of cross-tree dependencies for Exynos where we should have figured out the right path to merge things before the merge window, and then the maintainer being unable to sort things out in time during a business trip. The other changes contained here are the usual collection: MAINTAINERS file updates - Gregory Clement is now a co-maintainer for the legacy Marvell EBU platforms - A MAINTAINERS entry for the Freescale Vybrid platform that was added last year - Matt Porter no longer works as a maintainer on Broadcom SoCs Build-time issues - A compile-time error for at91 - Several minor DT fixes on at91, imx, exynos, socfpga, and omap - The new digicolor platform was not correctly enabled at all Configuration issues - Two defconfig fix for regressions using USB on versatile express and on OMAP3 - Enabling all 8 CPUs on Allwinner/SUNxi - Enabling the new STiH410 platform to be usable Bug fixes in platform code - A missing barrier for socfpga - Fixing LPDDR1 self-refresh mode on at91 - Fixing RTC interrupt numbers on Exynos3250 - Fixing a cache-coherency issues in CPU power-down on Exynos5 - Multiple small OMAP power management fixes" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (69 commits) MAINTAINERS: Add myself as co-maintainer to the legacy support of the mvebu SoCs ARM: at91: pm_slowclock: fix the compilation error ARM: at91/dt: fix USB high-speed clock to select UTMI ARM: at91/dt: fix at91 udc compatible strings ARM: at91/dt: declare matrix node as a syscon device ARM: vexpress: update CONFIG_USB_ISP1760 option ARM: digicolor: add the machine directory to Makefile ARM: STi: Add STiH410 SoC support MAINTAINERS: add Freescale Vybrid SoC MAINTAINERS: Remove self as ARM mach-bcm co-maintainer ARM: imx6sl-evk: set swbst_reg as vbus's parent reg ARM: imx6qdl-sabresd: set swbst_reg as vbus's parent reg ARM: at91/dt: at91sam9261: fix clocks and clock-names in udc definition ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot ARM: OMAP: enable TWL4030_USB in omap2plus_defconfig ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN lines ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrl ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding ARM: dts: OMAP5: fix polling intervals for thermal zones ...
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git://git.infradead.org/users/jcooper/linuxLinus Torvalds authored
Pull irqchip fixes from Jason Cooper: "armada-370-xp: - Chained per-cpu interrupts gic{,-v3,v3-its}" - Various fixes for safer operation" * tag 'irqchip-fixes-4.0' of git://git.infradead.org/users/jcooper/linux: irqchip: gicv3-its: Support safe initialization irqchip: gicv3-its: Define macros for GITS_CTLR fields irqchip: gicv3-its: Add limitation to page order irqchip: gicv3-its: Use 64KB page as default granule irqchip: gicv3-its: Zero itt before handling to hardware irqchip: gic-v3: Fix out of bounds access to cpu_logical_map irqchip: gic: Fix unsafe locking reported by lockdep irqchip: gicv3-its: Fix unsafe locking reported by lockdep irqchip: gicv3-its: Iterate over PCI aliases to generate ITS configuration irqchip: gicv3-its: Allocate enough memory for the full range of DeviceID irqchip: gicv3-its: Fix ITS CPU init irqchip: armada-370-xp: Fix chained per-cpu interrupts
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Jason Cooper authored
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- 14 Mar, 2015 10 commits
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "Misc i915, vmwgfx and radeon fixes along with a fix for one of those recursive sleep mutex debug cases in the mst code" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/vmwgfx: Fix an issue with the device losing its irq line on module unload drm/vmwgfx: Correctly NULLify dma buffer pointer on failure drm/vmwgfx: Reorder device takedown somewhat drm/vmwgfx: Fix a couple of lock dependency violations drm/radeon: drop setting UPLL to sleep mode drm/radeon: fix wait to actually occur after the signaling callback drm/i915: Prevent TLB error on first execution on SNB drm/i915: Do both mt and gen6 style forcewake reset on ivb probe drm/i915: Make WAIT_IOCTL negative timeouts be indefinite again drm/i915: use in_interrupt() not in_irq() to check context drm/mst: fix recursive sleep warning on qlock drm: Don't assign fbs for universal cursor support to files
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fix from James Bottomley: "This is a simple fix for a domain revalidation crash which has recently turned up in the libsas code (applies to mvsas, isc and aic94xx)" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: libsas: Fix Kernel Crash in smp_execute_task
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git://git.samba.org/jlayton/linuxLinus Torvalds authored
Pull file locking bugfix from Jeff Layton: "Just a small fix for a potential problem in one of the lease tracepoints" * tag 'locks-v4.0-4' of git://git.samba.org/jlayton/linux: locks: fix generic_delete_lease tracepoint to use victim pointer
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git://github.com/awilliam/linux-vfioLinus Torvalds authored
Pull VFIO fix from Alex Williamson: "Add missing break to avoid clobbering ioctl (Alexey Kardashevskiy)" * tag 'vfio-v4.0-rc4' of git://github.com/awilliam/linux-vfio: vfio-pci: Add missing break to enable VFIO_PCI_ERR_IRQ_INDEX
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds authored
Pull arm64 fixes from Catalin Marinas: - add TLB invalidation for page table tear-down which was missed when support for CONFIG_HAVE_RCU_TABLE_FREE was added (assuming page table freeing was always deferred) - use UEFI for system and reset poweroff if available - fix asm label placement in relation to the alignment statement * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: put __boot_cpu_mode label after alignment instead of before efi/arm64: use UEFI for system reset and poweroff arm64: Invalidate the TLB corresponding to intermediate page table levels
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Linus Torvalds authored
Merge tag 'linux-kselftest-4.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest Pull Kselftest fix from Shuah Khan: "selftests/exec: Check if the syscall exists and bail if not" * tag 'linux-kselftest-4.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest: selftests/exec: Check if the syscall exists and bail if not
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Jeff Layton authored
It's possible that "fl" won't point at a valid lock at this point, so use "victim" instead which is either a valid lock or NULL. Signed-off-by:
Jeff Layton <jeff.layton@primarydata.com>
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Ard Biesheuvel authored
Another one for the big head.S spring cleaning: the label should be after the .align or it may point to the padding. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Ard Biesheuvel authored
If UEFI Runtime Services are available, they are preferred over direct PSCI calls or other methods to reset the system. For the reset case, we need to hook into machine_restart(), as the arm_pm_restart function pointer may be overwritten by modules. Tested-by:
Mark Rutland <mark.rutland@arm.com> Reviewed-by:
Mark Rutland <mark.rutland@arm.com> Reviewed-by:
Matt Fleming <matt.fleming@intel.com> Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas authored
The ARM architecture allows the caching of intermediate page table levels and page table freeing requires a sequence like: pmd_clear() TLB invalidation pte page freeing With commit 5e5f6dc1 (arm64: mm: enable HAVE_RCU_TABLE_FREE logic), the page table freeing batching was moved from tlb_remove_page() to tlb_remove_table(). The former takes care of TLB invalidation as this is also shared with pte clearing and page cache page freeing. The latter, however, does not invalidate the TLBs for intermediate page table levels as it probably relies on the architecture code to do it if required. When the mm->mm_users < 2, tlb_remove_table() does not do any batching and page table pages are freed before tlb_finish_mmu() which performs the actual TLB invalidation. This patch introduces __tlb_flush_pgtable() for arm64 and calls it from the {pte,pmd,pud}_free_tlb() directly without relying on deferred page table freeing. Fixes: 5e5f6dc1 arm64: mm: enable HAVE_RCU_TABLE_FREE logic Reported-by:
Jon Masters <jcm@redhat.com> Tested-by:
Jon Masters <jcm@redhat.com> Tested-by:
Steve Capper <steve.capper@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- 13 Mar, 2015 1 commit
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds authored
Pull power management and ACPI fixes from Rafael Wysocki: "Just two fixes, one for an ACPI LPSS driver issue introduced during the 3.17 cycle and one revert of a recent commit that sort of broke the cpupower tool. Specifics: - Fix an ACPI LPSS (Low-Power Subsystem) driver issue causing the 8250_dw driver to confuse an LPSS clock with another one it is supposed to handle due to the lack of identification allowing it to tell those clocks apart (Heikki Krogerus). - Revert a recent commit that was supposed to improve the usability of the cpupower tool, but clearly did the opposite (Josh Boyer)" * tag 'pm+acpi-4.0-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: Revert "cpupower Makefile change to help run the tool without 'make install'" ACPI / LPSS: provide con_id for the clkdev
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