- 11 Dec, 2023 40 commits
-
-
Moudy Ho authored
Add compatible string and GCE property for MT8195 SPLIT, of which is operated by MDP3. Signed-off-by:
Moudy Ho <moudy.ho@mediatek.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
-
Moudy Ho authored
Add a compatible string for the OVL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by:
-
Moudy Ho authored
Add a compatible string for the MERGE block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by:
-
Moudy Ho authored
Add a compatible string for the COLOR block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by:
-
Moudy Ho authored
Add a compatible string for the AAL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
-
Moudy Ho authored
Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by:
-
Moudy Ho authored
Add the fundamental hardware configuration of component TCC, which is controlled by MDP3 on MT8195. Signed-off-by:
-
Moudy Ho authored
Add the fundamental hardware configuration of component STITCH, which is controlled by MDP3 on MT8195. Signed-off-by:
-
Moudy Ho authored
Add the fundamental hardware configuration of component HDR, which is controlled by MDP3 on MT8195. Signed-off-by:
-
Moudy Ho authored
Add the fundamental hardware configuration of component FG, which is controlled by MDP3 on MT8195. Signed-off-by:
AngeloGioacchino Del Regno <zangelogioacchino.delregno@collabora.com> Reviewed-by:
-
Moudy Ho authored
MT8195 WROT inherited from MT8183, add the corresponding compatible name to it. Signed-off-by:
-
Moudy Ho authored
MT8195 RSZ inherited from MT8183, add the corresponding compatible name to it. Signed-off-by:
-
Moudy Ho authored
Added the configuration for MT8195 RDMA. In comparison to MT8183, it no longer shares SRAM with RSZ, and there are now preconfigured 5 mbox. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Moudy Ho authored
To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by:
-
Moudy Ho authored
The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b396 ("media: dt-binding: mediatek: add bindings for MediaTek MDP3 components") Signed-off-by:
-
AngeloGioacchino Del Regno authored
The MDP3 RDMA needs to communicate with the SCP remote processor: allow specifying a phandle to a SCP core. Reviewed-by:
Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add a phandle to the MT8195_POWER_DOMAIN_MFG1 power domain and assign the GPU SRAM (vsram_others) supply to that in mt8195-cherry: this allows to keep the sram powered up while the GPU is used. This means that it's now possible to remove the regulator-always-on property from the mt6359_vsram_others_ldo_reg vreg, so that it will be switched on and off during suspend. Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Signed-off-by:
-
AngeloGioacchino Del Regno authored
MFG0 is the main power domain for the GPU and its surrounding glue logic, and has a specific power rail. Add its power supply on Cherry platforms and remove the now useless (and wrong) regulator-always-on property from the vbuck1 regulator. Tested-by:
-
Hsiao Chien Sung authored
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits. Reviewed-by:
Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by:
-
Hsiao Chien Sung authored
Add compatible name for MediaTek MT8188 VDOSYS1. Reviewed-by:
-
Hsiao Chien Sung authored
Padding is a new hardware module on MediaTek MT8188, add dt-bindings for it. Reviewed-by:
CK Hu <ck.hu@mediatek.com> Reviewed-by:
-
Hsiao Chien Sung authored
Add compatible name for MediaTek MT8188 MERGE. Reviewed-by:
-
Hsiao Chien Sung authored
Add compatible name for MediaTek MT8188 MDP-RDMA. Reviewed-by:
-
Hsiao Chien Sung authored
Add compatible name for MediaTek MT8188 ETHDR. Reviewed-by:
-
Rafał Miłecki authored
This helps validating DTS files. Introduced changes: 1. Improved title 2. Simplified description (dropped "This describes the device tree...") 3. Dropped undocumented "reset-names" from example Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Reviewed-by:
-
Hsin-Yi Wang authored
pico is also known as Acer Chromebook Spin 311. Signed-off-by:
Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by:
-
Hsin-Yi Wang authored
Add pico (sku1) and pico6 (sku2). Signed-off-by:
-
Hsin-Yi Wang authored
makomo is also known as Lenovo 100e Chromebook 2nd Gen MTK 2. Signed-off-by:
-
Hsin-Yi Wang authored
Add makomo sku0 and sku1 which uses different audio codec. Signed-off-by:
-
Hsin-Yi Wang authored
katsu is also known as ASUS Chromebook Detachable CZ1. Let katsu and kakadu set its own touchscreen and panel compatible. Remove these setting from the common dtsi for readability. Signed-off-by:
-
Hsin-Yi Wang authored
Add katsu sku32 and sku38 which uses different audio codec. Signed-off-by:
-
AngeloGioacchino Del Regno authored
MT6358 is a PMIC that is typically used on MT8183 boards, and it has its own dtsi file, declaring interrupts-extended on its node. The interrupt pin of that PMIC is connected to a SoC GPIO and that is therefore not only SoC-specific, but board-specific: this means that the interrupt-extended property does not belong to the PMIC dtsi file, but to board files using that PMIC. For correctness, transfer the interrupts-extended property from the PMIC-specific mt6358.dtsi to board files. Signed-off-by: -
AngeloGioacchino Del Regno authored
As already done for MT8173 and MT8183 devicetrees, change all instances of interrupt-parent + interrupts to one line as interrupts-extended where possible across all remaining device trees to both simplify and reduce code size. Signed-off-by: -
AngeloGioacchino Del Regno authored
Change all instances of interrupt-parent + interrupts to one line as interrupts-extended where possible across all MT8173 DTs to both simplify and reduce code size. Signed-off-by: -
AngeloGioacchino Del Regno authored
Change all instances of interrupt-parent + interrupts to one line as interrupts-extended where possible across all MT8183 DTs to both simplify and reduce code size. Signed-off-by: -
Mark Tseng authored
Support more SoC svs compatible in dt-bindings. 1. MT8186 2. MT8195 Signed-off-by:
Mark Tseng <chun-jen.tseng@mediatek.com> Acked-by:
-
yu-chang.lee authored
For MT8188, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be probed from mtk-mmsys driver to populate device by platform_device_register_data then start its own clock driver. Signed-off-by:
yu-chang.lee <yu-chang.lee@mediatek.com> Acked-by:
-
Balsam CHIHI authored
Add thermal nodes and thermal zones for the mt8192. The mt8192 SoC has several hotspots around the CPUs. Specify the targeted temperature threshold to apply the mitigation and define the associated cooling devices. Signed-off-by:
Balsam CHIHI <bchihi@baylibre.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> [bero@baylibre.com: cosmetic changes, reduce lvts_ap size] Signed-off-by:
Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-by:
-
Yunfei Dong authored
Add node for the hardware decoder present on the MT8183 SoC. Signed-off-by:
Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by:
Qianqian Yan <qianqian.yan@mediatek.com> Signed-off-by:
Frederic Chen <frederic.chen@mediatek.com> Signed-off-by:
Alexandre Courbot <acourbot@chromium.org> Signed-off-by:
-
Nícolas F. R. A. Prado authored
Remove the VDEC_SYS register space from the decoder, so that the node address becomes that of VDEC_MISC, solving the long-standing conflicting addresses between this node and the vdecsys clock-controller node: arch/arm64/boot/dts/mediatek/mt8173.dtsi:1365.38-1369.5: Warning (unique_unit_address_if_enabled): /soc/clock-controller@16000000: duplicate unit-address (also used in node /soc/vcodec@16000000) The driver makes use of this register space, however, so also add a phandle to the VDEC_SYS syscon to maintain functionality. Signed-off-by:
-
