1. 31 Jul, 2020 36 commits
  2. 22 Jul, 2020 4 commits
    • Greg Kroah-Hartman's avatar
      Linux 4.9.231 · 79193f36
      Greg Kroah-Hartman authored
      79193f36
    • Suraj Jitindar Singh's avatar
      x86/cpu: Move x86_cache_bits settings · 9e53463c
      Suraj Jitindar Singh authored
      This patch is to fix the backport of the upstream patch:
      cc51e542 x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+
      
      When this was backported to the 4.9 and 4.14 stable branches the line
      +       c->x86_cache_bits = c->x86_phys_bits;
      was applied in the wrong place, being added to the
      identify_cpu_without_cpuid() function instead of the get_cpu_cap()
      function which it was correctly applied to in the 4.4 backport.
      
      This means that x86_cache_bits is not set correctly resulting in the
      following warning due to the cache bits being left uninitalised (zero).
      
       WARNING: CPU: 0 PID: 7566 at arch/x86/kvm/mmu.c:284 kvm_mmu_set_mmio_spte_mask+0x4e/0x60 [kvm
       Modules linked in: kvm_intel(+) kvm irqbypass ipv6 crc_ccitt binfmt_misc evdev lpc_ich mfd_core ioatdma pcc_cpufreq dca ena acpi_power_meter hwmon acpi_pad button ext4 crc16 mbcache jbd2 fscrypto nvme nvme_core dm_mirror dm_region_hash dm_log dm_mod dax
       Hardware name: Amazon EC2 i3.metal/Not Specified, BIOS 1.0 10/16/2017
       task: ffff88ff77704c00 task.stack: ffffc9000edac000
       RIP: 0010:kvm_mmu_set_mmio_spte_mask+0x4e/0x60 [kvm
       RSP: 0018:ffffc9000edafc60 EFLAGS: 00010206
       RAX: 0000000000000000 RBX: 0000000000000000 RCX: 00000000ffffff45
       RDX: 000000000000002e RSI: 0008000000000001 RDI: 0008000000000001
       RBP: ffffffffa036f000 R08: ffffffffffffff80 R09: ffffe8ffffccb3c0
       R10: 0000000000000038 R11: 0000000000000000 R12: 0000000000005b80
       R13: ffffffffa0370e40 R14: 0000000000000001 R15: ffff88bf7c0927e0
       FS:  00007fa316f24740(0000) GS:ffff88bf7f600000(0000) knlGS:0000000000000000
       CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
       CR2: 00007fa316ea0000 CR3: 0000003f7e986004 CR4: 00000000003606f0
       DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
       DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
       Call Trace:
        kvm_mmu_module_init+0x166/0x230 [kvm
        kvm_arch_init+0x5d/0x150 [kvm
        kvm_init+0x1c/0x2d0 [kvm
        ? hardware_setup+0x4a6/0x4a6 [kvm_intel
        vmx_init+0x23/0x6aa [kvm_intel
        ? hardware_setup+0x4a6/0x4a6 [kvm_intel
        do_one_initcall+0x3e/0x15d
        do_init_module+0x5b/0x1e5
        load_module+0x19e6/0x1dc0
        ? SYSC_init_module+0x13b/0x170
        SYSC_init_module+0x13b/0x170
        do_syscall_64+0x67/0x110
        entry_SYSCALL_64_after_hwframe+0x41/0xa6
       RIP: 0033:0x7fa316828f3a
       RSP: 002b:00007ffc9d65c1f8 EFLAGS: 00000246 ORIG_RAX: 00000000000000af
       RAX: ffffffffffffffda RBX: 00007fa316b08849 RCX: 00007fa316828f3a
       RDX: 00007fa316b08849 RSI: 0000000000071328 RDI: 00007fa316e37000
       RBP: 0000000000b47e80 R08: 0000000000000003 R09: 0000000000000000
       R10: 00007fa316822dba R11: 0000000000000246 R12: 0000000000b46340
       R13: 0000000000b464c0 R14: 0000000000000000 R15: 0000000000040000
       Code: e9 65 06 00 75 25 48 b8 00 00 00 00 00 00 00 40 48 09 c6 48 09 c7 48 89 35 f8 65 06 00 48 89 3d f9 65 06 00 c3 0f 0b 0f 0b eb d2 <0f> 0b eb d7 0f 1f 40 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44
      
      Fixes: 4.9.x  ef3d45c9 x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+
      Fixes: 4.14.x ec403483 x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+
      Cc: stable@vger.kernel.org # 4.9.x-4.14.x
      Signed-off-by: default avatarSuraj Jitindar Singh <surajjs@amazon.com>
      Reviewed-by: default avatarSamuel Mendoza-Jonas <samjonas@amazon.com>
      Reviewed-by: default avatarFrank van der Linden <fllinden@amazon.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      9e53463c
    • Marc Zyngier's avatar
      irqchip/gic: Atomically update affinity · c50b30f3
      Marc Zyngier authored
      commit 005c34ae upstream.
      
      The GIC driver uses a RMW sequence to update the affinity, and
      relies on the gic_lock_irqsave/gic_unlock_irqrestore sequences
      to update it atomically.
      
      But these sequences only expand into anything meaningful if
      the BL_SWITCHER option is selected, which almost never happens.
      
      It also turns out that using a RMW and locks is just as silly,
      as the GIC distributor supports byte accesses for the GICD_TARGETRn
      registers, which when used make the update atomic by definition.
      
      Drop the terminally broken code and replace it by a byte write.
      
      Fixes: 04c8b0f8 ("irqchip/gic: Make locking a BL_SWITCHER only feature")
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      
      c50b30f3
    • Vincent Guittot's avatar
      sched/fair: handle case of task_h_load() returning 0 · 8b72b56b
      Vincent Guittot authored
      commit 01cfcde9 upstream.
      
      task_h_load() can return 0 in some situations like running stress-ng
      mmapfork, which forks thousands of threads, in a sched group on a 224 cores
      system. The load balance doesn't handle this correctly because
      env->imbalance never decreases and it will stop pulling tasks only after
      reaching loop_max, which can be equal to the number of running tasks of
      the cfs. Make sure that imbalance will be decreased by at least 1.
      
      misfit task is the other feature that doesn't handle correctly such
      situation although it's probably more difficult to face the problem
      because of the smaller number of CPUs and running tasks on heterogenous
      system.
      
      We can't simply ensure that task_h_load() returns at least one because it
      would imply to handle underflow in other places.
      Signed-off-by: default avatarVincent Guittot <vincent.guittot@linaro.org>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Reviewed-by: default avatarValentin Schneider <valentin.schneider@arm.com>
      Reviewed-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
      Tested-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
      Cc: <stable@vger.kernel.org> # v4.4+
      Link: https://lkml.kernel.org/r/20200710152426.16981-1-vincent.guittot@linaro.orgSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      
      8b72b56b