- 07 Nov, 2022 13 commits
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Dmitry Torokhov authored
When resetting the block, the reset line is being driven low and then high, which means that the line in DTS should be annotated as "active low". It will become important when wcd9335 driver will be converted to gpiod API that respects declared line polarities. Fixes: f3eb39a5 ("arm64: dts: db820c: Add sound card support") Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027074652.1044235-1-dmitry.torokhov@gmail.com
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Krzysztof Kozlowski authored
Based on downstream DTS, it seems that SM8450 QRD has microSD card slot. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Krzysztof Kozlowski authored
The HDK8450 has microSD card slot. Signed-off-by:
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Krzysztof Kozlowski authored
SDHCI on SM8450 HDK also has problems with SDR104/SDR50: mmc0: card never left busy state mmc0: error -110 whilst initialising SD card so I think it is safe to assume this issue affects all SM8450 boards. Move the quirk disallowing these modes to the SoC DTSI, to spare people working on other boards the misery of debugging this issue. Signed-off-by:
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Krzysztof Kozlowski authored
The SDHCI pin configuration/mux nodes are actually common to all upstreamed boards, so define them in SoC DTSI to reduce code duplication. Signed-off-by:
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Johan Hovold authored
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 07fa917a ("arm64: dts: qcom: sm8450: add ufs nodes") Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Signed-off-by:
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Johan Hovold authored
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 59c7cf81 ("arm64: dts: qcom: sm8350: Add UFS nodes") Signed-off-by:
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Johan Hovold authored
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: b7e2fba0 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") Signed-off-by:
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Johan Hovold authored
The sizes of the UFS PHY register regions are too small and does specifically not cover all registers used by the Linux driver. As Linux maps these regions as full pages this is currently not an issue on Linux, but let's update the sizes to match the vendor driver. Fixes: 3834a2e9 ("arm64: dts: qcom: sm8150: Add ufs nodes") Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Harry Austen authored
Add initial support for OnePlus 3 and 3T mobile phones. They are based on the MSM8996 SoC. Co-developed-by:
Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by:
Harry Austen <hpausten@protonmail.com> Signed-off-by:
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Harry Austen authored
Add compatible strings for the OnePlus 3 and 3T phones which utilise the Qualcomm MSM8996 SoC. Signed-off-by:
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Harry Austen authored
Add support for the sixth I2C interface on the MSM8996 SoC. Signed-off-by:
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- 06 Nov, 2022 27 commits
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Harry Austen authored
Use one-based indexing throughout the file for BLSP devices to avoid confusion. Most of the node names and labels are consistent already. This patch just fixes a few pinconf node names to match the one-based indexing used in the label names. Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by:
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Krzysztof Kozlowski authored
Pin configuration has no "input-high" property, so drop it from node described as Wifi host wake up pin. Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Merge subnodes named 'pinconf' and 'pinmux' into one entry, add function where missing (required by bindings for GPIOs) and reorganize overriding pins by boards. Split the SPI and UART configuration into separate nodes 1. SPI (MOSI, MISO, SCLK), SPI chip-select, SPI chip-select via GPIO, 2. UART per each pin: TX, RX and optional CTS/RTS. This allows each board to customize them easily without adding any new nodes. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Tested-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Krzysztof Kozlowski authored
arm64: dts: qcom: sc7180: revert "arm64: dts: qcom: sc7180: Avoid glitching SPI CS at bootup on trogdor" This reverts commit e440e30e because it is not a reliable way of fixing SPI CS glitch and it depends on specific Linux kernel pin controller driver behavior. This behavior of kernel driver was changed in commit b991f8c3 ("pinctrl: core: Handling pinmux and pinconf separately") thus effectively the DTS fix stopped being effective. Proper solution for the glitching SPI chip select must be implemented in the drivers, not via ordering of entries in DTS, and is already introduced in commit d21f4b7f ("pinctrl: qcom: Avoid glitching lines when we first mux to output"). Signed-off-by:
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Krzysztof Kozlowski authored
The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins ("sec_mi2s_active") and configures it to "mi2s_1" function. The Trogdor DTSI (which is included by Homestar) configures drive strength and bias for all "sec_mi2s_active" pins, thus the intention was to apply this configuration also to GPIO52 on Homestar. Reported-by: -
Krzysztof Kozlowski authored
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by:
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Krzysztof Kozlowski authored
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by:
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Krzysztof Kozlowski authored
Use SM6350 as fallback for GPI DMA, to indicate devices are compatible and that drivers can bind with only one compatible. Signed-off-by:
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Jami Kettunen authored
Enable the Round Robin ADC for the OnePlus 5/5T. Signed-off-by:
Jami Kettunen <jami.kettunen@somainline.org> Signed-off-by:
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Caleb Connolly authored
Enable the PMI8998 RRADC. Signed-off-by:
Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by:
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Caleb Connolly authored
Enable the Round Robin ADC for the db845c. Signed-off-by:
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Caleb Connolly authored
Enable the RRADC for the OnePlus 6. Signed-off-by:
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Caleb Connolly authored
Add a DT node for the Round Robin ADC found in the PMI8998 PMIC. Signed-off-by:
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Dzmitry Sankouski authored
New device support - Samsung S9 (SM-G9600) phone What works: - simple framebuffer - storage (both main and sdcard) - ramoops Signed-off-by:
Dzmitry Sankouski <dsankouski@gmail.com> Signed-off-by:
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Dzmitry Sankouski authored
Add samsung,starqltechn board (Samsung Galaxy S9) binding. Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects LPASS pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by:
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Krzysztof Kozlowski authored
The pull-down property is actually bias-pull-down. Fixes: 3160c1b8 ("arm64: dts: qcom: sm8250: add lpass lpi pin controller node") Signed-off-by:
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Krzysztof Kozlowski authored
DT schema expects LPASS pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by:
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Krzysztof Kozlowski authored
The LPASS pin-controller is not a clock provider: qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by:
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Marijn Suijten authored
In addition to PMIC-specific (pm6125) thermistors downstream extends this set with the rf-pa0/rf-pa1, quiet, camera-flash and UFS/eMMC thermistors in sm6125 (trinket) board and seine-specific DT files. All thermistors report sensible temperature readings in userspace. The sensors are also added to their respective Thermal Monitor node, with thermal zones to match where applicable: emmc-ufs and camera-flash are not available on the TM5 block, hence cannot be configured with a tripping point and will not have a thermal zone. Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
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Marijn Suijten authored
The Sony Xperia Seine board uses the PM6125; include it and configure the PON buttons that provide the power and volume-up key. Signed-off-by:
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Marijn Suijten authored
This PMIC is commonly used on boards with an SM6125 SoC and looks very similar in layout to the PM6150. Downstream declares more nodes to be available, but these have been omitted from this patch: the pwm/lpg block is unused on my reference device making it impossible to test/validate, and the spmi-clkdiv does not have a single device-tree binding using this driver yet, hence inclusion is better postponed until ie. audio which uses these clocks is brought up. Signed-off-by:
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Marijn Suijten authored
The register address in the node name is shadowing vph_pwr@83, whereas the ADC5_VCOIN register resolves to 0x85. Fix this copy-paste discrepancy. Fixes: 4bf09754 ("arm64: dts: qcom: pm660: Add VADC and temp alarm nodes") Signed-off-by:
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Marijn Suijten authored
Document support for the pm6125, typically paired with the sm6125 SoC. Signed-off-by:
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Dmitry Baryshkov authored
Change HDMI PHY node name from custom 'hdmi-phy' to the generic 'phy'. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
Document Google Cheza board compatibles recently added. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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