- 20 May, 2021 40 commits
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Alex Deucher authored
For decoding GPUVM page faults. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Chengming Gui authored
add general PSP support for beige_goby Signed-off-by:
Chengming Gui <Jack.Gui@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
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Chengming Gui authored
Use soft-pptable for beige_goby v2: fix format Signed-off-by:
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Chengming Gui authored
Add the function pointer. Signed-off-by:
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Chengming Gui authored
Add KFD support for beige_goby v2: fix asic name typo v3: squash in updates (Alex) v4: squash in needs_atomics fix (Alex) Signed-off-by:
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Chengming Gui authored
Rather than gpu info firmware. Signed-off-by:
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Chengming Gui authored
Same as dimgrey_cavefish to support WAIT_REG_MEM packet. Signed-off-by:
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Chengming Gui authored
Add virtual ip block for beige_goby Signed-off-by:
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Chengming Gui authored
The gfx version of beige_goby is 10.3, identical to sienna_cichlid, follow the way of sienna_cichlid Signed-off-by:
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Chengming Gui authored
Enable sdma block for beige_goby, same as sienna_cichlid v2: share the same setting of sdma instance num with vangogh Signed-off-by:
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Chengming Gui authored
Enable gfx block for beige_goby, same as dimgrey_cavefish Signed-off-by:
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Chengming Gui authored
Enable ih block for beige_goby, same as dimgrey_cavefish Signed-off-by:
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Chengming Gui authored
Enable gmc block for beige_goby, same as sienna_cichlid Signed-off-by:
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Chengming Gui authored
Same as dimgrey_cavefish v2: fix comments typo Signed-off-by:
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Chengming Gui authored
Same as dimgrey_cavefish Signed-off-by:
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Chengming Gui authored
Add ip offset definition for beige_goby and initialize it v2: squash in fixes (Alex) V3: fix permissions on file (Alex) Signed-off-by:
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Chengming Gui authored
Add external id and set clock gating for beige_goby Signed-off-by:
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Chengming Gui authored
Same as dimgrey_cavefish Signed-off-by:
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Chengming Gui authored
Add support for beige_goby cp/rlc firmware Signed-off-by:
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Chengming Gui authored
Same as navi series Signed-off-by:
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Chengming Gui authored
Use direct load for beige_goby Signed-off-by:
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Chengming Gui authored
Add chip type for beige_goby v2: fix enum count (Alex) Signed-off-by:
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Stylon Wang <stylon.wang@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Anthony Koo authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Wyatt Wood authored
[Why] Visual confirm will indicate if driver is programming the surface address. Refactor is required because much of the visual confirm logic is buried deep in the mpcc files. In addition, visual confirm is not updated during fast updates. [How] In order to have visual confirm for driver flips, visual confirm needs to be updated on every frame, including fast updates. Add a new hw sequencer interface update_visual_confirm_color, and a new mpc function pointer set_bg_color. v2: drop unused variable (Alex) Signed-off-by:
Wyatt Wood <wyatt.wood@amd.com> Reviewed-by:
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Nikola Cornij authored
[why] As per spec, DCN3.x can do 6:1 downscaling and DCN2.x can do 4:1. The max downscaling limit value for DCN2.x is 250, which means it's calculated as 1000 / 4 = 250. For DCN3.x this then gives 1000 / 6 = 167. [how] Set maximum downscaling limit to 167 for DCN3.x Signed-off-by:
Nikola Cornij <nikola.cornij@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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Wayne Lin authored
[Why] amdgpu_dm_crtc_set_crc_source() will call amdgpu_dm_crtc_configure_crc_source() to enable/disable CRC generation. However, configuration will be deferred to stream enabled. If stream is not enabled, current flow will still try to get/put vblank refcount. [How] Return EINVAL to skip actions on vblank refcount when stream is not enabled. Signed-off-by:
Wayne Lin <Wayne.Lin@amd.com> Reviewed-by:
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Zhan Liu authored
[Why] eDP version and DPCD revision are different. Per VESA spec, "The DPCD revision for eDP v1.4 is 13h". SUPPORTED_LINK_RATES is valid since eDP v1.4 (DPCD_REV_13). [How] Correct DPCD_REV for eDP v1.4. Signed-off-by:
Zhan Liu <zhan.liu@amd.com> Reviewed-by:
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Bhawanpreet Lakha authored
[Why] In some small modes (<200pixels) the stutter period is really big and will cause overflow. In these cases we shouldnt try to enable MALL as it will exceeds range of hysteresis timer (this can be seen in some IGT tests where the plane size is small) [How] Compare the stutter_period with the frame time and if we will overflow there is no point in trying to enable MALL (and see the ASSERT) so we early exist in this case Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Wayne Lin authored
[Why] Once set ROI and do suspend/resume, current flow will not enable OTG_CRC_CTL again due to we'll defer crc configuration when stream is enabled. [How] Remove current suspend/resume function and have logic implemented into amdgpu_dm_atomic_commit_tail() Signed-off-by:
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Wenjing Liu authored
[why] Some lttpr configuration steps are exclusive to 8b/10b channel coding mode. We need to take channel conding into account. Signed-off-by:
Wenjing Liu <wenjing.liu@amd.com> Reviewed-by:
George Shen <George.Shen@amd.com> Acked-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by:
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Wenjing Liu authored
[why] The function's name doesn't represent what it actaully does. The function implements necessary steps for our hardware to transition from link training mode back to video idle mode. Therefore, rename the function as dp_transition_to_video_idle so everyone can understand it. Signed-off-by:
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Wenjing Liu authored
[how] Rename initialize_training_settings to decide_training_settings. Call get link encoding format and decide training settings based on current channel coding. Signed-off-by:
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Wenjing Liu authored
[how] Implement a function that determines link encoding format based on the link settings passed in. Signed-off-by:
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Chris Park authored
[Why] Active DP dongles return no EDID when dongle is connected, but VGA display is taken out. Current driver behavior does not remove the active display when this happens, and this is a gap between dongle DTP and dongle behavior. [How] For active DP dongles and non-DP scenario, disconnect sink on detection when no EDID is read due to timeout. Signed-off-by:
Chris Park <Chris.Park@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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George Shen authored
[Why] Improve readability and maintainability of code. [How] Refactor test pattern size calculation out of function call parameter and store value in variable. Signed-off-by:
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Rodrigo Siqueira authored
During the investigation on how to add visual confirmation on top of the planes used by DCN, it becomes evident that the lack of information in the code makes this work unnecessarily complicated. This commit introduces a set of documentation related to the RECOUT operation in order to make it easy for developers to navigate this set of functions. Signed-off-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by:
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Rodrigo Siqueira authored
Signed-off-by:
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Rodrigo Siqueira authored
To improve the code readability, this commit removes a set of commented and not used functions for a long time. Notice that now we have the amdgpu_dm_dtn_log, which prints all the relevant information that we need. Signed-off-by:
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Rodrigo Siqueira authored
This commit introduces kernel documentation to some essential functions related to power gate control over planes. It also adds a macro to make one part of the code easy to understand. Signed-off-by:
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