Add BCM63xx USBH PHY driver for BMIPS.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Simon Arlott <simon@octiron.net>
Link: https://lore.kernel.org/r/20200720131209.1236590-3-noltari@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Document BCM63xx USBH PHY bindings.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200720131209.1236590-2-noltari@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

The mvneta hardware appears to lock up in various random ways when
repeatedly switching speeds between 1G and 2.5G, which involves
reprogramming the COMPHY.  It is not entirely clear why this happens,
but best guess is that reprogramming the COMPHY glitches mvneta clocks
causing the hardware to fail.  It seems that rebooting resolves the
failure, but not down/up cycling the interface alone.

Various other approaches have been tried, such as trying to cleanly
power down the COMPHY and then take it back through the power up
initialisation, but this does not seem to help.

It was finally noticed that u-boot's last step when configuring a
COMPHY for "SGMII" mode was to poke at a register described as
"GBE_CONFIGURATION_REG", which is undocumented in any external
documentation.  All that we have is the fact that u-boot sets a bit
corresponding to the "SGMII" lane at the end of COMPHY initialisation.

Experimentation shows that if we clear this bit prior to changing the
speed, and then set it afterwards, mvneta does not suffer this problem
on the SolidRun Clearfog when switching speeds between 1G and 2.5G.

This problem was found while script-testing phylink.

This fix also requires the corresponding change to DT to be effective.
See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching
speeds".

Fixes: 14dc100b ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.ukSigned-off-by: Vinod Koul <vkoul@kernel.org>

Update the Marvell Armada 38x COMPHY binding with an additional
optional register pair describing the location of an undocumented
system register controlling something to do with the Gigabit Ethernet
and COMPHY.  There is one bit for each COMPHY lane that may be using
the serdes, but exactly what this register does is completely unknown.

This register only appears to exist on Armada 38x devices, and not
other SoCs using the NETA ethernet block, so it seems logical that it
should be part of the COMPHY.

This is also how u-boot groups this register; it is dealt with as part
of the COMPHY initialisation there.

However, at the end of the day, due to the undocumented nature of this
register, we can only guess.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/E1jxtRZ-0003Ta-4h@rmk-PC.armlinux.org.ukSigned-off-by: Vinod Koul <vkoul@kernel.org>

Fix IS_ERR argument in samsung_ufs_phy_symbol_clk_init(). The proper
argument to be passed to IS_ERR() is phy->rx1_symbol_clk.

This bug was detected with the help of Coccinelle.

Fixes: bca21e93 ("phy: samsung-ufs: add UFS PHY driver for samsung SoC")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20200720132718.GA13413@embeddedorSigned-off-by: Vinod Koul <vkoul@kernel.org>

Document RZ/G2H (R8A774E1) SoC bindings.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

To avoid unexpected behaviors, it's better to exit if request_irq()
failed.
Suggested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-3-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

If CONFIG_DEBUG_SHIRQ was enabled, r8a77951-salvator-xs could boot
correctly. If we appended "earlycon keep_bootcon" to the kernel
command like, we could get kernel log like below.

    SError Interrupt on CPU0, code 0xbf000002 -- SError
    CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-salvator-x-00505-g6c843129e6faaf01 #785
    Hardware name: Renesas Salvator-X 2nd version board based on r8a77951 (DT)
    pstate: 60400085 (nZCv daIf +PAN -UAO BTYPE=--)
    pc : rcar_gen3_phy_usb2_irq+0x14/0x54
    lr : free_irq+0xf4/0x27c

This means free_irq() calls the interrupt handler while PM runtime
is not getting if DEBUG_SHIRQ is enabled and rcar_gen3_phy_usb2_probe()
failed. To fix the issue, move the irq registration place to
rcar_gen3_phy_usb2_init() which is ready to handle the interrupts.

Note that after the commit 549b6b55 ("phy: renesas: rcar-gen3-usb2:
enable/disable independent irqs") which is merged into v5.2, since this
driver creates multiple phy instances, needs to check whether one of
phy instances is initialized. However, if we backport this patch to v5.1
or less, we don't need to check it because such kernel have single
phy instance.
Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 9f391c57 ("phy: rcar-gen3-usb2: add runtime ID/VBUS pin detection")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-2-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Document dwc3 qcom phy hs and ss phy bindings needed to correctly
inizialize and use usb on ipq806x SoC.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200717131635.11076-2-ansuelsmth@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

This patch introduces Samsung UFS PHY driver. This driver
supports to deal with phy calibration and power control
according to UFS host driver's behavior.

[Robot: -Wmissing-prototypes and -Wsometimes-uninitialized]
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Kiwoong Kim <kwmad.kim@samsung.com>
Signed-off-by: Seungwon Jeon <essuuj@gmail.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Vinod Koul <vkoul@kernel.org>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://lore.kernel.org/r/20200716192217.35740-2-alim.akhtar@samsung.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

This patch documents Samsung UFS PHY device tree bindings
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://lore.kernel.org/r/20200716192217.35740-1-alim.akhtar@samsung.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Driver uses GPIO functions but doesn't include the header explcitly. Add
that to fix build errors when GPIOLIB is disabled.

drivers/phy/allwinner/phy-sun4i-usb.c:367:11: error: implicit
declaration of function ‘gpiod_get_value_cansleep’; did you mean
‘gpio_get_value_cansleep’? [-Werror=implicit-function-declaration]
drivers/phy/allwinner/phy-sun4i-usb.c:707:22: error: implicit
declaration of function ‘devm_gpiod_get_optional’; did you mean
‘devm_clk_get_optional’? [-Werror=implicit-function-declaration]
drivers/phy/allwinner/phy-sun4i-usb.c:708:11: error: ‘GPIOD_IN’
undeclared (first use in this function); did you mean ‘GPIOF_IN’?
drivers/phy/allwinner/phy-sun4i-usb.c:815:21: error: implicit
declaration of function ‘gpiod_to_irq’; did you mean ‘gpio_to_irq’?
[-Werror=implicit-function-declaration]
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20200716062427.71763-1-vkoul@kernel.org

devm_clk_get() and devm_reset_control_get() expect a const char *id for
the last arg, but a value of zero was provided. This results in below
sparse warning:

drivers/phy/st/phy-stm32-usbphyc.c:330:42: warning: Using plain integer as NULL pointer
drivers/phy/st/phy-stm32-usbphyc.c:343:52: warning: Using plain integer as NULL pointer

Instead of zero, use NULL
Reviewed-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/20200708132809.265967-6-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

We get warning with W=1 build:
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'phys' not described in 'exynos5_usbdrd_phy'
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'vbus' not described in 'exynos5_usbdrd_phy'
drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function
parameter or member 'vbus_boost' not described in 'exynos5_usbdrd_phy'

These members are provided with description but format is not quite
right resulting in above warnings
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200708132809.265967-5-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

We get warning with W=1 build:
drivers/phy/rockchip/phy-rockchip-typec.c:360: warning: cannot
understand function prototype: 'struct rockchip_usb3phy_port_cfg '

The 'struct rockchip_usb3phy_port_cfg ' is commented properly but uses
wrong format, so fix that up

Link: https://lore.kernel.org/r/20200708132809.265967-4-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

We get warning with W=1 build:
drivers/phy/phy-xgene.c: In function ‘xgene_phy_xlate’:
drivers/phy/phy-xgene.c:1618:20: warning: comparison of unsigned
expression in ‘< 0’ is always false [-Wtype-limits]
 1618 |  if (args->args[0] < MODE_SATA || args->args[0] >= MODE_MAX) |

args is uint32_t so can never be less than zero, so remove this check

Link: https://lore.kernel.org/r/20200708132809.265967-3-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

We get warning with W=1 build:
drivers/phy/motorola/phy-mapphone-mdm6600.c:185: warning: Function
parameter or member 'val' not described in 'phy_mdm6600_cmd'
drivers/phy/motorola/phy-mapphone-mdm6600.c:200: warning: Function
parameter or member 'work' not described in 'phy_mdm6600_status'

Fix that by adding description for 'val' and 'work'

Link: https://lore.kernel.org/r/20200708132809.265967-2-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

We get warning with W=1 build:
drivers/phy/marvell/phy-mvebu-a3700-utmi.c:84: warning: Function
parameter or member 'usb_misc' not described in 'mvebu_a3700_utmi'

Fix that by correcting the typo usb_mis

Link: https://lore.kernel.org/r/20200708132809.265967-1-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

PHY calibration is needed only for USB2.0 (UTMI) PHY, so skip calling
calibration code when phy_calibrate() is called for USB3.0 (PIPE3) PHY.

Fixes: d8c80bb3 ("phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200708133800.3336-1-m.szyprowski@samsung.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

The usb3-hsphy for PXs3 SoC needs to accept 3 clocks like usb3-ssphy.

Fixes: 134ab284 ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1594198664-29381-1-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

When CONFIG_ARCH_SUNXI is not set but CONFIG_COMPILE_TEST=y,
CONFIG_HAVE_CLK=y, CONFIG_HAVE_LEGACY_CLK=y, there exists
the following build errors with CONFIG_PHY_SUN6I_MIPI_DPHY=y:

drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_init':
phy-sun6i-mipi-dphy.c:(.text+0x320): undefined reference to `clk_set_rate_exclusive'
drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function `sun6i_dphy_exit':
phy-sun6i-mipi-dphy.c:(.text+0x2c8): undefined reference to `clk_rate_exclusive_put'

clk_set_rate_exclusive() and clk_rate_exclusive_put() are defined
in drivers/clk/clk.c, this file is built under CONFIG_COMMON_CLK,
so in order to build drivers/phy/allwinner/phy-sun6i-mipi-dphy.c
successful used with various configs, CONFIG_PHY_SUN6I_MIPI_DPHY
should depend on CONFIG_COMMON_CLK.

Fixes: 133552bf ("phy: Remove CONFIG_ARCH_* check for related subdir in Makefile")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1594113746-25393-1-git-send-email-yangtiezhu@loongson.cnSigned-off-by: Vinod Koul <vkoul@kernel.org>

It fixes RX detect wakeup using USB3 device, otherwise, the USB3
device can't wakeup USB PHY when the PHY is in 32Khz clock.

Fixes: 50d35aa8 ("phy: cadence: salvo: add salvo phy driver")
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Link: https://lore.kernel.org/r/20200703064600.14181-1-peter.chen@nxp.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

sun6i_dphy_ops and sun6i_dphy_regmap_config are not modified so make them
const structs to allow the compiler to put them in read-only memory.

Before:
   text    data     bss     dec     hex filename
   4407    1944      64    6415    190f drivers/phy/allwinner/phy-sun6i-mipi-dphy.o

After:
   text    data     bss     dec     hex filename
   4835    1496      64    6395    18fb drivers/phy/allwinner/phy-sun6i-mipi-dphy.o
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20200629195727.9717-1-rikard.falkeborn@gmail.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

ti_pipe3_power_on() sets variable 'ret' but never uses it, so remove it.

drivers/phy/ti/phy-ti-pipe3.c:340:6: warning: variable ‘ret’ set but not
used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-4-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

dm816x_usb_phy_init() sets variable 'error' but never uses it, so remove
it.

drivers/phy/ti/phy-dm816x-usb.c:85:6: warning: variable ‘error’ set but
not used [-Wunused-but-set-variable]

Link: https://lore.kernel.org/r/20200629145010.122675-3-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Some function arguments are missing from documentation prompting
validation kernel doc script to complain:

drivers/phy/phy-core.c:1078: warning: Function parameter or member
'children' not described in '__devm_of_phy_provider_register'
drivers/phy/phy-core.c:1125: warning: Function parameter or member
'phy_provider' not described in 'devm_of_phy_provider_unregister'

Add the documentation for these

Link: https://lore.kernel.org/r/20200629145010.122675-2-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Documentation/process/coding-style.rst says:
"functions: they have the opening brace at the beginning of the next
line"

devm_of_phy_provider_unregister() function has opening brace at same
line, so fix it up.

Link: https://lore.kernel.org/r/20200629145010.122675-1-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

The UFS specific QMP PHY driver started off supporting the 14nm and
20nm hardware. With the 20nm support marked broken for a long time and
the 14nm support added to the common QMP PHY, this driver has not been
used in a while. So delete it
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200629145452.123035-1-vkoul@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Mark xpsgtr_suspend and xpsgtr_resume as __maybe_unused to fix the
following compiler warning when building with !CONFIG_PM_SLEEP:

drivers/phy/xilinx/phy-zynqmp.c:830:12: warning: ‘xpsgtr_resume’ defined but not used [-Wunused-function]
  830 | static int xpsgtr_resume(struct device *dev)
      |            ^~~~~~~~~~~~~
drivers/phy/xilinx/phy-zynqmp.c:819:12: warning: ‘xpsgtr_suspend’ defined but not used [-Wunused-function]
  819 | static int xpsgtr_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~

Also drop the existing #ifdef CONFIG_PM so the functions are always
compile-checked regardless of CONFIG_PM and/or CONFIG_PM_SLEEP being
set.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Link: https://lore.kernel.org/r/20200701141017.26931-1-tklauser@distanz.chSigned-off-by: Vinod Koul <vkoul@kernel.org>

The DT examples are by default compiled in a parent that has
 #address-cells and #size-cells both set to 1. Fix the example
accordingly, even if it doesn't match the actual hardware, as this is
the recommended practice for DT bindings examples.

Fixes: cea0f76a ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY")
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200701134853.30656-1-laurent.pinchart@ideasonboard.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the
high speed peripherals such as USB, SATA, PCIE, Display Port and
Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This
patch adds driver for that ZynqMP GT core.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200629120054.29338-2-laurent.pinchart@ideasonboard.comSigned-off-by: Vinod Koul <vkoul@kernel.org>

The set mode handler is used to keep track of the current role of the
device.  This is used for enabling certain resources within the PHY
depending on if the device is behaving as a host or device.
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lore.kernel.org/r/20200625195444.15130-3-wcheng@codeaurora.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Allow for the PHY to be put into a powered down state when possible.
Add the required suspend and resume callbacks, which will determine
what resources can be turned off depending on the cable status.
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Link: https://lore.kernel.org/r/20200625195444.15130-2-wcheng@codeaurora.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Add both the DP and UNI PHY for primary/secondary usb controllers.

The tables are very similar to sm8150 (serdes_tbl is identical), but there
are some differences.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-4-jonathan@marek.caSigned-off-by: Vinod Koul <vkoul@kernel.org>

Add support for the USB3 PHY used by the secondary usb controller on sm8150
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-3-jonathan@marek.caSigned-off-by: Vinod Koul <vkoul@kernel.org>

The primary USB PHY on sm8250 sets some values differently for the second
lane. This makes it possible to represent that.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200524021416.17049-2-jonathan@marek.caSigned-off-by: Vinod Koul <vkoul@kernel.org>