- 07 Jul, 2016 35 commits
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Tom St Denis authored
Must wait for SERDES idle before exiting RLC SAFEMODE Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This implements mclk OverDrive(OD) through sysfs. The new entry pp_mclk_od is read/write. The value of input/output is an integer of the overclocking percentage. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
This patch makes powercontainment feature configurable. Currently, the powercontainment is not very stable, so add a module parameter to enable/disable it via user mode. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Remove the job reference counting and just properly destroy it from a work item which blocks on any potential running timeout handler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Otherwise the locking becomes rather confusing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
The driver shouldn't mess with the scheduler internals. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Remembering the code path in a variable to cleanup differently is usually not a good idea at all. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Ther should be a new line between code and decleration. Also use amdgpu_ib_free() instead of releasing the member manually. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
No need for double housekeeping here. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Completely pointless and confusing to use a callback to call into the same code file. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
v2: fix even more Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This extends OD (OverDrive) support to the non-Powerplay code paths. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This extends dpm clock level selection to the non-powerplay code paths. This interface can be used to select individual clock levels. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Tom St Denis authored
Based on Alex's patches this enables GFX PG on CZ. Tested with xonotic-glx/glxgears/supertuxkart and idle desktop. Also read-back registers via umr for verificiation that the bits are truly enabled. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Fix the logic for enabling/disabling. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This implements powergating support for CZ/ST asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add some new GFX powergating flags. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
So they can be shared with other asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This sets up the CP jump table and GDS buffer and sets the PG state registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The size needs to handle the CP JT and GDS. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The size needs to handle the CP JT and GDS. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This implements sclk overdrive(OD) overclocking support for Polaris10, and the maximum overdrive percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This implements sclk overdrive(OD) overclocking support for Tonga, and the maximum overdrive percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
This implements sclk overdrive(OD) overclocking support for Fiji, and the maximum overdrive percentage is 20. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Eric Huang authored
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking, the entry is read/write, the value of input/output is an integer which is the over percentage of the highest sclk. v2: drop extra semicolon Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The power tables on some variants require different firmware. This may fix stability issues on some newer CI parts. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91880Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The power tables on some variants require different firmware. This may fix stability issues on some newer SI parts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The power tables on some variants require different firmware. This fixes stability issues on some newer CI parts. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91880Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Monk Liu authored
This help fix reloading driver hang issue of SDMA ring. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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- 04 Jul, 2016 1 commit
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Dave Airlie authored
Merge tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into drm-next ASoC: Add private data for HDMI CODEC callbacks Allow the HDMI CODECs to get private data passed in in callbacks. [airlied: Add STI/mediatek patches from Arnd for drivers merged later in drm tree.] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Dave Airlie <airlied@redhat.com> * tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound: ASoC: hdmi-codec: callback function will be called with private data
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- 02 Jul, 2016 3 commits
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http://git.agner.ch/git/linux-drm-fsl-dcuDave Airlie authored
The patchset contains a new helper in drm_fb_cma_helper.c for suspend/ resume when using cma backed framebuffers. * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: disable vblank events on CRTC disable drm/fsl-dcu: implement suspend/resume using atomic helpers drm/fsl-dcu: use clk helpers drm/fsl-dcu: move layer initialization to plane file drm/fsl-dcu: store layer registers in soc_data drm/fb_cma_helper: add suspend helper
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Dave Airlie authored
Linux 4.7-rc5 The fsl-dcu pull needs -rc3 so go to -rc5 for now.
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Dave Airlie authored
Merge branch 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaignard/kernel into drm-next This pull request include 3 minors fix and one feature evolution around ASoC hdmi codec support. * 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaignard/kernel: drm: sti: Add ASoC generic hdmi codec support. drm/sti: adjust delay for AWG drm: sti: fix clocking issues in crtc drm/sti: Use 64-bit timestamps
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- 01 Jul, 2016 1 commit
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Arnaud Pouliquen authored
Add the interface needed by audio hdmi-codec driver. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
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