- 20 May, 2010 40 commits
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Benoit Cousson authored
The MPU subsystem was named based on internal code name (CHIRON). This patch will remove all the occurences of the chiron name are replace it with PRCM_MPU in order to differentiate the MPU local PRCM to the global one. Remove PDA_ from PRCM_MPU registers names to stick to the global PRM naming convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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Benoit Cousson authored
The automatic HW restore from OFF mode is not functional at all in OMAP4430 ES1.0. Because of that, it will be extensively changed in the next Si revision, and the compatibilty will not be maintained with ES1.0. Remove the current XXX_RESTORE registers definition to avoid future conflicts with the next Si revision. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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Benoit Cousson authored
Most of the clock nodes belong to a clock domain, but it is perfectly valid to have clock without clock domain. Root clocks for example does not belong to any clock domain. Keep the warning but reduce the verbosity. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
In the lastest OMAP4 hwmod data file, the _hwmod was removed in order to save some memory space and because it does not bring a lot. The same cleanup will be have to done for other hwmods in OMAP2 & 3 data files. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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Benoit Cousson authored
During the _init_clocks phase, the iteration is stopped but the status is still change from _HWMOD_STATE_REGISTERED to _HWMOD_STATE_CLKS_INITED. Since the _setup phase will be done nevertheless, it might be better to keep initializing the others clocks nodes and just keep the warning. It is much easier to debug when a important number of clocks name are wrong during the early debug phase of a new platform. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
The WARN is a little bit too verbose and is not providing usefull information in that case. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
The previous clock API was returning a standard linux error code in case of failure. This is not the case anymore with the new omap_clk_get_by_name API. A NULL value means that the clock node does not exist. Replace all the IS_ERR check by a !clk check. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
The iteration is currently done on the omap_hwmod_ocp_if pointer and not on the table pointer that reference them. It worked most of the time because the structure are contiguous in memory. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
Some initiator modules in OMAP2 & 3 does not have IDLEST bit, in that case we cannot detect the module readiness by polling that bit and must exist the function immediately assuming that the module is ready. The previous flag was affected to the OCP interface. While it is technically true that the idlest is related to the L4 slave interface of the module, the PRCM status belong to the module. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
The return of the omap4_cm_wait_module_ready function is checked in order to avoid accessing the sysconfig register if the module is not in the correct state. In that case the _setup will exit without trying to reset using sysconfig. For the moment a warning is printed. A proper management of fclk and module reset will have to be done in order to init correctly the problematic IPs listed below. <4>omap_hwmod: ivahd: cannot be enabled (3) <4>omap_hwmod: iss: cannot be enabled (3) <4>omap_hwmod: tesla: cannot be enabled (3) <4>omap_hwmod: sdma: cannot be enabled (3) <4>omap_hwmod: sl2: cannot be enabled (3) <4>omap_hwmod: sad2d: cannot be enabled (3) <4>omap_hwmod: ducati: cannot be enabled (3) Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
The maximum timeout to wait for the PRCM to request that a module exit idle or reach functionnal state is common to OMAP2/3/4 SoCs, so, move it to the chip family-common cm.h include file. Reduce the timeout from 20 ms to 2 ms. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
Accessing the clkctrl register using offset of module & device is hard to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located in the address space. There is no common base address anymore for all the CM registers. The easiest way to handle that on OMAP4 is to provide the absolute address of the XXX_CLKCTRL register per hwmod. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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Paul Walmsley authored
Clean up comment style, remove unnecessary includes, and resolve some checkpatch warnings in plat-omap/clock.c. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Commit 678bc9a2 split dpll4_m2_ck, creating a 34xx and a 36xx variant, to handle the additional 16 divider steps provided on the 36xx. This in turn required dynamic rewriting of the clock tree during initialization, which is undesirable. All this seems to be unnecessary, though, since the additional 16 divider steps can simply be marked with RATE_IN_36XX. This patch does so and re-merges the affected structures. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
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Paul Walmsley authored
Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect that these rates are valid on all OMAP3 platforms, not just 343X. Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all OMAP3 platforms after 3430ES2. This patch should not result in any functional changes. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
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Paul Walmsley authored
This patch cleans up arch/arm/mach-omap2/clkt_clksel.c. It: - makes several functions static that are not called outside the file; - adds documentation; - makes some code paths easier to read (hopefully), by breaking up compound statements and removing redundant checks; - converts some pr_err()s that indicate clock tree data problems into WARN()s, so they are more likely to be noticed; - and moves omap2_clk_round_rate() back into mach-omap2/clock.c, its proper home, since it is not clksel-specific. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set on some of the lowest divisors, which, when switching to a much higher-rate parent, could have potentially resulted in rates that exceeded the hardware specifications for downstream clocks in the window between the clk_set_parent(), and a subsequent clk_set_rate(). It seems much safer to just remove the flag and always use the highest available divisor (resulting in the lowest possible rate) after the switch, and this patch does so. Ideally, it would be best to first attempt to switch to a divisor that matches the clock's rate with the previous parent, if at all possible. But that is a project for some other day or some other person. The parent changing code is rarely used. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros, to match the TRM and guard against inadvertent error. This patch should not cause any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
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Paul Walmsley authored
Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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Paul Walmsley authored
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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Paul Walmsley authored
Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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Felipe Balbi authored
remove the section annotation from omap1_clk_disable_unused() to kill the section mismatch warning. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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stanley.miao authored
There are three i2c buses on am3517, and each i2c bus has several devices on it, so we can't name the i2c boardinfo structures with one of these devices. In order to make it more readable, now rename these three boardinfo structures based on i2c indexes. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Acked-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Charulatha V authored
Access to some of the OMAP4 GPIO registers are not properly handled. This patch fixes it. This patch is tested on 3430SDP and 4430SDP boards Signed-off-by: Charulatha V <charu@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Santosh Shilimkar authored
This patch moves OMAP4 soc specific code from 4430sdp board file. The change is necessary so that newer board support can be added with minimal changes. This will be also problematic for multi-board, multi-omap builds. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Abraham Arce authored
Enable KS8851 SPI support + Networking Support - Packet Socket - TCP/IP Network Filesystems - NFS Client - Root Filesystem on NFS Signed-off-by: Abraham Arce <x0066660@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Abraham Arce authored
Enable Micrel KS8851 SPI network chip for OMAP4430 Signed-off-by: Abraham Arce <x0066660@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Syed Rafiuddin authored
Change dependency to ARCH_OMAP2PLUS to allow systems based on omap24xx, omap34xx or omap44xx Cc: spi-devel-general@lists.sourceforge.net Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com> Signed-off-by: Abraham Arce <x0066660@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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stanley.miao authored
AM3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators like "vmmc", so we set a noop "set_power" function for it. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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stanley.miao authored
There is two gpio for mmc use, one is for card detecting, another is used for checking write protect. Intialize its pinmux in case the bootloader doesn't set it. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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manjugk manjugk authored
Multi line comments are fixed as per CodingStyle guidelines. Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mika Westerberg authored
If we are softbooting another kernel using kexec, DMA controller state is not known when we are performing omap_init_dma(). It is possible that some DMA channels are already active. For example after kexec we get: <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 To prevent any weird things happening, we disable all channel interrupts during init. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
The SDI Display subsystem needs access to the vdds_sdi supply regulator. This is TWL4030's VAUX1 supply on RX-51. Signed-off-by: Roger Quadros <roger.quadros@nokia.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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Tony Lindgren authored
Merge branch 'pm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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Tony Lindgren authored
Merge branch 'gpio-2.6.35' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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Tony Lindgren authored
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Janusz Krzysztofik authored
The patch adds a CONFIG directive required for supporting the Amstrad Delta connected external keyboard by default. Created and tested against linux-omap master, commit 104a77440f05430f29f9d3f4ecb88c1536819585 dated 2010-04-27. Works on top of PATCH v4 4/5(7), "input: serio: add support for Amstrad Delta serial keyboard port". Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ajay Kumar Gupta authored
EHCI port on UI card and LCD share two pins (GPIO 181 and 182) thus they have to be mutually exclusive. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Jarkko Nikula authored
Upcoming change to tlv320aic3x codec driver require four supplies. Implement this by connecting analogic supplies to TWL4030 VMMC2 and digital supplies to TWL4030 VIO. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Cc: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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