- 21 Sep, 2020 5 commits
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Dan Murphy authored
Add the TAS2564 compatible and data sheet link to the binding. Signed-off-by:
Dan Murphy <dmurphy@ti.com> Link: https://lore.kernel.org/r/20200918150130.21015-1-dmurphy@ti.comSigned-off-by:
Mark Brown <broonie@kernel.org>
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Kai Vehmanen authored
Fix build warning: WARNING: modpost: missing MODULE_LICENSE() in sound/soc/sof/imx/imx-common.o Fixes: 18ebffe4 ("ASoC: SOF: imx: Add debug support for imx platforms") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by:
Daniel Baluta <daniel.baluta@gmail.com> Reviewed-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200921104746.2903507-1-kai.vehmanen@linux.intel.comSigned-off-by:
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Daniel Baluta authored
On i.MX platforms PM is not managed via ACPI although CONFIG_ACPI can be set. So, in order to correctly set the system target state we introduce a flag for platforms that require to use acpi target states. Signed-off-by:
Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by:
Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by:
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Guillermo Rodríguez authored
Add volume controls for: - Analog programmable gain amplifier (PGA) (-3 .. +12 dB) - ADC attenuator (0 .. -96 dB) Signed-off-by:
Guillermo Rodríguez <guille.rodriguez@gmail.com> Acked-by:
David Rhodes <David.rhodes@cirrus.com> Link: https://lore.kernel.org/r/20200918134317.22574-1-guille.rodriguez@gmail.comSigned-off-by:
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Keyon Jie authored
In commit 783898ce ("ASoC: SOF: append extended data to sof_ipc_comp_process") the process components are set to run on the fixed core 0, this break us from scheduling components on any other DSP core. Since we can get the DSP core index from swidget->core, it is duplicated to pass the extra 'core' argument for those sof_widget_load_xx() functions. Here removes the duplicate 'core' argument and get component core from swidget->core directly to fix the issue mentioned above. Fixes: 783898ce ("ASoC: SOF: append extended data to sof_ipc_comp_process") Signed-off-by:
Keyon Jie <yang.jie@linux.intel.com> Reviewed-by:
Jaska Uimonen <jaska.uimonen@intel.com> Reviewed-by:
Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Reviewed-by:
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- 18 Sep, 2020 2 commits
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Camel Guo authored
Add support to configure the GPIO pin to the specific configuration. The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN, GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output drive can be configured with various configuration. Signed-off-by:
Camel Guo <camelg@axis.com> Link: https://lore.kernel.org/r/20200918114025.18205-2-camel.guo@axis.comSigned-off-by:
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Camel Guo authored
Add properties for configuring the General Purpose Input Output (GPIO). There are 2 settings for GPIO, configuration and the output drive type. Signed-off-by:
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- 17 Sep, 2020 32 commits
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Mark Brown authored
As sai ip is upgraded, so update sai register list. Shengjiu Wang (3): ASoC: fsl_sai: Add new added registers and new bit definition ASoC: fsl_sai: Add fsl_sai_check_version function ASoC: fsl_sai: Set MCLK input or output direction changes in v2: - update commit message for first commit - Add acked-by Nicolin sound/soc/fsl/fsl_sai.c | 77 ++++++++++++++++++++++++++++++++++++ sound/soc/fsl/fsl_sai.h | 87 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 164 insertions(+) -- 2.27.0
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Mark Brown authored
Series that adds debug support for IMX platforms, more details to FW version information, adds missing -EACCESS handling to pm_runtime_get_sync() calls and a set of minor cosmetic, trace verbosity and coding style issues. Guennadi Liakhovetski (3): ASoC: SOF: (cosmetic) remove redundant "ret" variable uses ASoC: SOF: remove several superfluous type-casts ASoC: SOF: fix range checks Iulian Olaru (1): ASoC: SOF: imx: Add debug support for imx platforms Karol Trzcinski (1): ASoC: SOF: Add `src_hash` to `sof_ipc_fw_version` structure Pierre-Louis Bossart (3): ASoC: SOF: debug: update test for pm_runtime_get_sync() ASoC: SOF: control: update test for pm_runtime_get_sync() ASoC: SOF: Intel: hda: reduce verbosity of boot error logs include/sound/sof/info.h | 4 +- sound/soc/sof/control.c | 62 +++++++++++++-------------- sound/soc/sof/debug.c | 2 +- sound/soc/sof/imx/Kconfig | 8 ++++ sound/soc/sof/imx/Makefile | 3 ++ sound/soc/sof/imx/imx-common.c | 72 ++++++++++++++++++++++++++++++++ sound/soc/sof/imx/imx-common.h | 16 +++++++ sound/soc/sof/imx/imx8.c | 23 +++++++++- sound/soc/sof/imx/imx8m.c | 17 +++++++- sound/soc/sof/intel/hda-loader.c | 16 +++---- sound/soc/sof/intel/hda.c | 12 ++++-- sound/soc/sof/intel/hda.h | 2 + sound/soc/sof/sof-audio.c | 6 +-- sound/soc/sof/sof-priv.h | 8 ++++ sound/soc/sof/topology.c | 44 ++++++++++--------- 15 files changed, 226 insertions(+), 69 deletions(-) create mode 100644 sound/soc/sof/imx/imx-common.c create mode 100644 sound/soc/sof/imx/imx-common.h -- 2.27.0
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Mark Brown authored
Merge series "ASoC: q6afe: add clocks support" from Srinivas Kandagatla <srinivas.kandagatla@linaro.org>: q6afe already exposes clocks using apis, but not as proper clock controller driver. This patch puts those clocks in to a proper clock controller so that other drivers that depend on those clocks can be properly expressed. Srinivas Kandagatla (2): ASoC: q6afe: dt-bindings: add q6afe clock bindings ASoC: q6afe-clocks: add q6afe clock controller .../devicetree/bindings/sound/qcom,q6afe.txt | 23 ++ include/dt-bindings/sound/qcom,q6afe.h | 74 ++++- sound/soc/qcom/Kconfig | 4 + sound/soc/qcom/qdsp6/Makefile | 1 + sound/soc/qcom/qdsp6/q6afe-clocks.c | 270 ++++++++++++++++++ 5 files changed, 371 insertions(+), 1 deletion(-) create mode 100644 sound/soc/qcom/qdsp6/q6afe-clocks.c -- 2.21.0
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Shengjiu Wang authored
Ak4458 can't support DSD512 format, but ak4497 can, so add a new enum variable (enum ak4458_type) in ak4458_drvdata to distinguish these two platforms. Ak4497 has two kinds of DSD input pin, it can be selected by the dsd-path property from DT. In hw_params(), bit clock is calculated according to different DSD format (DSD64, DSD128, DSD256, DSD512), then registers are configured. Signed-off-by:
Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1600178220-28973-2-git-send-email-shengjiu.wang@nxp.comSigned-off-by:
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Shengjiu Wang authored
Add "dsd-path" property, which is used for ak4497 codec to select the DSD input pin. Signed-off-by:
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Dan Murphy authored
Add a property to indicate if the device is to go into a High-z state on the Tx ASI output pins when the device is idle. Signed-off-by:
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Dan Murphy authored
Add code to allow the ASI Tx output to be placed into High-z mode during unused ASI cycles. This allows for other devices that may be on the bus to drive the ASI out. By default the 320adcx140 sends 0's for unused cycles. Signed-off-by:
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Douglas Anderson authored
The lpass-sc7180 driver can be built as a module but is lacking a MODULE_DEVICE_TABLE. This means it won't auto-load. Fix this oversight. Fixes: 24caf8d9 ("ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio") Signed-off-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200916111545.1.I4c3758817d94c433bafeac344a395e21ea6657e3@changeidSigned-off-by:
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Rander Wang authored
SOF will support tgl-h and tgl-lp in different FW binaries due to hardware difference, so create another dev_desc entry with FW name of sof-tgl-h.ri and dsp_desc named tglh_chip_info for tgl-h. Fixes: c8d2e2bf ("ASoC: SOF: Intel: add PCI IDs for ICL-H and TGL-H") Signed-off-by:
Rander Wang <rander.wang@intel.com> Reviewed-by:
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Matthias Schiffer authored
To avoid the actual PLL settings to differ from the state expected by the clock driver, the codec should only be fully reset before the clocks are registered. But we also need to ensure that the software reset happens at all before clock registration, as not all boards have a reset GPIO. Move the software reset from aic32x4_component_probe() to aic32x4_probe() and reorder the reset and registration sequence: 1. Reset via GPIO (if available) 2. Reset via software 3. Register component 4. Register clocks Note that aic32x4_component_probe() is only called after aic32x4_probe() has finished, so the reset in aic32x4_component_probe() was happening too late. Signed-off-by:
Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20200902133043.19504-2-matthias.schiffer@ew.tq-group.comSigned-off-by:
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Matthias Schiffer authored
The regulators need to be disabled in the aic32x4_register_clocks() failure case as well. Fixes: 9d4befff ("ASoC: codec: tlv3204: Moving GPIO reset and add ADC reset") Signed-off-by:
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Krzysztof Kozlowski authored
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted some logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200908145954.4629-1-krzk@kernel.orgSigned-off-by:
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Krzysztof Kozlowski authored
The common pattern for enumerating compatibles is enum, not oneOf. Signed-off-by:
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Mark Brown authored
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Shengjiu Wang authored
SAI support select MCLK direction with version.major > 3 and version.minor > 1, the default direction is input, set it to be output according to DT property. Signed-off-by:
Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1600323079-5317-4-git-send-email-shengjiu.wang@nxp.comSigned-off-by:
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Shengjiu Wang authored
fsl_sai_check_version can help to parse the version info in VERID and PARAM registers. Signed-off-by:
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Shengjiu Wang authored
On i.MX8MQ/i.MX8MN/i.MX8MM platform, the sai IP is upgraded. There are some new registers and new bit definition. This patch is to complete the register list. Signed-off-by:
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Srinivas Kandagatla authored
q6afe already exposes lpass clocks, however this was not presented as proper clock controller driver. This patch basically adds clock controller support for q6afe clocks. This is useful for other drivers like lpass digital codec or lpass lowpower island drivers to request or vote for these clocks. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200910135708.14842-3-srinivas.kandagatla@linaro.orgSigned-off-by:
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Srinivas Kandagatla authored
q6afe exposes various lpass clocks controls via q6dsp q6afe commands. This patch adds bindings required for this clock controller. Signed-off-by:
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Pierre-Louis Bossart authored
Previous commits reduced the verbosity of errors during boot iterations, but there are still a couple remaining which generate false positives. Errors should only be logged when after last attempt to download firmware failed. Duplicating logs and assigning them different levels based on the iteration number isn't really elegant, use macro as suggested by Guennadi. Suggested-by:
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Guennadi Liakhovetski authored
On multiple locations checks are performed of untrusted values after adding a constant to them. This is wrong, because the addition might overflow and the result can then pass the check, although the original value is invalid. Fix multiple such issues by checking the actual value and not a sum of it and a constant. Signed-off-by:
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Guennadi Liakhovetski authored
No need to type-cast assignments between void and other pointers in C. Signed-off-by:
Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by:
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Guennadi Liakhovetski authored
In some cases no "ret" variable is even needed, those functions always return 0 anyway, in other cases "ret" initialisation is redundant. Signed-off-by:
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Pierre-Louis Bossart authored
We need to avoid reporting an error for -EACCESS when pm_runtime is not enabled. Signed-off-by:
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Pierre-Louis Bossart authored
We need to avoid reporting an error for -EACCESS when pm_runtime is not enabled. Signed-off-by:
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Karol Trzcinski authored
This field will be used to compare ldc file with loaded fw version, to assert validity of trace logs. Value used in sof-logger. Signed-off-by:
Karol Trzcinski <karolx.trzcinski@linux.intel.com> Reviewed-by:
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Iulian Olaru authored
This patch adds debug support for imx platforms. This is important in order to gather information about the state of the DSP in case of an oops and the reason for the oops. This is done by checking if a message with a panic code has been placed in the debug box, in the imx8_dsp_handle_request function from sof/imx. If positive, the function imx8_dump, added in common, will be called. The first step is to gather information about the registers, filename, line number and stack by calling the imx8_get_registers, added in common. Then the information will be printed to the console by calling the get_status function. Signed-off-by:
Iulian Olaru <iulianolaru249@yahoo.com> Reviewed-by:
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Dan Murphy authored
Fix the BCLK inversion for DSP modes This is how it is defined by ASoC: * BCLK: * - "normal" polarity means signal is available at rising edge of BCLK * - "inverted" polarity means signal is available at falling edge of BCLK The adcx140 defines the BCLK edge based on coding type. The PCM (DSP_A/B) should drive on rising and sample on falling edge, so from ASoC pov, it is IB_NF. But from the codec pov if it is configured in DSP mode, then the BCLK should not be inverted, defaults to the coding standard. For i2s, it is NB_NF from ASoC pov (drive on falling, sample on rising). >From the codec's pov BCLK should not invert either, as this is the default for the coding. So, inversion must take the format into account: IB_NF + DSP_A/B == the codec bclk inversion should be disabled NB_NF + DSP_A/B == the codec bclk inversion should be enabled NB_NF + I2S == the codec bclk inversion should be disabled Signed-off-by:
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Dan Murphy authored
It was observed that if the device was active and register writes were performed there were some unwanted behaviors particularly when writing the word length and some filter options. So when writing to the device the device should be placed in sleep mode and then exit sleep mode once the register update is complete. Signed-off-by:
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Camel Guo authored
According to its datasheet, the digital gain should be -100 dB when CHx_DVOL is 1 and 27 dB when CHx_DVOL is 255. But with the current dig_vol_tlv, "Digital CHx Out Volume" shows 27.5 dB if CHx_DVOL is 255 and -95.5 dB if CHx_DVOL is 1. This commit fixes this bug. Fixes: 689c7655 ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec driver family") Signed-off-by:
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Pierre-Louis Bossart authored
When CONFIG_SND_CTL_VALIDATION is set, accesses to extended bytes control generate spurious error messages when the size exceeds 512 bytes, such as [ 11.224223] sof_sdw sof_sdw: control 2:0:0:EQIIR5.0 eqiir_coef_5:0: invalid count 1024 In addition the error check returns -EINVAL which has the nasty side effect of preventing applications accessing controls from working, e.g. root@plb:~# alsamixer cannot load mixer controls: Invalid argument It's agreed that the control interface has been abused since 2014, but forcing a check should not prevent existing solutions from working. This patch skips the checks conditionally if CONFIG_SND_CTL_VALIDATION is set and the byte array provided by topology is > 512. This preserves the checks for all other cases. Fixes: 1a3232d2 ('ASoC: topology: Add support for TLV bytes controls') BugLink: https://github.com/thesofproject/linux/issues/2430Reported-by:
Takashi Iwai <tiwai@suse.de> Signed-off-by:
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Viorel Suman authored
"alsactl -f state.conf store/restore" sequence fails because setting "mixing clock source" and "output source" requires active TDM clock being started for configuration propagation. Make these two controls write only so that their values are not stored at "alsactl store". Signed-off-by:
Viorel Suman <viorel.suman@nxp.com> Acked-by:
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- 14 Sep, 2020 1 commit
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derek.fang authored
Fix the failure to flush DAC data before playback. Signed-off-by:
derek.fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/1600073839-6762-2-git-send-email-derek.fang@realtek.comSigned-off-by:
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