- 12 Apr, 2022 36 commits
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Dmitry Baryshkov authored
Add temp-alarm device tree node and a default configuration for the corresponding thermal zone for this PMIC. Temperatures are based on downstream values. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226205035.1826360-2-dmitry.baryshkov@linaro.org
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Baruch Siach authored
The IPQ60xx has the same MDIO bug block as IPQ4019. Add IO range and clock resources description. Reviewed-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by:
Baruch Siach <baruch.siach@siklu.com> Signed-off-by:
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Jami Kettunen authored
The OnePlus 5/5T both have an NXP PN553 which is supported by the nxp-nci-i2c driver in mainline. It detects/reads NFC tags using "nfctool" and with the NearD test scripts data can also be written to be received by another device. Signed-off-by:
Jami Kettunen <jami.kettunen@somainline.org> Reviewed-by:
Caleb Connolly <caleb@connolly.tech> Signed-off-by:
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Sankeerth Billakanti authored
Rename the edp_out label in the sc7280 platform to mdss_edp_out so that the nodes related to mdss are all grouped together in the board specific files. Signed-off-by:
Sankeerth Billakanti <quic_sbillaka@quicinc.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Vinod Koul authored
Enable the ethernet node, add the phy node and pinctrl for ethernet. [bhsharma: Correct ethernet/rgmii related pinmuxs, specify multi-queues and plug in the PHY interrupt for WOL] Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Vinod Koul authored
SM8150 SoC supports ethqos ethernet controller so add the node for it Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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Luca Weiss authored
Configure and enable the nodes for UFS that are used for internal storage on FP4. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
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Luca Weiss authored
Add the necessary nodes for UFS and its PHY. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
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Dmitry Baryshkov authored
Following sm8150/sm8250 update sdm845 capacity-dmips-mhz and dynamic-power-coefficient based on the measurements [1], [2]. The energy model dynamic-power-coefficient values were calculated with DPC = µW / MHz / V^2 for each OPP, and averaged across all OPPs within each cluster for the final coefficient. Voltages were obtained from the qcom-cpufreq-hw driver that reads voltages from the OSM LUT programmed into the SoC. Normalized DMIPS/MHz capacity scale values for each CPU were calculated from CoreMarks/MHz (CoreMark iterations per second per MHz), which serves the same purpose. For each CPU, the final capacity-dmips-mhz value is the C/MHz value of its maximum frequency normalized to SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system. For more details on measurement process see the commit message for the commit 6aabed55 ("arm64: dts: qcom: sm8250: Add CPU capacities and energy model"). [1] https://github.com/kdrag0n/freqbench [2] https://github.com/kdrag0n/freqbench/tree/master/results/sdm845/main Cc: Danny Lin <danny@kdrag0n.dev> Signed-off-by: -
Bhupesh Sharma authored
Several wakeup gpios supported by the Top Level Mode Multiplexer (TLMM) block on sm8150 can be used as interrupt sources and these interrupts are routed to the PDC interrupt controller. So, specify PDC as the interrupt parent for the TLMM block. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Dmitry Baryshkov authored
Add fastrpc device tree nodes for aDSP, cDSP and SLPI. Signed-off-by:
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Dmitry Baryshkov authored
Enable the audio, compute, sensor and modem remoteproc and specify firmware path for these on the Qualcomm SM8450 HDK. Signed-off-by:
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Dmitry Baryshkov authored
On MSM8996 PCI controller bindings are not compatible with snps,dw-pcie binding. The platform doesn't provide second (global) IRQ, it requires additional glue code. To prevent it from probing against the dw-pcie driver, remove corresponding compatible. Fixes: ed965ef8 ("arm64: dts: qcom: msm8996: add support to pcie") Signed-off-by:
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Dmitry Baryshkov authored
On SDM845 PCI controller bindings are not compatible with snps,dw-pcie binding. The platform doesn't provide second (global) IRQ, it requires additional glue code. To prevent it from probing against the dw-pcie driver, remove corresponding compatible. Fixes: 5c538e09 ("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY") Fixes: 42ad2313 ("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller") Signed-off-by:
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Dmitry Baryshkov authored
APQ8096 provides a 'modem' with reduced functionality, mainly targeting location services. Enable corresponding device tree node. Signed-off-by:
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Yassine Oudjana authored
Enable mss_pil and slpi_pil and set their firmware paths. Signed-off-by:
Yassine Oudjana <y.oudjana@protonmail.com> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c Signed-off-by:
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Yassine Oudjana authored
Add nodes for the MSS and SLPI remoteprocs. Signed-off-by:
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Yassine Oudjana authored
Rename smp2p-modem to smp2p-mpss, and make the subnode labels of smp2p_adsp and smp2p_slpi follow the <name>_smp2p_<out/in> layout. Also move smp2p_slpi_out above smp2p_slpi_in to make it match mpss and adsp where master-kernel is the first subnode. This patch brings no functional change. Signed-off-by:
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Yassine Oudjana authored
Fix a total overlap between zap_shader_region and slpi_region, and rename all regions to match the naming convention in other Qualcomm SoC device trees. Signed-off-by:
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Bhupesh Sharma authored
Add support for uSD card on SA8155p-ADP board using the SDHC2 interface. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Bhupesh Sharma authored
Add support for SDC2 which can be used to interface uSD card. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by:
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Dmitry Baryshkov authored
Dragonboard845c doesn't have board-specific board-id programmed, it uses generic 0xff. Thus add the property with the 'variant' of the calibration data. Note: the driver will check for the calibration data for the following IDs, so older board-2.bin files that were distributed as a part of Linaro releases will continue to work. - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=30214,variant=Thundercomm_DB845C' - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=30214' - 'bus=snoc,qmi-board-id=ff' For the reference, the board is identified by the driver in the following way: ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40030001 ath10k_snoc 18800000.wifi: qmi fw_version 0x2009856b fw_build_timestamp 2018-07-19 12:28 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 Fixes: 3f72e2d3 ("arm64: dts: qcom: Add Dragonboard 845c") Signed-off-by:
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Krzysztof Kozlowski authored
The DT schema expects clocks core-iface order. No functional change. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Krzysztof Kozlowski authored
The DT schema expects dma channels in tx-rx order. No functional change. Signed-off-by:
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Krzysztof Kozlowski authored
The "bluetooth" is more popular and more descriptive than "bt", for a Bluetooth device. The WCNSS DT schema will expect such naming. Signed-off-by:
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Souradeep Chowdhury authored
Set the default dr_mode for usb2 node to "otg" to enable role-switch for EUD(Embedded USB Debugger) connector node. Signed-off-by:
Souradeep Chowdhury <quic_schowdhu@quicinc.com> Signed-off-by:
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Manikanta Pubbisetty authored
Add DTS node for WCN6750 WiFi chipset. Signed-off-by:
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
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Krzysztof Kozlowski authored
ref_clk clock in UFS node is already there with a <0 0> frequency, which matches other DTSI files. Signed-off-by:
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Krzysztof Kozlowski authored
The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc) and generic (jedec,ufs-2.0) compatibles. Signed-off-by:
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Krzysztof Kozlowski authored
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is l25 regulator) is not documented in MSM8996 UFS PHY bindings (qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY bindings for qcom,msm8996-ufs-phy-qmp-14nm. The MSM8996-based Xiaomi devices configure l25 regulator in a conflicting way: 1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY, 2. with maximum 450 mAmp for VCCQ supply of UFS. Since the vddp-ref-clk-max-microamp property is basically not documented for that UFS PHY and has a conflicting values, drop it entirely as it looks like not tested and not used ever. Signed-off-by:
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Krzysztof Kozlowski authored
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by:
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Rob Herring authored
Boolean properties in DT are present or not present and don't take a value. A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't matter. It may have been intended that 0 values are false, but there is no change in behavior with this patch. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by:
Rob Herring <robh@kernel.org> [bjorn: Updated subject prefix] Signed-off-by:
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Luca Weiss authored
Add a node for the haptics driver found on the phone. Signed-off-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Luca Weiss authored
Add nodes for the I2C busses on sm6350. Signed-off-by:
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Luca Weiss authored
The uart9 was previously mistakenly called uart2. Fix this. Signed-off-by:
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Petr Vorel authored
Angler does not have SD card, thus sdhc2 kept disabled. Signed-off-by:
Petr Vorel <petr.vorel@gmail.com> Signed-off-by:
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- 11 Apr, 2022 4 commits
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Stephen Boyd authored
The SAR node, ap_sar_sensor, needs to be enabled in addition to the i2c bus it resides on. Let's simplify this by leaving the sensor node enabled by default while leaving the i2c bus disabled by default. On boards that use the sensor, we already enable the i2c bus so we can simply remove the extra bit that enables the sar sensor node. This saves some lines but is otherwise a non-functional change. Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Stephen Boyd authored
Having these pins with outputs is good on a fresh boot because it puts the boot and reset pins in a known "good" state. Unfortunately, that conflicts with the fingerprint firmware flashing code. The firmware flashing process binds and unbinds the cros-ec and spidev drivers and that reapplies the pin output values after the flashing code has overridden the gpio values. This causes a problem because we try to put the device into bootloader mode, bind the spidev driver and that inadvertently puts it right back into normal boot mode, breaking the flashing process. Fix this by removing the outputs. We'll introduce a binding for fingerprint cros-ec specifically to set the gpios properly via gpio APIs during cros-ec driver probe instead. Cc: Douglas Anderson <dianders@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Alexandru M Stan <amstan@chromium.org> Fixes: 116f7cc4 ("arm64: dts: qcom: sc7280: Add herobrine-r1") Signed-off-by:
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Douglas Anderson authored
As talked about in commit 61a6262f ("arm64: dts: qcom: sc7280: Move herobrine-r0 to its own dts"), herobrine evolved pretty significantly after -r0 and newer revisions are pretty different. Nobody needs the old boards to keep working, so let's delete to avoid the maintenance burden. Signed-off-by:
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Douglas Anderson authored
While scoping signals, we found that the PCIe signals weren't compliant at bootup. Specifically, the bootloader was setting up PCIe and leaving it configured, then jumping to the kernel. The kernel was turning off the regulator while leaving the PCIe clock running, which was a violation. In the regulator bindings (and the Linux kernel driver that uses them), there's currently no way to specify that a GPIO-controlled regulator should keep its state at bootup. You've got to pick either "on" or "off". Let's switch it so that the PCIe regulator defaults to "on" instead of "off". This should be a much safer way to go and avoids the timing violation. The regulator will still be turned off later if there are no users. Signed-off-by:
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