- 01 Dec, 2012 2 commits
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Axel Lin authored
This makes PINCTRL related config options visible. Otherwise there is no way to build pinctrl drivers for MMP2, PXA168 and PXA910. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
These drivers do not need to select PINCONF. Signed-off-by:
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- 23 Nov, 2012 2 commits
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Sachin Kamat authored
*map should be tested for NULL instead of map. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by:
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Tushar Behera authored
Checking '< 0' for unsigned variables always returns false. For error codes, use IS_ERR_VALUE() instead. Signed-off-by:
Tushar Behera <tushar.behera@linaro.org> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
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- 21 Nov, 2012 12 commits
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Linus Walleij authored
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Axel Lin authored
This is introduced by commit 9ab6e988 "gpiolib: return any error code from range creation". Signed-off-by:
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Linus Walleij authored
To be crystal clear on what the arguments mean in this funtion dealing with both GPIO and PIN ranges with confusing naming, we now have gpio_offset and pin_offset and we are on the clear that these are offsets into the specific GPIO and pin controller respectively. The GPIO chip itself will of course keep track of the base offset into the global GPIO number space. Reviewed-by:
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Haojian Zhuang authored
Marvell's PXA/MMP silicon also match the behavior of pinctrl-single. Each pin binds to one register. A lot of pins could be configured as gpio. GPIO range is defined as a child node of pinmux in .dtsi file. If those pins are with the same gpio function configuration in the pinmux register, they could be defined in the same GPIO range. For this new child node, two properties are used. reg = <the start of pinmux register in range, size of range> pinctrl-single,gpio: <gpio base in range, the gpio function of the range in the pinmux register> Signed-off-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Haojian Zhuang authored
In Marvell PXA/MMP silicons, input schmitt disable value is 0x40, not 0. So append new config parameter -- input schmitt disable. Signed-off-by:
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Linus Walleij authored
Let's stop spawning the pinctrl driver from the GPIO driver, we have these two mechanisms broken apart now, and they can each probe in isolation. If the GPIO driver cannot find its pin controller (pinctrl-u300), the pin controller core will tell it to defer probing. Reviewed-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
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Linus Walleij authored
Instead of having the pinctrl driver register the GPIO range for the gpio_chip, making it necessary to instantiate the pin controller from the GPIO driver and pass the GPIO chip as platform data, now let the GPIO chip driver register it's own ranges and have the pinctrl driver look up the GPIO chip from the pinctrl core as necessary. Reviewed-by:
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Linus Walleij authored
This adds a function to the pinctrl core to retrieve the GPIO range associated with a certain pin for a certain controller. This is needed when a pinctrl driver want to look up the corresponding struct gpio_chip for a certain pin. As the GPIO drivers can now create these ranges themselves, the pinctrl driver no longer knows about all its associated GPIO chips. Reviewed-by:
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Linus Walleij authored
If we try to create a range for a certain GPIO chip and the target pin controller is not yet available it may return a probe deferral error code, so handle this all the way our by checking the error code. Reviewed-by:
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Linus Walleij authored
This makes the pinctrl_find_and_add_gpio_range() return -EPROBE_DEFER if the range hosting pin controller cannot be located. We may assume that the common case for why adding a range fails is that the targe pin controller device has not probed yet. Reviewed-by:
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Linus Walleij authored
Rename the function find_pinctrl_and_add_gpio_range() to pinctrl_find_and_add_gpio_range() so as to be consistent with the rest of the functions. Reviewed-by:
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Linus Walleij authored
Like with commit 3c739ad0 it is not always enough to specify all the pins of a gpio_chip from offset zero to be added to a pin map range, since the mapping from GPIO to pin controller may not be linear at all, but need to be broken into a few consecutive sub-ranges or 1-pin entries for complicated cases. The ranges may also be sparse. This alters the signature of the function to accept offsets into both the GPIO-chip local pinspace and the pin controller local pinspace. Reviewed-by:
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- 19 Nov, 2012 7 commits
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: -
Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: -
Jean-Christophe PLAGNIOL-VILLARD authored
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Ludovic Desroches authored
Add mci controller nodes to atmel boards. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Ludovic Desroches authored
Add mci controller nodes to atmel SOCs. Signed-off-by:
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Ludovic Desroches authored
Add clocks to clock lookup table for DT entries. Signed-off-by:
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- 21 Nov, 2012 1 commit
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- 18 Nov, 2012 13 commits
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: -
Joachim Eastwood authored
Signed-off-by:
Joachim Eastwood <manabian@gmail.com> Signed-off-by:
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Joachim Eastwood authored
Signed-off-by:
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Joachim Eastwood authored
Signed-off-by:
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Joachim Eastwood authored
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Joachim Eastwood authored
Based on AT91 PIT DT patch from Jean-Christophe PLAGNIOL-VILLARD. Signed-off-by:
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Joachim Eastwood authored
We need CONFIG_SOC_AT91SAM9 to get the at91sam926x_timer symbol used in board-dt. Signed-off-by:
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Jean-Christophe PLAGNIOL-VILLARD authored
CPU Module with ATMEL AT91SAM9G45 http://www.ronetix.at/pm9g45.htmlSigned-off-by:
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Jean-Christophe PLAGNIOL-VILLARD authored
as we just use the rts and not the rts & cts for rs485 Signed-off-by: -
Jean-Christophe PLAGNIOL-VILLARD authored
USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: -
Jean-Christophe PLAGNIOL-VILLARD authored
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Jean-Christophe PLAGNIOL-VILLARD authored
add : set_deglitch: enable/disable deglitch set_debounce: enable/disable debounce set_pulldown: enable/disable pulldown disable_schmitt_trig: disable schmitt trigger Signed-off-by: -
Jean-Christophe PLAGNIOL-VILLARD authored
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- 15 Nov, 2012 3 commits
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Axel Lin authored
They are not referenced outside of this file, make them static. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Axel Lin authored
of_match_device() may return NULL. Signed-off-by:
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Haojian Zhuang authored
Dump pinmux register value, not only function part in the pinmux register. Also fix the issue on caluclating pin offset. The last parameter should be pin number, not register offset. Signed-off-by:
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