1. 19 Aug, 2008 2 commits
    • H. Peter Anvin's avatar
      x86: add NOPL as a synthetic CPU feature bit · 7e00df58
      H. Peter Anvin authored
      The long noops ("NOPL") are supposed to be detected by family >= 6.
      Unfortunately, several non-Intel x86 implementations, both hardware
      and software, don't obey this dictum.  Instead, probe for NOPL
      directly by executing a NOPL instruction and see if we get #UD.
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      7e00df58
    • H. Peter Anvin's avatar
      x86: boot: stub out unimplemented CPU feature words · e2fe16d9
      H. Peter Anvin authored
      The CPU feature detection code in the boot code is somewhat minimal,
      and doesn't include all possible CPUID words.  In particular, it
      doesn't contain the code for CPU feature words 2 (Transmeta),
      3 (Linux-specific), 5 (VIA), or 7 (scattered).  Zero them out, so we
      can still set those bits as known at compile time; in particular, this
      allows creating a Linux-specific NOPL flag and have it required (and
      therefore resolvable at compile time) in 64-bit mode.
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      e2fe16d9
  2. 18 Aug, 2008 3 commits
    • Thomas Petazzoni's avatar
      x86: configuration options to compile out x86 CPU support code · 8d02c211
      Thomas Petazzoni authored
      This patch adds some configuration options that allow to compile out
      CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The
      new configuration options are only visible when CONFIG_EMBEDDED is
      selected, as they are mostly interesting for space savings reasons.
      
      An example of size saving, on x86 with only Intel CPU support:
      
         text	   data	    bss	    dec	    hex	filename
      1125479	 118760	 212992	1457231	 163c4f	vmlinux.old
      1121355	 116536	 212992	1450883	 162383	vmlinux
        -4124   -2224       0   -6348   -18CC +/-
      
      However, I'm not exactly sure that the Kconfig wording is correct with
      regard to !64BIT / 64BIT.
      
      [ mingo@elte.hu: convert macro to inline ]
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      8d02c211
    • Thomas Petazzoni's avatar
      x86: move cmpxchg fallbacks to a generic place · 774400a3
      Thomas Petazzoni authored
      arch/x86/kernel/cpu/intel.c defines a few fallback functions
      (cmpxchg_*()) that are used when the CPU doesn't support cmpxchg
      and/or cmpxchg64 natively. However, while defined in an Intel-specific
      file, these functions are also used for CPUs from other vendors when
      they don't support cmpxchg and/or cmpxchg64. This breaks the
      compilation when support for Intel CPUs is disabled.
      
      This patch moves these functions to a new
      arch/x86/kernel/cpu/cmpxchg.c file, unconditionally compiled when
      X86_32 is enabled.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: michael@free-electrons.com
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      774400a3
    • Thomas Petazzoni's avatar
      x86: make movsl_mask definition non-CPU specific · 8bfcb396
      Thomas Petazzoni authored
      movsl_mask is currently defined in arch/x86/kernel/cpu/intel.c, which
      contains code specific to Intel CPUs. However, movsl_mask is used in
      the non-CPU specific code in arch/x86/lib/usercopy_32.c, which breaks
      the compilation when support for Intel CPUs is compiled out.
      
      This patch solves this problem by moving movsl_mask's definition close
      to its users in arch/x86/lib/usercopy_32.c.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: michael@free-electrons.com
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      8bfcb396
  3. 15 Aug, 2008 1 commit
  4. 14 Aug, 2008 34 commits