- 04 Jun, 2019 24 commits
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Nathan Chancellor authored
Clang warns: drivers/net/ethernet/mscc/ocelot_ace.c:335:37: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct ocelot_vcap_u64 payload = { 0 }; ^ {} drivers/net/ethernet/mscc/ocelot_ace.c:336:28: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct vcap_data data = { 0 }; ^ {} drivers/net/ethernet/mscc/ocelot_ace.c:683:37: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct ocelot_ace_rule del_ace = { 0 }; ^ {} drivers/net/ethernet/mscc/ocelot_ace.c:743:28: warning: suggest braces around initialization of subobject [-Wmissing-braces] struct vcap_data data = { 0 }; ^ {} 4 warnings generated. One way to fix these warnings is to add additional braces like Clang suggests; however, there has been a bit of push back from some maintainers[1][2], who just prefer memset as it is unambiguous, doesn't depend on a particular compiler version[3], and properly initializes all subobjects. Do that here so there are no more warnings. [1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/ [2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/ [3]: https://lore.kernel.org/lkml/20181116150432.2408a075@redhat.com/ Fixes: b5962294 ("net: mscc: ocelot: Add support for tcam") Link: https://github.com/ClangBuiltLinux/linux/issues/505Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Florian Westphal authored
syzbot triggered following splat when strict netlink validation is enabled: net/ipv4/devinet.c:1766 suspicious rcu_dereference_check() usage! This occurs because we hold RTNL mutex, but no rcu read lock. The second call site holds both, so just switch to the _rtnl variant. Reported-by: syzbot+bad6e32808a3a97b1515@syzkaller.appspotmail.com Fixes: 2638eb8b ("net: ipv4: provide __rcu annotation for ifa_list") Signed-off-by: Florian Westphal <fw@strlen.de> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Jiri Pirko says: ==================== expose flash update status to user When user is flashing device using devlink, he currenly does not see any information about what is going on, percentages, etc. Drivers, for example mlxsw and mlx5, have notion about the progress and what is happening. This patchset exposes this progress information to userspace. Example output for existing flash command: $ devlink dev flash pci/0000:01:00.0 file firmware.bin Preparing to flash Flashing 100% Flashing done See this console recording which shows flashing FW on a Mellanox Spectrum device: https://asciinema.org/a/247926 Please see individual patches for changelog. v2->v3 only adds tags and the last selftest patch ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Utilizes the devlink flash code. Suggested-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Implement mlxfw status_notify op by passing notification down to devlink. Also notify about flash update begin and end. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Add new op status_notify which is called to update the user about flashing status. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Introduce a function to be called from drivers during flash. It sends notification to userspace about flash update progress. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Currently the error messages are printed to dmesg. Propagate them also to directly to user doing the flashing through extack. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Benefit from the devlink flash update implementation and ethtool fallback to it and move firmware flash implementation there. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Acked-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jiri Pirko authored
Benefit from the devlink flash update implementation and ethtool fallback to it and move firmware flash implementation there. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Dinh Nguyen authored
Add option for enabling RMII phy mode. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Wei Liang Lim <wei.liang.lim@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Vladimir Oltean says: ==================== FDB updates for SJA1105 DSA driver This patch series adds: - FDB switchdev support for the second generation of switches (P/Q/R/S). I could test/code these now that I got a board with a SJA1105Q. - Management route support for SJA1105 P/Q/R/S. This is needed to send PTP/STP/management frames over the CPU port. - Logic to hide private DSA VLANs from the 'bridge fdb' commands. The new FDB code was also tested and still works on SJA1105T. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
TX VLANs and RX VLANs are an internal implementation detail of DSA for frame tagging. They work by installing special VLANs on switch ports in the operating modes where no behavior change w.r.t. VLANs can be observed by the user. Therefore it makes sense to hide these VLANs in the 'bridge fdb' command, as well as translate the pvid into the RX VID and TX VID on 'bridge fdb add' and 'bridge fdb del' commands. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
This is a cosmetic patch that simplifies the code by removing a redundant check. A logical AND-with-zero performed on a zero is still zero. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
This adds support for manipulating the L2 forwarding database (dump, add, delete) for the second generation of NXP SJA1105 switches. At the moment only FDB entries installed statically through 'bridge fdb' are visible in the dump callback - the dynamically learned ones are still under investigation. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
Management routes are one-shot FDB rules installed on the CPU port for sending link-local traffic. They are a prerequisite for STP, PTP etc to work. Also make a note that removing a management route was not supported on the previous generation of switches. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
Conceptually, if an entry is not found in the requested hardware table, it is not an invalid request - so change the error returned appropriately. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
These are needed in order to implement the switchdev FDB callbacks. Compared to the E/T generation, not only the ABI (bit offsets) is different, but also the introduction of the HOSTCMD field which permits O(1) TCAM search for an FDB entry. Make use of the newly introduce OP_SEARCH to permit that. It will be used while adding and deleting an FDB entry (to see whether it exists or not). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
The DSA callbacks were written with the E/T (first generation) in mind, which is quite different. For P/Q/R/S completely new implementations need to be provided, which are held as function pointers in the priv->info structure. We are taking a slightly roundabout way for this (a function from sja1105_main.c reads a structure defined in sja1105_spi.c that points to a function defined in sja1105_main.c), but it is what it is. The FDB dump callback works for both families, hence no function pointer for that. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
Only a single dynamic configuration table of the SJA1105 P/Q/R/S supports this operation: the FDB. To keep the existing structure in place (sja1105_dynamic_config_read and sja1105_dynamic_config_write) and not introduce any new function, a convention is made for sja1105_dynamic_config_read that a negative index argument denotes a search for the entry provided as argument. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
This appends to the L2 Forwarding and L2 Forwarding Parameters tables (originally added for first-generation switches) the bits that are new in the second generation. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
This was inadvertently copied from the SJA1105 E/T structure and not tested. Cross-checking with the P/Q/R/S documentation (UM11040) makes it immediately obvious what the correct bit offsets for this field are. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Vladimir Oltean authored
This structure is merely an implementation detail and should be hidden from the sja1105_dynamic_config.h header, which provides to the rest of the driver an abstract access to the dynamic configuration interface of the switch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- 03 Jun, 2019 16 commits
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David S. Miller authored
Heiner Kallweit says: ==================== r8169: make firmware handling code ready to be factored out This series contains the final steps to make firmware handling code ready to be factored out into a separate source code file. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
Add rtl_fw_request_firmware and rtl_fw_release_firmware which will be part of the API when factoring out the firmware handling code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
In preparation of factoring out the firmware handling code avoid any usage of struct rtl8169_private internals. As part of it we can inline rtl_check_firmware. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
Similar to rtl_fw_data_ok() we can simplify the code by moving incrementing the index to the for loop initialization. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
Replace the firmware opcode defines with a proper enum. The BUG() in rtl_fw_write_firmware() can be removed because the call to rtl_fw_data_ok() ensures all opcodes are valid. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Huazhong Tan says: ==================== code optimizations & bugfixes for HNS3 driver This patch-set includes code optimizations and bugfixes for the HNS3 ethernet controller driver. [patch 1/10] removes the redundant core reset type [patch 2/10 - 3/10] fixes two VLAN related issues [patch 4/10] fixes a TM issue [patch 5/10 - 10/10] includes some patches related to RAS & MSI-X error Change log: V1->V2: removes two patches which needs to change HNS's infiniband driver as well, they will be upstreamed later with the infiniband's one. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
All RAS and MSI-X should be enabled just in the final stage of HNS3 initialization. It means that they should be enabled in hclge_init_xxx_client_instance instead of hclge_ae_dev(). Especially MSI-X, if it is enabled before opening vector0 IRQ, there are some chances that a MSI-X error will cause failure on initialization of NIC client instane. So this patch delays enabling of HW errors. Otherwise, we also separate enabling of ROCE RAS from NIC, because it's not reasonable to enable ROCE RAS if we even don't have a ROCE driver. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
There are four commands being used to query and clear RAS and MSI-X interrupts status. They should be contained in array of special opcodes because these commands have several descriptors, and we need to judge return value in the first descriptor rather than the last one as other opcodes. In addition, we shouldn't set the NEXT_FLAG of first descriptor. This patch fixes above issues. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
We shouldn't set HNAE3_NONE_RESET bit of the variable that represents a reset request during handling of MSI-X errors, or may cause issue when trigger reset. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
LINK_UP and LINK_DOWN are two bits of MAC tunnel interrupts, but previous HNS3 driver didn't handle them. If they were enabled, value of these two bits will change during link down and link up, which will cause HNS3 driver keep receiving IRQ but can't handle them. This patch adds handling of these two bits of interrupts, we will record and clear them as what we do to other MAC tunnel interrupts. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
The hclge/hclgevf and hns3 module can be unloaded independently, when hclge/hclgevf unloaded firstly, the ops of ae_dev should be set to NULL, otherwise it will cause an use-after-free problem. Fixes: 38caee9d ("net: hns3: Add support of the HNAE3 framework") Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Weihang Li authored
If we add a VF without loading hclgevf.ko and then there is a RAS error occurs, PCIe AER will call error_detected and slot_reset of all functions, and will get a NULL pointer when we check ad_dev->ops->handle_hw_ras_error. This will cause a call trace and failures on handling of follow-up RAS errors. This patch check ae_dev and ad_dev->ops at first to solve above issues. Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Yunsheng Lin authored
This patch sets the port shaper according to the MAC speed as suggested by hardware user manual. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jian Shen authored
In orginal codes, the driver only restore VLAN filter entries for PF after reset, the VLAN entries of VF will lose in this case. This patch fixes it by recording VLAN IDs for each function when add VLAN, and restore the VLAN IDs after reset. Fixes: 681ec399 ("net: hns3: fix for vlan table lost problem when resetting") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jian Shen authored
VF VLAN table can only support no more than 256 VLANs. When user adds too many VLANs, the VF VLAN table will be full, and firmware will close the VF VLAN table for the function. When VF VLAN table is full, and user keeps adding new VLANs, it's unnecessary to configure the VF VLAN table, because it will always fail, and print warning message. The worst case is adding 4K VLANs, and doing reset, it will take much time to restore these VLANs, which may cause VF reset fail by timeout. Fixes: 6c251711 ("net: hns3: Disable vf vlan filter when vf vlan table is full") Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Huazhong Tan authored
Since core reset is similar to the global reset, so this patch removes it and uses global reset to replace it. Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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