FAN53526 and SI470X are both connected over blsp2_i2c5. Configure them.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-15-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Both the power key and the vol- key are connected over PON.
Configure them.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-14-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Octagon devices have a Lattice iCE40 FPGA connected over SPI.
Configure it.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-13-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Lumia 950/XL, like other phones, ship with different storage chips.
Some of them are not capable of stable operation at HS400. Disable it.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-12-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

The driver is not available yet, so hardcode the pins.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-11-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Configure and enable QCA6174 Bluetooth and required pins.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-10-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Configure the regulators to ensure proper voltages across
the board.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-9-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This enables tje hardware keys as well as the Hall sensor.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-8-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Windows-based devices have a far different memory map than
the standard LA one.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-7-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Lumia 950 and 950XL are both based on the Octagon board, sharing
the vast majority of components, configuration etc. Commonize it.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-6-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This saves a good thousand lines of code, perhaps even
more in the long run.
Co-developed-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-5-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-4-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

* Move 35500 clock-frequency to kitakami (turns out it's a Sony specific)
* Add missing interfaces
* Fix the naming scheme
* Fix up pin assignments to make all BLSPs work
* Add DMA where previously omitted
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-3-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

They will be required for bringup of remote processors.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-2-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

BQ Aquaris X5 (Longcheer L8910) has:
 - BMI160 accelerometer and gyroscope sensor
 - AK09911 magnetometer sensor
Add them to the device tree.

This patch depends on patch "arm64: dts: qcom: msm8916: Add blsp_i2c3".
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-4-jonathan.albrieux@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

MSM8916 has another I2C QUP controller that can be enabled on
GPIO 10 and 11.

Add blsp_i2c3 to msm8916.dtsi and disable it by default.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-3-jonathan.albrieux@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

BQ Aquaris X5 (Longcheer L8910) is a smartphone using the MSM8916 SoC.

Add device tree with initial support for:

 - SDHCI (internal and external storage)
 - USB Device Mode
 - UART
 - Regulators
 - WiFi/BT
 - Volume buttons
 - Vibrator
 - Touchkeys backlight

This device tree is based on downstream device tree from BQ and from
Longcheer L8915 device tree.
Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-2-jonathan.albrieux@gmail.comSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

RB5 has 3 PCIe ports exposed to connect PCIe client devices. PCIe0 is
connected to QCA6391 chipset and others are available on the HS3
expansion connector. Hence, enable all of them.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-3-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add PCIe support for Qcom SM8250 SoC. This SoC has 3 PCIe Gen 3
instances based on Designware IP, out of which PCIe0 has 1 lane support
and the rest have 2 lane support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[DB: add ddrss_sf_tbu clock]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-2-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC
MTP board. This enabled uart node and adds rpmh-regulators present for
this board.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-7-vkoul@kernel.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add basic devicetree support for Qualcomm Technologies, Inc SM8350 SoC.
This adds gcc, pinctrl, reserved memory, uart, cpu nodes for this SoC.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-6-vkoul@kernel.org
[bjorn: Adjusted 4th timer interrupt, per input from Sai]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add compatible for SM8150 and SM8350 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-5-vkoul@kernel.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Kryo685 is found in SM8350, so add it to the list of cpu compatibles
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-4-vkoul@kernel.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Document the SM8350 SoC binding and also the boards using it.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-2-vkoul@kernel.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Disable MDSS (Mobile Display Subsystem) by default in msm8916.dtsi
and only explicitly enable it in devices' DT which actually use it.

This leads to faster boot and cleaner logs for other devices,
which also won't have to explicitly disable MDSS to use framebuffer.
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-4-vincent.knecht@mailoo.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

The Alcatel Idol 3 (4.7") is a smartphone based on MSM8916.
Add a device tree with support for USB, eMMC, SD-Card, WiFi,
BT, power/volume buttons, vibrator and the following sensors:
magnetometer, accelerometer, gyroscope, ambient light+proximity
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-3-vincent.knecht@mailoo.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Document vendor prefix for Alcatel
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-2-vincent.knecht@mailoo.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SM8250 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/ff0758b158d62e82fd0636f5861115f435f821ac.1611466260.git.saiprakash.ranjan@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SM8150 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/02700a5ac413bf5a7e3a0102233d1d64b47bb2cf.1611466260.git.saiprakash.ranjan@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SDM845 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/7740e8ef57361d33da64e823b2356da2be0065b8.1611466260.git.saiprakash.ranjan@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Specify bark interrupt for APSS watchdog to support pre-timeout
notification on SC7180 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/535b368f6c22bab7078842d803a73e695f28a751.1611466260.git.saiprakash.ranjan@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

I forgot to do this the first time around.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-11-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

The previous map was wrong. Fix it up.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-10-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Fix up the node to make the peripheral functional.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-9-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

This is required for the GPU to function.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-8-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Assign regulators and enable regulator-set-load on
VMMC so as to provide sufficient power.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-7-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

All Kitakami phones use Synaptics RMI4 touchscreens
attached to the same i2c bus. Configure and enable it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-6-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Add regulator config for all Kitakami devices, commonizing where
applicable.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-5-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Rename the fixed regulator to follow the common naming scheme
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-4-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

* Add PMI8994 RPM regulators
* Add missing PM8994 LVSes
* Add comments concerning "missing" regulators
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-3-konrad.dybcio@somainline.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>