- 08 Nov, 2022 3 commits
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Dmitry Baryshkov authored
Link dsi1_phy as a clock provider of "dsi1pll" and "dsi1pllbyte" clocks to the MMCC. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221030161612.95471-2-dmitry.baryshkov@linaro.org
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Dmitry Baryshkov authored
Link hdmi_phy as a clock provider of "hdmipll" clock to the MMCC. Signed-off-by:
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Marijn Suijten authored
When enabling the APPS SMMU the mainline driver reconfigures the SMMU from its bootloader configuration, losing the stream mapping for (among which) the SDHCI hardware and breaking its ADMA feature. This feature can be disabled with: sdhci.debug_quirks=0x40 But it is of course desired to have this feature enabled and working through the SMMU. Signed-off-by:Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Luca Weiss <luca.weiss@fairphone.com> Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4 Signed-off-by:
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- 07 Nov, 2022 37 commits
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Marijn Suijten authored
Use the generic samsung,s6sy761 touchscreen driver for this device, together with a few pins and regulators to power it up correctly. Signed-off-by:
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Marijn Suijten authored
Enable QUP and GPI DMA hardware to be able to add functioning I2C nodes later. Signed-off-by:
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Marijn Suijten authored
Without power the SDCard slot / hardware remains dormant. Like many other platforms these regulators are used exclusively by SDHCI, and have their maximum voltage decreased to what downstream sets on the consumer side. Additionally the SDHCI driver supports setting a load, for which the regulator definition is extended much the same. Signed-off-by:
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Marijn Suijten authored
This regulator configuration was adopted from downstream, and is identical to the sm7225 FairPhone 4 configuration bar pm6350_l8a. Signed-off-by:
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Marijn Suijten authored
Include pm6350 to inherit its GPIO and button configuration, and configure "resin" to serve as volume up, and gpio2 as volume down. Signed-off-by:
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Marijn Suijten authored
Make pm6350.dtsi self-contained by including input.h, needed for the KEY_POWER constant used to define the power key. Fixes: d8a3c775 ("arm64: dts: qcom: Add PM6350 PMIC") Signed-off-by:
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Marijn Suijten authored
In addition to the sdc2 pins, set the SD Card Detect pin in a sane state to be used as an interrupt when an SD Card is slotted in or removed. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Marijn Suijten authored
Use the generic pin functions specifically for sdc2. Signed-off-by:
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Marijn Suijten authored
Make sure the SDHCI hardware is properly reset before interacting with it, to protect against any possibly indeterminate state left by the bootloader. Suggested-by:
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Luca Weiss authored
Add temp-alarm device tree node and a default configuration for the corresponding thermal zone for this PMIC. Temperatures are based on downstream values, except for trip2 where 125°C is used instead of 145°C due to limitations without a configured ADC. Signed-off-by:
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Luca Weiss authored
Add temp-alarm device tree node and a default configuration for the corresponding thermal zone for this PMIC. Temperatures are based on downstream values, except for trip2 where 125°C is used instead of 145°C due to limitations without a configured ADC. Signed-off-by:
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Douglas Anderson authored
The sc7280-herobrine-villager derivative doesn't have NVME enabled so we shouldn't mark the PCIe nodes as "okay" since they're just for boards that have NVME. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
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Stephen Boyd authored
It turns out that only a few people have the fingerprint sensor hooked up on their board. Leaving this enabled is slowing down boot for everyone else because the driver slowly fails to probe while trying to communicate with a sensor that isn't there. Remove the node to speed up boot, developers with the board can manually enable it themselves. Reported-by:
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Krzysztof Kozlowski authored
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Order the "function" and "pins" property to match other DTS. Signed-off-by:
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Krzysztof Kozlowski authored
The GPIO55 is part of SPI10 pins, not its chip-select. Probably the intention was to use one of dedicated chip-select GPIOs: 47 or 67. GPIO47 is used for UART2, so choose GPIO67. Signed-off-by:
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Manikanta Pubbisetty authored
Add DT nodes to support WoW (Wake on Wireless) feature on WCN6750 WiFi hardware on SC7280 SoC. Signed-off-by:
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> Signed-off-by:
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Johan Hovold authored
The QMP pipe clock is used by the USB part of the PHY so drop the corresponding properties from the DP child node. Fixes: 23737b95 ("arm64: dts: qcom: sm6350: Add USB1 nodes") Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Signed-off-by:
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Johan Hovold authored
The QMP pipe clock is used by the USB part of the PHY so drop the corresponding properties from the DP child node. Fixes: 5aa0d1be ("arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode") Signed-off-by:
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Manivannan Sadhasivam authored
Add thermal zone support by making use of the thermistor SYS_THERM6. Based on experiments, this thermistor seems to reflect the actual surface temperature of the laptop. For the cooling device, all BIG CPU cores are throttled down to keep the temperature at a sane level. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by:
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Manivannan Sadhasivam authored
Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from external thermistors connected to AMUX pins. The temperature measurements are collected from the PMK8280's VADC channels that expose the measurements from secondary PMICs PM8280_{1/2}. Reviewed-by: -
Manivannan Sadhasivam authored
Add VADC channel of PMR735A for measuring the on-chip die temperature. Reviewed-by:
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Manivannan Sadhasivam authored
Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die temperature and external thermistors connected to the AMUX pins. The measurements are collected by the primary PMIC PMK8280 from the secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels. Reviewed-by: -
Manivannan Sadhasivam authored
Add VADC channels for measuring the on-chip die temperature and external crystal osciallator temperature of PMK8280. Reviewed-by:
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Manivannan Sadhasivam authored
Enable resetting the PMK8280 through RESIN block in SC8280XP X13s. Reviewed-by:
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Manivannan Sadhasivam authored
Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the temperature from secondary PMICs like PM8280. Reviewed-by:
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Manivannan Sadhasivam authored
Add support for ADC7 block available in PMK8280 for reading the temperature via the AMUX pins. Reviewed-by:
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Manivannan Sadhasivam authored
The RESIN input can be used to reset the PMK8280 PMIC. Enabling the RESIN block allows the PMK8280 to detect reset input via RESIN_N pin. Reviewed-by:
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Manivannan Sadhasivam authored
Add thermal zones for the PM8280_{1/2} PMICs by using the temperature alarm blocks as the thermal sensors. Temperature trip points are inherited from PM8350 PMIC. Reviewed-by: -
Manivannan Sadhasivam authored
Add support for temperature alarm feature in the PM8280_{1/2} PMICs. Reviewed-by: -
Manivannan Sadhasivam authored
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC has the static Slave ID (SID) assigned by default. The primary PMIC PMK8350 is responsible for collecting the temperature/voltage data from the slave PMICs and exposing them via it's registers. For getting the measurements from the slave PMICs, PMK8350 uses the channel ID encoded with the SID of the relevant PMIC. So far, the dt-binding for the slave PMIC PM8350 assumed that there will be only one PM8350 in a system. So it harcoded SID 1 with channel IDs. But this got changed in platforms such as Lenovo X13s where there are a couple of PM8350 PMICs available. So to address multiple PM8350s, change the binding to accept the SID specified by the user and use it for encoding the channel ID. It should be noted that, even though the SID is static it is not globally unique. Only the primary PMIC has the unique SID id 0. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Dmitry Baryshkov authored
The 'qcom,dsi-ctrl-6g-qcm2290' compatibility string was added in the commit ee1f0967 ("drm/msm/dsi: Add support for qcm2290 dsi controller") in February 2022, but was not properly documented in the bindings. Adding this compatibility string to display/msm/dsi-controller-main.yaml caused a warning from qcom-soc.yaml. Fix the warning by adding an exception to the mentioned file. Signed-off-by:
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Vincent Knecht authored
Add si-en,sn3190 LED controller to enable white LED indicator. This requires adding the additional "enable" gpio that the OEM choose to use, despite it not being mentioned in si-en,sn3190 datasheet nor supported by the driver. Signed-off-by:
Vincent Knecht <vincent.knecht@mailoo.org> Reviewed-by:
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Vincent Knecht authored
Add support for torch LED on GPIO 32. Signed-off-by:
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Dmitry Torokhov authored
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: f8b4eb64 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards") Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
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Dmitry Torokhov authored
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: 0a3a56a9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1") Signed-off-by:
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Dmitry Torokhov authored
The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: 36c9d012 ("arm64: dts: qcom: use GPIO flags for tlmm") Fixes: 5a263cf6 ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node") Signed-off-by:
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Dmitry Torokhov authored
When resetting the block, the reset line is being driven low and then high, which means that the line in DTS should be annotated as "active low". It will become important when wcd9335 driver will be converted to gpiod API that respects declared line polarities. Fixes: f3eb39a5 ("arm64: dts: db820c: Add sound card support") Signed-off-by:
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