- 06 May, 2024 2 commits
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Linus Walleij authored
Merge tag 'samsung-pinctrl-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.10 1. Add support for toggling bus clock (PCLK) for any pin controller register accesses. This looks needed on newer Samsung chips, like Google GS101 and probably Exynos850. 2. Drop old, deprecated in v6.1 bindings header with register constants. The constants were moved to DTS headers. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Stefan Wahren authored
Until now after a bcm2835 pin was freed its pinmux was set to GPIO_IN. So in case it was configured as GPIO_OUT before the configured output level also get lost. As long as GPIO sysfs was used this wasn't actually a problem because the pins and their possible output level were kept by sysfs. Since more and more Raspberry Pi users start using libgpiod they are confused about this behavior. So make the pin freeing behavior of GPIO_OUT configurable via module parameter. In case pinctrl-bcm2835.persist_gpio_outputs is set to 1, the output level is kept. This patch based on the downstream work of Phil Elwell. Link: https://github.com/raspberrypi/linux/pull/6117Signed-off-by:
Stefan Wahren <wahrenst@gmx.net> Message-ID: <20240503062745.11298-1-wahrenst@gmx.net> Signed-off-by:
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- 03 May, 2024 4 commits
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Anjelique Melendez authored
Fix "comptaible" typo in if schema for qcom,pmih0108-gpio. Fixes: 6acc46f8 ("dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIH0108 and PMD8028 support") Signed-off-by:
Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Rob Herring (Arm) <robh@kernel.org> Message-ID: <20240425185603.3295450-1-quic_amelende@quicinc.com> Signed-off-by:
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Danila Tikhonov authored
SDC1 and UFS_RESET special pins are located in the west memory bank. SDC1 have address 0x359a000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000 UFS_RESET have address 0x359f000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000 Fixes: b915395c ("pinctrl: qcom: Add SM7150 pinctrl driver") Signed-off-by:
Danila Tikhonov <danila@jiaxyga.com> Message-ID: <20240423203245.188480-1-danila@jiaxyga.com> Signed-off-by:
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Rafał Miłecki authored
MT7622 pinctrl has ANTSEL* pins. Linux support for those was added in the commit 19f599e8 ("pinctrl: mediatek: mt7622: add antsel pins/groups"). Include them in binding. Cc: Chuanhong Guo <gch981213@gmail.com> Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Acked-by:
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Rafał Miłecki authored
Some properties (function groups & pins) are meant to be arrays and should allow multiple entries out of enum sets. Use "items" for those. Mistake was noticed during validation of in-kernel DTS files. Fixes: b9ffc18c ("dt-bindings: mediatek: convert pinctrl to yaml") Signed-off-by:
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- 30 Apr, 2024 1 commit
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Krzysztof Kozlowski authored
Fix W=1 warning: drivers/pinctrl/samsung/pinctrl-samsung.c: In function ‘samsung_gpio_set_direction’: drivers/pinctrl/samsung/pinctrl-samsung.c:633:42: warning: variable ‘drvdata’ set but not used [-Wunused-but-set-variable] Fixes: f9c74474 ("pinctrl: samsung: support a bus clock") Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404300825.6lxLwvUY-lkp@intel.com/Reviewed-by:
André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240430060304.12332-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
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- 29 Apr, 2024 3 commits
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André Draszik authored
On some Samsung-based SoCs there are separate bus clocks / gates each for each pinctrl instance. To be able to access each pinctrl instance's registers, this bus clock needs to be running, otherwise register access will hang. Google Tensor gs101 is one example for such an implementation. Update the driver to handle this optional bus clock: * handle an optional bus clock from DT * prepare it during driver probe * enclose all relevant register accesses with a clock enable & disable Signed-off-by:
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André Draszik authored
The pin controller on Google Tensor gs101 requires a bus clock for register access to work. Add it. Signed-off-by:
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.10 - Add external interrupt pin groups on R-Car V4M, - Miscellaneous fixes and improvements. Signed-off-by:
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- 25 Apr, 2024 1 commit
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Paul Barker authored
The RZ/G3S SoC supports configurable supply voltages for several of its I/O interfaces. All of these interfaces support both 1.8V and 3.3V supplies, but only the Ethernet and XSPI interfaces support a 2.5V supply. Voltage selection for the XSPI interface is not yet supported, so this leaves only the Ethernet interfaces currently supporting selection of a 2.5V supply. So we need to return an error if there is an attempt to select a 2.5V supply for any non-Ethernet interface. Fixes: 51996952 ("pinctrl: renesas: rzg2l: Add support to select power source for Ethernet pins") Signed-off-by:
Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240417114132.6605-1-paul.barker.ct@bp.renesas.comSigned-off-by:
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- 23 Apr, 2024 3 commits
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Geert Uytterhoeven authored
Add pins, groups, and function for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
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Geert Uytterhoeven authored
The suffixes of the IRQ identifiers, as used for pins related to the Interrupt Controller for External Devices (INTC-EX), are inconsistent. Correct them to match the Pin Multiplex attachment in Rev.0.51 of the R-Car V4M Series Hardware User's Manual. Fixes: 291f7856 ("pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC support") Signed-off-by:
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Lad Prabhakar authored
Remove unnecessary space in rzg2l_pinctrl_pm_setup_pfc() function parameter. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
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- 22 Apr, 2024 1 commit
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Claudiu Beznea authored
Commit dce0919c ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") removed the setup of TINT from rzg2l_irqc_irq_enable(). To address the spurious interrupt issue the setup of TINT has been moved in rzg2l_tint_set_edge() through rzg2l_disable_tint_and_set_tint_source(). With this, the interrupts are not properly re-configured after a suspend-to-RAM cycle. To address this issue and avoid spurious interrupts while resumming set the interrupt type before enabling it. Fixes: dce0919c ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") Signed-off-by:
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by:
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- 17 Apr, 2024 7 commits
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Herman van Hazendonk authored
The PM8901 is used alongside the APQ8060/MSM8660 on the APQ8060 Dragonboard and HP TouchPad. It works the same as all others, so just add the compatible string for this variant. Signed-off-by:
Herman van Hazendonk <github.com@herrie.org> Message-ID: <20240417073532.3718510-1-github.com@herrie.org> Signed-off-by:
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Peng Fan authored
Hex value will be easier to match hardware register bits layout, so same as pinconf_generic_dump_config, print hex value. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Message-ID: <20240412005128.2937486-1-peng.fan@oss.nxp.com> Signed-off-by:
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Krzysztof Kozlowski authored
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-5-krzk@kernel.org> Signed-off-by:
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Krzysztof Kozlowski authored
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Message-ID: <20240411064614.7409-4-krzk@kernel.org> Signed-off-by:
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Krzysztof Kozlowski authored
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by:
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- 12 Apr, 2024 2 commits
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Luca Weiss authored
Allow specifying a GPIO hog, as already used on qcom-msm8974-lge-nexus5-hammerhead.dts. Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Reviewed-by:
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Rafał Miłecki authored
Allow specifying pin to GPIO mapping. It can be find in in-Linux DTS file for MT7622. Signed-off-by:
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- 08 Apr, 2024 1 commit
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Andy Shevchenko authored
Use DEFINE_SHOW_STORE_ATTRIBUTE() helper for read-write file to reduce some duplicated code. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240404193521.3581399-1-andriy.shevchenko@linux.intel.com> Signed-off-by:
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- 04 Apr, 2024 14 commits
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Matthijs Kooijman authored
The pinctrl-single driver handles pin_config_set by looking up the requested setting in a DT-defined lookup table, which defines what bits correspond to each setting. There is no way to add PIN_CONFIG_BIAS_DISABLE entries to the table, since there is instead code to disable the bias by applying the disable values of both the pullup and pulldown entries in the table. However, this code is inside the table-lookup loop, so it would only execute if there is an entry for PIN_CONFIG_BIAS_DISABLE in the table, which can never exist, so this code never runs. This commit lifts the offending code out of the loop, so it just executes directly whenever PIN_CONFIG_BIAS_DISABLE is requested, skippipng the table lookup loop. This also introduces a new `param` variable to make the code slightly more readable. This bug seems to have existed when this code was first merged in commit 9dddb4df ("pinctrl: single: support generic pinconf"). Earlier versions of this patch did have an entry for PIN_CONFIG_BIAS_DISABLE in the lookup table, but that was removed, which is probably how this bug was introduced. Signed-off-by:
Matthijs Kooijman <matthijs@stdin.nl> Reviewed-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by:
Tony Lindgren <tony@atomide.com> Message-ID: <20240319110633.230329-1-matthijs@stdin.nl> Signed-off-by:
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Christophe JAILLET authored
In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused. This is a left-over from commit 571aec4d ("pinctrl: single: Use generic pinmux helpers for managing functions"); Remove them. Found with cppcheck, unusedStructMember. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <a6b653642298d35b1e3656e9bfc6d1b322fbbe68.1712004518.git.christophe.jaillet@wanadoo.fr> Signed-off-by:
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Christophe JAILLET authored
In "struct max77620_pin_info", the 'pull_config' field is unused. In "struct max77620_pctrl_info", the 'pins_current_opt' field is unused. Remove them. On my x86_64 config, with allmodconfig, this shrinks the struct max77620_pctrl_info from 360 bytes to 296. Found with cppcheck, unusedStructMember. Signed-off-by:
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Krzysztof Kozlowski authored
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Message-ID: <20240330210954.100842-1-krzysztof.kozlowski@linaro.org> Signed-off-by:
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Andy Shevchenko authored
In the comment, function prototype, and array of strings indentation is kinda broken. Reindent that. Signed-off-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-11-andy.shevchenko@gmail.com> Signed-off-by:
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Andy Shevchenko authored
One header was misplaced and group pinctrl/* ones to show the relation with the pin control subsystem. Signed-off-by:
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Andy Shevchenko authored
Simplify the error handling in probe function by switching from dev_err() to dev_err_probe(). Signed-off-by:
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Andy Shevchenko authored
The irqchip field is allocated, assigned but never used. Remove it. Signed-off-by:
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Andy Shevchenko authored
When the variable is declared as u8, no need to perform ' & U8_MAX' as it's implied anyway. Signed-off-by:
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Andy Shevchenko authored
There are two different ways on how to get HW IRQ number in some functions. Unify that by using temporary variable and irqd_to_hwirq() call. Signed-off-by:
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Andy Shevchenko authored
Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Signed-off-by:
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Andy Shevchenko authored
The ports are equivalent from the user's point of view. Don't limit trying them both if writing to one fails. Signed-off-by:
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Andy Shevchenko authored
The pin control subsystem internally uses ENOTSUPP for the not supported functionality. The checkpatch is false positive about this error code. Signed-off-by:
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Andy Shevchenko authored
If aw9523_hw_init() fails on ->remove() the mutex left alive. Destroy it in that case as well. While at it, remove never true check at the beginning of the function. Signed-off-by:
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- 02 Apr, 2024 1 commit
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Arnd Bergmann authored
This variable has never been used and can be removed to avoid a W=1 warning: drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:837:6: error: variable 'i' set but not used [-Werror,-Wunused-but-set-variable] 837 | int i = 0; Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Message-ID: <20240322132205.906729-1-arnd@kernel.org> Signed-off-by:
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