An error occurred fetching the project authors.
- 30 Dec, 2013 1 commit
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Abhilash Kesavan authored
Due to incorrect clock specified in MDMA0 node, using MDMA0 controller could cause system failures, due to wrong clock being controlled. This patch fixes this by specifying correct clock. Signed-off-by:
Abhilash Kesavan <a.kesavan@samsung.com> Acked-by:
Mike Turquette <mturquette@linaro.org> [t.figa: Corrected commit message and description.] Signed-off-by:
Tomasz Figa <t.figa@samsung.com>
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- 13 Oct, 2013 1 commit
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Yuvaraj Kumar C D authored
Without the "clock-frequency" property in arch timer node, could able to see the below crash dump. [<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14) [<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0) [<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18) [<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74) [<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134) [<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c) [<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58) [<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c) [<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c) THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set up the CNTFRQ register as expected by arch_timer. Instead, we have to specify the frequency in the device tree like this. Signed-off-by:
Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> [olof: Changed subject, added comment, elaborated on commit message] Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 07 Oct, 2013 3 commits
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Rahul Sharma authored
Fix wrong clock numbers in hdmi dt node. Removed hdmiphy clock which was a dummy clock earlier and not required now. Also added mux clock to change the clock parent. Signed-off-by:
Rahul Sharma <rahul.sharma@samsung.com> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Sean Paul authored
This patch adds the mixer clocks to the mixer node in the exynos 5250 dts file. Signed-off-by:
Sean Paul <seanpaul@chromium.org> Signed-off-by:
Rahul Sharma <rahul.sharma@samsung.com> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown authored
Rather than requiring each board to explicitly disable the I2S controllers it is not using instead require boards to enable those that they are using. This is required for audio operation on Arndale, one of the unused I2S controllers is pinmuxed with the LDO enable GPIOs for the WM1811A. Signed-off-by:
Mark Brown <broonie@linaro.org> Acked-by:
Mark Rutland <mark.rutland@arm.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 25 Aug, 2013 3 commits
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Naveen Krishna Chatradhi authored
Add ADC device tree node for exynos5420 and exynos5250 Signed-off-by:
Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Moves the RTC DT node's "status" property from exynos5250 board (arndale & snow) dts files to exynos5250.dtsi, since the bindings in exynos5250.dtsi depicts the RTC h/w completely. Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Fixes the RTC DT node name for Exynos5250 as per the DT node naming convention. Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 18 Aug, 2013 3 commits
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Arun Kumar K authored
The patch adds the MFC clock entry for the 5250 SoC. Signed-off-by:
Arun Kumar K <arun.kk@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Moves the properties of DP controller to exynos5.dtsi which are common across exynos5 SoCs like Exynos5250 and Exynos5420. The PHY DP Node is based on Jingoo Han's <jg1.han@samsung.com> patch at https://patchwork.linuxtv.org/patch/19189/Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Moves the properties of FIMD DT node which are common across Exynos5 based SoCs like Exynos5250 and Exynos5420 to exynos5.dtsi Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 16 Aug, 2013 2 commits
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Padmavathi Venna authored
This patch removes quirks from i2s node and change the i2s compatible names. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Signed-off-by:
Mark Brown <broonie@linaro.org>
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Mark Brown authored
Revert "ARM: dts: Change i2s compatible string on exynos5250" (c7f7e6) and "ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi" 618728) since they reference DMA controller nodes that don't exist causing DT build issues. Reported-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Mark Brown <broonie@linaro.org>
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- 13 Aug, 2013 2 commits
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Padmavathi Venna authored
This patch removes quirks from i2s node and change the i2s compatible names. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Mark Brown <broonie@linaro.org>
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Padmavathi Venna authored
I2S nodes shares some properties across exynos5 SoCs (exynos5250 and exyno5420). Common code is moved to exynos5.dtsi which is included in exyno5250 and exynos5420 SoC files. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Mark Brown <broonie@linaro.org>
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- 05 Aug, 2013 1 commit
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Lee Jones authored
Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 31 Jul, 2013 1 commit
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Sachin Kamat authored
Adds G2D node to exynos5250 DT file. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 28 Jun, 2013 1 commit
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Rahul Sharma authored
This patch renames the combatible strings for hdmi, mixer, ddc and hdmiphy. It follows the convention of using compatible string which represent the SoC in which the IP was added for the first time. Signed-off-by:
Rahul Sharma <rahul.sharma@samsung.com> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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- 18 Jun, 2013 5 commits
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Chander Kashyap authored
Instead of having to specify the number for CPUs in EXYNOS5250 in platsmp.c file, let the number of CPUs be determined by having this information listed in EXYNOS5250 device tree file. Signed-off-by:
Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Chander Kashyap authored
In preparation of adding support for EXYNOS5420, which has many peripherals similar to EXYNOS5250, a new common EXYNOS5 device tree source file is created out of the exising EXYNOS5250 device tree source file. Only the common nodes required for basic boot up on EXYNOS5420 based boards are moved into this new file and the rest of the common nodes would be moved subsequently. EXYNOS5440 SoC is quite different from EXYNOS5250 and EXYNOS5420. Hence it is not possible to reuse "exynos5.dtsi" for EXYNOS5440. Signed-off-by:
Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Padmavathi Venna authored
Add clock lookup information for i2s controllers on exynos5250 SoC. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Reviewed-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Padmavathi Venna authored
Audio subsystem introduced in s5pv210 and exynos platforms which has a internal clock controller. This patch adds a node for the same on exynos5250. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Reviewed-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Padmavathi Venna authored
Replace /include/ (dtc) with #include (C pre-processor) for all Samsung DT files Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Reviewed-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 17 Jun, 2013 1 commit
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Padmavathi Venna authored
This patch corrects the base address of pinctrl_3 on Exynos5250 platform. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 10 Jun, 2013 3 commits
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Vikas Sajjan authored
Adds clock provider information for DP controller required by CCF. Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by:
Arun Kumar K <arun.kk@samsung.com> Acked-by:
Jingoo Han <jg1.han@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vivek Gautam authored
Adding DWC3 device tree node for Exynos5250 needed to parse device tree data. Signed-off-by:
Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Vivek Gautam authored
Adding usb3.0 phy node for Exynos5250 along with the necessary device data to be parsed. Signed-off-by:
Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 20 May, 2013 1 commit
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Vivek Gautam authored
Adding usbphy node for Exynos5250 along with the necessary device data to be parsed. Signed-off-by:
Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 27 Apr, 2013 1 commit
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Doug Anderson authored
This change makes the rtc on the exynos5250 and 5440 disabled by default to match exynos4. Ever since the common clock framework came in, exynos5250 boards have dumped lots of warnings in the boot log. It turns out that we don't see those on exynos4 since the rtc is disabled by default. While we need to get to the bottom of the problems with the RTC, it still makes sense to have the default state of the RTC on exynos boards match. For the record, warnings look like this: ------------[ cut here ]------------ WARNING: at drivers/clk/clk.c:771 __clk_enable+0x34/0xb0() Modules linked in: [<80015bfc>] (unwind_backtrace+0x0/0xec) from [<804717f0>] (dump_stack+0x20/0x24) [<804717f0>] (dump_stack+0x20/0x24) from [<80023cd0>] (warn_slowpath_common+0x5c/0x7c) [<80023cd0>] (warn_slowpath_common+0x5c/0x7c) from [<80023d1c>] (warn_slowpath_null+0x2c/0x34) [<80023d1c>] (warn_slowpath_null+0x2c/0x34) from [<8035ddb0>] (__clk_enable+0x34/0xb0) [<8035ddb0>] (__clk_enable+0x34/0xb0) from [<8035de54>] (clk_enable+0x28/0x3c) [<8035de54>] (clk_enable+0x28/0x3c) from [<8031a160>] (s3c_rtc_probe+0xf4/0x434) [<8031a160>] (s3c_rtc_probe+0xf4/0x434) from [<8028e288>] (platform_drv_probe+0x24/0x28) [<8028e288>] (platform_drv_probe+0x24/0x28) from [<8028ce10>] (driver_probe_device+0xbc/0x22c) [<8028ce10>] (driver_probe_device+0xbc/0x22c) from [<8028cff8>] (__driver_attach+0x78/0x9c) [<8028cff8>] (__driver_attach+0x78/0x9c) from [<8028bdfc>] (bus_for_each_dev+0x64/0xac) [<8028bdfc>] (bus_for_each_dev+0x64/0xac) from [<8028c7e0>] (driver_attach+0x28/0x30) [<8028c7e0>] (driver_attach+0x28/0x30) from [<8028c43c>] (bus_add_driver+0xe0/0x234) [<8028c43c>] (bus_add_driver+0xe0/0x234) from [<8028d55c>] (driver_register+0xac/0x13c) [<8028d55c>] (driver_register+0xac/0x13c) from [<8028e4f4>] (platform_driver_register+0x54/0x68) [<8028e4f4>] (platform_driver_register+0x54/0x68) from [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c) [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c) from [<800086d8>] (do_one_initcall+0x60/0x138) [<800086d8>] (do_one_initcall+0x60/0x138) from [<80633a8c>] (kernel_init_freeable+0x108/0x1d0) [<80633a8c>] (kernel_init_freeable+0x108/0x1d0) from [<8046d2f8>] (kernel_init+0x1c/0xf4) [<8046d2f8>] (kernel_init+0x1c/0xf4) from [<8000e358>] (ret_from_fork+0x14/0x20) ---[ end trace 4bcdc801c868d73f ]--- Signed-off-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 25 Apr, 2013 1 commit
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Thomas Abraham authored
Add chip-id controller nodes for Exynos4 and Exynos5 SoCs. Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 08 Apr, 2013 6 commits
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Chanho Park authored
This patch enables arm-pmu to bind device tree for exynos5250. The exynos5250 has two pmus which have combiner irq type. Reviewed-by:
Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by:
Chanho Park <chanho61.park@samsung.com> Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Leela Krishna Amudala authored
This adds common FIMD device node for all Exynos5 SoCs Signed-off-by:
Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Doug Anderson authored
This is a fixup to two device tree nodes that have already landed but without clock nodes since the transition to common clock happened at the same time. Signed-off-by:
Doug Anderson <dianders@chromium.org> Reviewed-by:
Jingoo Han <jg1.han@samsung.com> [gautam.vivek@samsung.com: tested on smdk5250] Tested-by:
Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Alexander Graf authored
The exynos 5250 SoC supports A15 style architected timers. Indicate this through the device tree. This is required by KVM. Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Alexander Graf authored
The GIC in the exynos5250 SoC is A15 compliant. Show this through the device tree, so that we can use the GIC for KVM. Also add the respective A15 memory regions and interrupt links. Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Thomas Abraham authored
Add default pin state information for all client nodes that require pin configuration support using pinctrl interface. Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Tested-by:
Doug Anderson <dianders@chromium.org> Reviewed-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 25 Mar, 2013 2 commits
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Thomas Abraham authored
For all supported peripheral controllers on Exynos5250, add clock lookup information. Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Thomas Abraham authored
Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250 and EXYNOS5440 SoCs. Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 09 Mar, 2013 1 commit
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Thomas Abraham authored
Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250. Cc: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- 07 Mar, 2013 1 commit
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Prasanna Kumar authored
This patch adds device tree nodes for MFC and G-scaler power domains of exynos5250.It binds these power-domain nodes to repsective device tree nodes It also adds support to enable PM generic domains for exynos5250. Signed-off-by:
Prasanna Kumar <prasanna.ps@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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