- 27 Jun, 2017 21 commits
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Ilan Tayari authored
In RX data path, the hardware prepends a special metadata ethertype which indicates that the packet underwent decryption, and the result of the authentication check. Communicate this to the stack in skb->sp. Make wqe_size large enough to account for the injected metadata. Support only Linked-list RQ type. IPSec offload RX packets may have useful CHECKSUM_COMPLETE information, which the stack may not be able to use yet. Signed-off-by:
Ilan Tayari <ilant@mellanox.com> Signed-off-by:
Yossi Kuperman <yossiku@mellanox.com> Signed-off-by:
Yevgeny Kliteynik <kliteyn@mellanox.com> Signed-off-by:
Boris Pismenny <borisp@mellanox.com> Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com>
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Ilan Tayari authored
Add Innova IPSec ESP crypto offload configuration paths. Detect Innova IPSec device and set the NETIF_F_HW_ESP flag. Configure Security Associations using the API introduced in a previous patch. Add Software-parser hardware descriptor layout Software-Parser (swp) is a hardware feature in ConnectX which allows the host software to specify protocol header offsets in the TX path, thus overriding the hardware parser. This is useful for protocols that the ASIC may not be able to parse on its own. Note that due to inline metadata, XDP is not supported in Innova IPSec. Signed-off-by:
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Ilan Tayari authored
Add routines for manipulating the hardware IPSec SA database (SADB). In Innova IPSec, a Security Association (SA) is added or deleted via a command message over the SBU connection. The HW then sends a response message over the same connection. Add implementation for Innova IPSec (FPGA-based) hardware. These routines will be used by the IPSec offload support in a later patch However they may also be used by others such as RDMA and RoCE IPSec. mlx5/accel is a middle acceleration layer to allow mlx5e and other ULPs to work directly with mlx5_core rather than Innova FPGA or other mlx5 acceleration providers. In this patchset we add Innova IPSec support and mlx5/accel delegates IPSec offloads to Innova routines. In the future, when IPSec/TLS or any other acceleration gets integrated into ConnectX chip, mlx5/accel layer will provide the integrated acceleration, rather than the Innova one. Signed-off-by:
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Ilan Tayari authored
Add interface to initialize and interact with Innova FPGA SBU connections. A client driver may use these functions to set up a high-speed DMA connection with its SBU hardware logic, and send/receive messages over this connection. A later patch in this patchset will make use of these functions for Innova IPSec offload in mlx5 Ethernet driver. Add commands to retrieve Innova FPGA SBU capabilities, and to read/write Innova FPGA configuration space registers and memory, over internal I2C. At high level, the FPGA configuration space is divided such: 0x00000000 - 0x007fffff is reserved for the SBU 0x00800000 - 0xffffffff is reserved for the Shell 0x400000000 - ... is DDR memory A later patchset will add support for accessing FPGA CrSpace and memory over a high-speed connection. This is the reason for the ACCESS_TYPE enumeration, which currently only supports I2C. Signed-off-by:
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Ilan Tayari authored
The Innova FPGA includes shell hardware and Sandbox-Unit (SBU) hardware. The shell hardware is handled by mlx5_core itself, while the SBU is handled by a client driver. Reset the SBU to a well-known initial state when initializing a new device, and set the FPGA to bypass mode when uninitializing a device. This allows the client driver to assume that its device has been reset when a new device is detected. During SBU reset, the FPGA is put into SBU-bypass mode. In this mode packets do not pass through the SBU, so it cannot affect the network data stream at all. A factory-image does not have an SBU, so skip these flows. Signed-off-by:
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Ilan Tayari authored
An FPGA high-speed connection has two endpoints, an FPGA QP and a ConnectX QP. Add library routines to create and connect the endpoints of an FPGA high-speed connection. These routines allow creating and interacting with both types of connections: Shell and Sandbox Unit (SBU). Shell connection provides an interface to the FPGA's address space, which includes the configuration space and the DDR. Use of the shell connection will be introduced in a later patchset. SBU connection provides a command and/or data interface to the application-specific logic within the FPGA. Use of the SBU connection will be introduced in a later patch in this patchset. Some struct definitions are added to a new header file sdk.h, which will be extended in later patches in the patchset. This header file will contain the in-kernel FPGA client driver API. Signed-off-by:
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Ilan Tayari authored
The FPGA QP is a high-bandwidth communication channel between the host CPU and the FPGA device. It allows performing DMA operations between host memory and the FPGA logic via the ConnectX chip. Add ConnectX FW commands which create and manipulate FPGA QPs. Signed-off-by:
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Ilan Tayari authored
The FPGA init and cleanup routines should be called just once per device. Move them to the init_once and cleanup_once routines. Signed-off-by:
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Ilan Tayari authored
A QP in ConnectX is a concatenation of RQ and SQ which share a QP-number and work together. Add support for allocating and managing the work-queue buffer for a QP, in a similar way to how SQs and RQs are already supported. Signed-off-by:
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Ilan Tayari authored
Move mlx5e_get_cqe routine to wq.h and rename it to mlx5_cqwq_get_cqe. This allows it to be used by other CQ users outside of the ethernet driver code. A later patch in this patchset will make use of it from FPGA code for the FPGA high-speed connection. Signed-off-by:
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Ilan Tayari authored
Reserved gids are taken by the mlx5_core, report smaller GID table size to IB core. Set mlx5_query_roce_port's return value back to int. In case of error, return an indication. This rolls back some of the change in commit 50f22fd8 ("IB/mlx5: Set mlx5_query_roce_port's return value to void") Change set_roce_addr to use gid_set function, instead of directly sending the command. Signed-off-by:
Leon Romanovsky <leonro@mellanox.com> Signed-off-by:
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Ilan Tayari authored
Previously, only mlx5_ib enabled RoCE on the port, but FPGA needs it as well. Add support for counting number of enables, so that FPGA and IB can work in parallel and independently. Program the HW to enable RoCE on the first enable call, and program to disable RoCE on the last disable call. Signed-off-by:
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Ilan Tayari authored
Reserved GIDs are entries in the GID table in use by the mlx5_core and its submodules (e.g. FPGA, SRIOV, E-Swtich, netdev). The entries are reserved at the high indexes of the GID table. A mlx5 submodule may reserve a certain amount of GIDs for its own use during the load sequence by calling mlx5_core_reserve_gids, and must also take care to un-reserve these GIDs when it closes. Reservation is only allowed during the load sequence and before any interfaces (e.g. mlx5_ib or mlx5_en) are up. After reservation, a submodule may call mlx5_core_reserved_gid_alloc/ free to allocate entries from the reserved GIDs pool. Reserve a GID table entry for every supported FPGA QP. A later patch in the patchset will remove them from being reported to IB core. Another such patch will make use of these for FPGA QPs in Innova NIC. Added lib/mlx5.h to serve as a library for mlx5 submodlues, and to expose only public mlx5 API, more mlx5 library files will be added in future submissions. Signed-off-by:
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Ilan Tayari authored
In load_one, the interface flags are changed from down to up, only after initializing the interfaces. In unload_one, the flags are changed from up to down before the interface cleanup. Change the cleanup order to be opposite to initialization order. This fixes flag consistency between init and cleanup. Signed-off-by:
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Colin Ian King authored
Trivial fix to spelling mistake in en_dbg debug message Signed-off-by:
Colin Ian King <colin.king@canonical.com> Acked-by:
Tariq Toukan <tariqt@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Matthias Schiffer says: ==================== net: add netlink_ext_ack support to rtnl_link_ops Same changes as http://patchwork.ozlabs.org/patch/780351/ , split into separate patches for each rtnl_link_ops field as requested. ==================== Signed-off-by:
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Matthias Schiffer authored
Add support for extended error reporting. Signed-off-by:
Matthias Schiffer <mschiffer@universe-factory.net> Acked-by:
David Ahern <dsahern@gmail.com> Signed-off-by:
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Matthias Schiffer authored
Add support for extended error reporting. Signed-off-by:
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Matthias Schiffer authored
Add support for extended error reporting. Signed-off-by:
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Matthias Schiffer authored
Add support for extended error reporting. Signed-off-by:
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Matthias Schiffer authored
Add support for extended error reporting. Signed-off-by:
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- 25 Jun, 2017 19 commits
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Michael Grzeschik authored
In case the MACB is directly connected to a non-mdio PHY/device, it should be possible to provide a fixed link configuration in the DT. Signed-off-by:
Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by:
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David S. Miller authored
Merge tag 'wireless-drivers-next-for-davem-2017-06-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for 4.13 New features and bug fixes to quite a few different drivers, but nothing really special standing out. What makes me happy that we have now more vendors actively contributing to upstream drivers. In this pull request we have patches from Broadcom, Intel, Qualcomm, Realtek and Redpine Signals, and I still have patches from Marvell and Quantenna pending in patchwork. Now that's something comparing to how things looked 11 years ago in Jeff Garzik's "State of the Union: Wireless" email: https://lkml.org/lkml/2006/1/5/671 Major changes: wil6210 * add low level RF sector interface via nl80211 vendor commands * add module parameter ftm_mode to load separate firmware for factory testing * support devices with different PCIe bar size * add support for PCIe D3hot in system suspend * remove ioctl interface which should not be in a wireless driver ath10k * go back to using dma_alloc_coherent() for firmware scratch memory * add per chain RSSI reporting brcmfmac * add support multi-scheduled scan * add scheduled scan support for specified BSSIDs * add support for brcm43430 revision 0 wlcore * add wil1285 compatible rsi * add RS9113 USB support iwlwifi * FW API documentation improvements (for tools and htmldoc) * continuing work for the new A000 family * bump the maximum supported FW API to 31 * improve the differentiation between 8000, 9000 and A000 families ==================== Signed-off-by:
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David S. Miller authored
Marcelo Ricardo Leitner says: ==================== sctp: RFC 4960 Errata fixes This patchset contains fixes for 4 Errata topics from https://tools.ietf.org/html/draft-ietf-tsvwg-rfc4960-errata-01 Namely, sections: 3.12. Order of Adjustments of partial_bytes_acked and cwnd 3.22. Increase of partial_bytes_acked in Congestion Avoidance 3.26. CWND Increase in Congestion Avoidance Phase 3.27. Refresh of cwnd and ssthresh after Idle Period Tests performed with netperf using net namespaces, with drop rates at 0%, 0.5% and 1% by netem, IPv4 and IPv6, 10 runs for each combination. I couldn't spot differences on the stats. With and without these patches the results vary in a similar way in terms of throughput and retransmissions. Tests with 20ms delay and 20ms delay + drops at 0.5% and 1% also had results in a similar way, no noticeable difference. Looking at cwnd, it was possible to notice slightly lower values being used while still sustaining same throughput profile. ==================== Signed-off-by:
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Marcelo Ricardo Leitner authored
RFC 4960 Errata 3.27 identifies that ssthresh should be adjusted to cwnd because otherwise it could cause the transport to lock into congestion avoidance phase specially if ssthresh was previously reduced by some packet drop, leading to poor performance. The Errata says to adjust ssthresh to cwnd only once, though the same goal is achieved by updating it every time we update cwnd too. The caveat is that we could take longer to get back up to speed but that should be compensated by the fact that we don't adjust on RTO basis (as RFC says) but based on Heartbeats, which are usually way longer. See-also: https://tools.ietf.org/html/draft-ietf-tsvwg-rfc4960-errata-01#section-3.27Signed-off-by:
Marcelo Ricardo Leitner <marcelo.leitner@gmail.com> Signed-off-by:
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Marcelo Ricardo Leitner authored
RFC4960 Errata 3.26 identified that at the same time RFC4960 states that cwnd should never grow more than 1*MTU per RTT, Section 7.2.2 was underspecified and as described could allow increasing cwnd more than that. This patch updates it so partial_bytes_acked is maxed to cwnd if flight_size doesn't reach cwnd, protecting it from such case. See-also: https://tools.ietf.org/html/draft-ietf-tsvwg-rfc4960-errata-01#section-3.26Signed-off-by:
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Marcelo Ricardo Leitner authored
As per RFC4960 Errata 3.22, this condition is not needed anymore as it could cause the partial_bytes_acked to not consider the TSNs acked in the Gap Ack Blocks although they were received by the peer successfully. This patch thus drops the check for new Cumulative TSN Ack Point, leaving just the flight_size < cwnd one. See-also: https://tools.ietf.org/html/draft-ietf-tsvwg-rfc4960-errata-01#section-3.22Signed-off-by:
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Marcelo Ricardo Leitner authored
RFC4960 Errata 3.12 says RFC4960 is unclear about the order of adjustments applied to partial_bytes_acked and cwnd in the congestion avoidance phase, and that the actual order should be: partial_bytes_acked is reset to (partial_bytes_acked - cwnd). Next, cwnd is increased by MTU. We were first increasing cwnd, and then subtracting the new value pba, which leads to a different result as pba is smaller than what it should and could cause cwnd to not grow as much. See-also: https://tools.ietf.org/html/draft-ietf-tsvwg-rfc4960-errata-01#section-3.12Signed-off-by:
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Mintz, Yuval authored
Looks like commit f663dd9a ("net: core: explicitly select a txq before doing l2 forwarding") has removed the need for this dedicated xmit function [it even explicitly states so in its commit log message] but it hasn't removed the definition of the ndo. Signed-off-by:
Yuval Mintz <Yuval.Mintz@cavium.com> CC: Jason Wang <jasowang@redhat.com> CC: John Fastabend <john.r.fastabend@intel.com> Signed-off-by:
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David S. Miller authored
Timur Tabi says: ==================== net: qcom/emac: various minor improvements A collection of minor fixes and features to the Qualcomm Technologies EMAC network driver. ==================== Signed-off-by: -
Timur Tabi authored
On emulation systems, the EMAC's internal PHY ("SGMII") is not present, but is not needed for network functionality. So just display a warning message and ignore the SGMII. Tested-by:Philip Elcan <pelcan@codeaurora.org> Tested-by:
Adam Wallis <awallis@codeaurora.org> Signed-off-by:
Timur Tabi <timur@codeaurora.org> Signed-off-by:
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Timur Tabi authored
On ACPI systems, the driver depends on firmware pre-initializing the EMAC because we don't have access to the clocks, and the EMAC has specific clock programming requirements. Therefore, we don't want to reset the EMAC while we are completing the initialization. Tested-by:
Richard Ruigrok <rruigrok@codeaurora.org> Signed-off-by:
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Timur Tabi authored
The shutdown function halts all DMA and interrupts, so that all operations are discontinued when the system shuts down, e.g. via kexec or a forced reboot. Tested-by:
Tyler Baicar <tbaicar@codeaurora.org> Signed-off-by:
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Mateusz Jurczyk authored
Verify that the caller-provided sockaddr structure is large enough to contain the sa_family field, before accessing it in bind() and connect() handlers of the AF_IUCV socket. Since neither syscall enforces a minimum size of the corresponding memory region, very short sockaddrs (zero or one byte long) result in operating on uninitialized memory while referencing .sa_family. Fixes: 52a82e23 ("af_iucv: Validate socket address length in iucv_sock_bind()") Signed-off-by:
Mateusz Jurczyk <mjurczyk@google.com> [jwi: removed unneeded null-check for addr] Signed-off-by:
Julian Wiedmann <jwi@linux.vnet.ibm.com> Signed-off-by:
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Hans Wippel authored
Use proper endianness conversion for an skb protocol assignment. Given that IUCV is only available on big endian systems (s390), this simply avoids an endianness warning reported by sparse. Signed-off-by:
Hans Wippel <hwippel@linux.vnet.ibm.com> Reviewed-by:
Ursula Braun <ubraun@linux.vnet.ibm.com> Signed-off-by:
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Dan Carpenter authored
We're accidentally returning the wrong variable. "cmode" is uninitialized at this point so it causes a static checker warning. Fixes: 6335e9f2 ("net: dsa: mv88e6xxx: mv88e6390X SERDES support") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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David S. Miller authored
Simon Horman says: ==================== nfp: add flower app with representors this series adds a flower app to the NFP driver. It initialises four types of netdevs: * PF netdev - lower-device for communication of packets to device * PF representor netdev * VF representor netdevs * Phys port representor netdevs The PF netdev acts as a lower-device which sends and receives packets to and from the firmware. The representors act as upper-devices. For TX representors attach a metadata dst to the skb which is used by the PF netdev to prepend metadata to the packet before forwarding the firmware. On RX the PF netdev looks up the representor based on the prepended metadata received from the firmware and forwards the skb to the representor after removing the metadata. Control queues are used to send and receive control messages which are used to communicate configuration information with the firmware. These are in separate vNIC to the queues belonging to the PF netdev. The control queues are not exposed to use-space via a netdev or any other means. The first 9 patches of this series provide app-independent infrastructure to instantiate representors and the remaining 3 patches provide an app which uses this infrastructure. As the name implies this app is targeted at providing offload of TC flower. Flower offload - allowing classifiers to be attached to representor netdevs - is intended to be provided by follow-up patches at which point it will become the dominant feature of the app. Minor changes since v2 noted in changelogs of individual patches. Review of v1 and v2 of this patchset have been addressed either through discussion on-list or changes in this patchset. ==================== Signed-off-by: -
Simon Horman authored
Initialise VF and PF representors in flower app. Based in part on work by Benjamin LaHaise, Bert van Leeuwen and Jakub Kicinski. Signed-off-by:
Simon Horman <simon.horman@netronome.com> Reviewed-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
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Simon Horman authored
Add app for flower offload. At this point the PF netdev and phys port representor netdevs are initialised. Follow-up work will add support for VF and PF representors and beyond that offloading the flower classifier. Based in part on work by Benjamin LaHaise and Bert van Leeuwen. Signed-off-by:
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Simon Horman authored
In preparation for adding a new flower app - targeted at offloading the flower classifier - provide support for control message that it will use to communicate with the NFP. Based in part on work by Bert van Leeuwen. Signed-off-by:
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