- 06 Apr, 2016 40 commits
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The event manager handles power related driver events. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit e92a0370) Signed-off-by:
Alberto Milone <alberto.milone@canonical.com> Signed-off-by:
Tim Gardner <tim.gardner@canonical.com>
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This adds clock and powergating support for CZ. v2: squash in fixes Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This patch enables basic DPM support for Carrizo. DPM handles dynamic clock and voltage scaling. v3: delete peci sub-module v2: use cgs interface directly correct define SMU_EnabledFeatureScoreboard_SclkDpmOn Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This implements the SMU firmware manager interface for CZ. Some header files are moved from amdgpu folder to powerplay as well. v3: delete peci sub-module. v2: use cgs interface directly add load_mec_firmware function Signed-off-by:
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Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Fixes compile failure on non-amd64 arches: drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_thermal.c: In function 'tonga_fan_ctrl_get_fan_speed_percent': drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_thermal.c:80:11: error: 'EINVAL' undeclared (first use in this function) return -EINVAL; Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The hwmgr handles all hardware related calls, including clock/power gating control, DPM, read and parse PPTable, etc. v5: squash in fixes v4: implement acpi's atcs function use cgs interface v3: fix code style error and add big-endian mode support. v2: use cgs interface directly in hwmgr sub-module Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The SMUMGR is one sub-component of powerplay for SMU firmware support. The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.) on VI parts. The adds the core powerplay infrastructure to handle that. v3: direct use printk in powerplay module. v2: direct use cgs_read/write_register functions in smu-modules Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Update amdgpu to deal with the new powerplay module properly. v2: squash in fixes v3: squash in Rex's power state reporting fix Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Powerplay will use a different interface once it's integrated. These legacy pathes will be removed once powerplay is enabled by default. Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 amdgpu_pp_ip_funcs is introduced to handle the two code paths, the legacy one and the new powerplay implementation. CONFIG_DRM_AMD_POWERPLAY kernel configuration option is introduced for the powerplay component. v4: squash in fixes v3: register debugfs file when powerplay module enable v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add new CGS interfaces to query display info across modules. This is nedded by the powerplay module for synchronizing with the display module. v2: (agd): fold in refresh rate fix, rebase Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add a query to get the bus number and function of the device. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add a new driver internal interface for accessing ACPI methods. These will be used by various new components including powerplay. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This will be shared with the new powerplay module. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 These will be shared with the new powerplay module. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 rename amdgpu_pm_state_type to amd_pm_state_type Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by:
Tom St Denis <tom.stdenis@amd.com> Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by:
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Matt Roper authored
BugLink: http://bugs.launchpad.net/bugs/1546572 pan_display_atomic() calls drm_atomic_clean_old_fb() to sanitize the legacy FB fields (plane->fb and plane->old_fb). However it was building the plane mask to pass to this function incorrectly (the bitwise OR was using plane indices rather than plane masks). The end result was that sometimes the legacy pointers would become out of sync with the atomic pointers. If another operation tried to re-set the same FB onto the plane, we might end up with the pointers back in sync, but improper reference counts, which would eventually lead to system crashes when we accessed a pointer to a prematurely-destroyed FB. The cause here was a very subtle bug introduced in commit: commit 07d3bad6 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Wed Nov 11 11:29:11 2015 +0100 drm/core: Fix old_fb handling in pan_display_atomic. I found the crashes were most easily reproduced (on i915 at least) by starting X and then VT switching to a VT that wasn't running a console instance...the sequence of vt/fbcon entries that happen in that case trigger a reference count mismatch and crash the system. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93313Signed-off-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 7118fd9b) Signed-off-by:
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Nicolai Hähnle authored
BugLink: http://bugs.launchpad.net/bugs/1546572 In the rare situation where the kmalloc fails we're probably screwed anyway, but let's try to be more robust about it. Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
Nicolai Hähnle <Nicolai.Haehnle@amd.com> Signed-off-by:
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Thierry Reding authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Commit 88e72717 ("drm/irq: Use unsigned int pipe in public API") updated the prototype of this function but not the implementation. This wasn't noticed even through compile tests because the prototype is part of the source file that uses it and hence the compiler won't know the prototype when it compiles the implementation. The right thing would've been to move the prototype to a header that's included in radeon_kms.c so that the implementation signature could be checked against it, but the closest thing would've been radeon_drv.h and including that results in a lot of build errors, so we'll leave it as is for now. Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Christian König authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This avoids allocating it on the fly. v2: fix grammar in comment Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> (cherry picked from commit ee1782c3) Signed-off-by:
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Christian König authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This way we avoid the extra allocation for the page directory entry. Signed-off-by:
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Christian König authored
BugLink: http://bugs.launchpad.net/bugs/1546572 They share the reservation object with the page directory anyway. Signed-off-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 In some cases the amount of vram may be less than the BAR size, if so, limit visible vram to the amount of actual vram, not the BAR size. Reviewed-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Change the default scheduler queue size from 16 to 32. Signed-off-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572Signed-off-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Properly handle ctx init failure. Signed-off-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 umd somtimes will create a context for every ring, that means some entities wouldn't be used at all. Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add more fine grained debugging output for init/fini/suspend/ resume failures. Signed-off-by:
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Flora Cui authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2 Signed-off-by:
Flora Cui <Flora.Cui@amd.com> Reviewed-by:
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Flora Cui authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Use default value as a base. Signed-off-by:
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Flora Cui authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Otherwise FW cannot see the RLC ACK for the memory clean request It's for Stoney. Signed-off-by:
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Chunming Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Allows us to set priorities in the scheduler. Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> (cherry picked from commit d033a6de) Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This adds EDC support for CZ. EDC = Error Correction and Detection This code properly initializes the EDC hardware and resets the error counts. This is done in late_init since it requires the IB pool which is not initialized during hw_init. v2: fix the IB size as noted by Felix, fix shader pgm register programming v3: use the IB for the shaders as suggested by Christian Reviewed-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 EDC is a RAS feature for on chip memory. Reviewed-by:
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Daniel Vetter authored
BugLink: http://bugs.launchpad.net/bugs/1546572 For drm_gem_object_unreference callers are required to hold dev->struct_mutex, which these paths don't. Enforcing this requirement has become a bit more strict with commit ef4c6270 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 15 09:36:25 2015 +0200 drm/gem: Check locking in drm_gem_object_unreference Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Daniel Vetter <daniel.vetter@intel.com> Signed-off-by:
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Daniel Vetter authored
BugLink: http://bugs.launchpad.net/bugs/1546572 For drm_gem_object_unreference callers are required to hold dev->struct_mutex, which these paths don't. Enforcing this requirement has become a bit more strict with commit ef4c6270 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 15 09:36:25 2015 +0200 drm/gem: Check locking in drm_gem_object_unreference Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
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monk.liu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Read the vbios directly from the rom. In some cases, e.g., virtualization, the rom is not available via the BAR or other means. Access it directly. This is an updated version of Monks original patch which uses family specific callbacks and unifies some of the validation checking. Reviewed-by:
Monk Liu <Monk.Liu@amd.com> Signed-off-by:
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