1. 20 Apr, 2011 2 commits
    • Eduardo Valentin's avatar
      OMAP2+: PM: Fix the saving of CM_AUTOIDLE_PLL register on scratchpad area · 8bc2e98b
      Eduardo Valentin authored
      The saving of CCR.CM_AUTOIDLE_PLL is done in scratchpad area.
      
      However, in current code, the saving is done for CM_AUTOIDLE2_PLL
      (offset 0x34) instead of CM_AUTOIDLE_PLL (offset 0x30).
      
      This patch changes the code to save the correct register.
      Signed-off-by: default avatarEduardo Valentin <eduardo.valentin@ti.com>
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      8bc2e98b
    • Tomi Valkeinen's avatar
      OMAP4: clock data: Change DSS clock aliases · 2df122f5
      Tomi Valkeinen authored
      DSS driver has used fck and ick clocks on OMAP2/3 to get DSS HW up and
      running, and also to get the pixel clock's source clock rate from the
      fck.
      
      On OMAP4 the clock data is set up in a different way, as there's no ick,
      dss_fck points to a fake clock which just affects DSS's MODULEMODE, and
      dss_dss_clk if the DSS_FCK.
      
      >From DSS driver's point of view the dss_fck sounds like an ick, and
      dss_dss_clk is the fck. While this is not entirely correct from HW point
      of view, especially for the ick, configuring the clock aliases that way
      makes DSS "just work" with OMAP4's clock setup.
      
      In the (hopefully near) future DSS driver will be reworked to use
      pm_runtime support which should clean up the clock code.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      2df122f5
  2. 19 Apr, 2011 2 commits
  3. 18 Apr, 2011 30 commits
  4. 17 Apr, 2011 6 commits