- 21 Jul, 2023 1 commit
-
-
Shengjiu Wang authored
Support DAC filter characteristics selection: Normal mode and Sloping stopband. Sloping stopband may have better frequency response. Signed-off-by:
Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/1689927842-21165-1-git-send-email-shengjiu.wang@nxp.comSigned-off-by:
Mark Brown <broonie@kernel.org>
-
- 20 Jul, 2023 10 commits
-
-
Mark Brown authored
Merge series from Stephan Gerhold <stephan@gerhold.net>: Drop the redundant reg-names and mclk from the PM8916 analog codec. Having the mclk on the analog codec is incorrect because only the digital codec consumes it directly.
-
Mark Brown authored
Merge series from Francesco Dolcini <francesco@dolcini.it>: Minor updates to NAU8822 DT bindings: - Add #sound-dai-cells - Add MCLK
-
Stephan Gerhold authored
The probe() function fails with an error for platform_get_irq_byname() but only logs when devm_request_threaded_irq() fails. Make this consistent and fail to probe in that case as well. In practice this should never happen unless something is really wrong. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230718-pm8916-mclk-v1-5-4b4a58b4240a@gerhold.netSigned-off-by:
-
Stephan Gerhold authored
The audio codec typically used for the MSM8916 SoC is split into two parts: the digital codec is part of the SoC, while the analog codec is part of the PM8916 PMIC. The analog codec in the PMIC has no direct connection to the mclk of the SoC (GCC_CODEC_DIGCODEC_CLK). As the name of the clock suggests this is supplied to the digital part of the codec. During playback it will use this clock to transmit the audio data via the "CDC PDM" pins to the PMIC. In this case the analog codec indirectly receives the clock signal through the digital codec. GCC_CODEC_DIGCODEC_CLK is already managed by the driver of the digital part of the codec in the SoC. Having this clock on the analog PMIC part additionally is redundant and incorrect because the analog codec cannot receive the clock signal without going through the digital codec. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by:
-
Stephan Gerhold authored
The audio codec typically used for the MSM8916 SoC is split into two parts: the digital codec is part of the SoC, while the analog codec is part of the PM8916 PMIC. The analog codec in the PMIC has no direct connection to the mclk of the SoC (GCC_CODEC_DIGCODEC_CLK). As the name of the clock suggests this is supplied to the digital part of the codec. During playback it will use this clock to transmit the audio data via the "CDC PDM" pins to the PMIC. In this case the analog codec indirectly receives the clock signal through the digital codec. GCC_CODEC_DIGCODEC_CLK is already managed by the driver of the digital part of the codec in the SoC. Having this clock on the analog PMIC part additionally is redundant and incorrect because the analog codec cannot receive the clock signal without going through the digital codec. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230718-pm8916-mclk-v1-3-4b4a58b4240a@gerhold.netSigned-off-by:
-
Stephan Gerhold authored
pm8916-wcd-analog-codec has just a single reg region, so having a name for it provides no additional value. Drop it completely from the schema and example. There is not really any point in keeping it (even as deprecated) because it was never used. In old DTBs it will just be ignored as before. Signed-off-by:
-
Stephan Gerhold authored
SPMI devices typically have a single address cell and no size cell, i.e. reg = <0xf000> for the audio codec instead of reg = <0xf000 0x200>. The example is a bit misleading because it uses the latter. Copying this into the device tree would be incorrect and was fixed before for pm8916.dtsi in commit c2f0cbb5 ("arm64: dts: qcom: pm8916: Remove invalid reg size from wcd_codec"). Make the example more clear by adding the outer "pmic" node which specifies the same #address/size-cells that would be used in the real deivce tree. Signed-off-by:
-
Francesco Dolcini authored
Convert the WM8904 audio CODEC bindings to DT schema. Compared to the original binding #sound-dai-cells and the missing power supplies are added. The latter are all required as described in the datasheet. Datasheet: https://statics.cirrus.com/pubs/proDatasheet/WM8904_Rev4.1.pdfSigned-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by:
-
Francesco Dolcini authored
Add nau8822 master clock input. Signed-off-by:
-
Francesco Dolcini authored
Add #sound-dai-cells property and reference dai-common.yaml schema, this is required since NAU8822 can be used as a platform DAI link. Signed-off-by:
-
- 19 Jul, 2023 5 commits
-
-
Matus Gajdos authored
Add support for 22.05 kHz sample rate for TX. Signed-off-by:
Matus Gajdos <matuszpd@gmail.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20230719163154.19492-1-matuszpd@gmail.comSigned-off-by:
-
Andreas Kemnade authored
Commit 349355ce ("ARM: OMAP2+: Drop legacy platform data for omap4 mcbsp") dropped prcm_fck for omap4, so the clk_src might not be available making the clk_get(src) fail. In such cases, rely on the devicetree to assign the correct parent. Signed-off-by:
Andreas Kemnade <andreas@kemnade.info> Link: https://lore.kernel.org/r/20230705190324.355282-2-andreas@kemnade.infoSigned-off-by:
-
Trevor Wu authored
To ensure that DPCM takes into account the backend hardware limitations when user space queries the hw_params of a device, we need to add dpcm_merged_format, dpcm_merged_chan, and dpcm_merged_rate to the FE dai_links. This patch includes only stereo FE dai_links, since multi-channel FEs may be reserved for specific purposes. Therefore, it may not be appropriate to consider BE conditions. Signed-off-by:
Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20230706064123.29790-1-trevor.wu@mediatek.comSigned-off-by:
-
Arnd Bergmann authored
The new PM functions require code that is part of the snd-acp-legacy-common module: x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `snd_acp_resume': acp-pci.c:(.text+0x23): undefined reference to `acp_init' x86_64-linux-ld: acp-pci.c:(.text+0x58): undefined reference to `acp_enable_interrupts' x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `snd_acp_suspend': acp-pci.c:(.text+0x89): undefined reference to `acp_deinit' x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `acp_pci_remove': acp-pci.c:(.text+0xec): undefined reference to `acp_deinit' x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `acp_pci_probe': acp-pci.c:(.text+0x26b): undefined reference to `acp_init' Select that Kconfig symbol as is done for the other frontends. Fixes: 088a4098 ("ASoC: amd: acp: add pm ops support for acp pci driver") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230719130846.633701-1-arnd@kernel.orgSigned-off-by:
-
Mark Brown authored
Merge series from Mark Brown <broonie@kernel.org>: We have some KUnit tests for ASoC but they're not being run as much as they should be since ASoC isn't enabled in the configs used by default with KUnit and in the case of the topology tests there is no way to enable them without enabling drivers that use them. This series provides a Kconfig option which KUnit can use directly rather than worry about drivers. Further, since KUnit is typically run in UML but ALSA prevents build with UML we need to remove that Kconfig conflict. As far as I can tell the motiviation for this is that many ALSA drivers use iomem APIs which are not available under UML and it's more trouble than it's worth to go through and add per driver dependencies. In order to avoid these issues we also provide stubs for these APIs so there are no build time issues if a driver relies on iomem but does not depend on it. With these stubs I am able to build all the sound drivers available in a UML defconfig (UML allmodconfig appears to have substantial other issues in a quick test). With this series I am able to run the topology KUnit tests as part of a kunit --alltests run.
-
- 18 Jul, 2023 24 commits
-
-
Mark Brown authored
Merge series from Mark Brown <broonie@kernel.org>: The maple tree register register cache is now able to generate multi register writes which was the last big feature of the rbtree cache that it didn't support so let's update drivers to use the cache with the more modern data structure.
-
Richard Fitzgerald authored
The soft (firmware) registers for volume/mute/posture are not reset by a chip soft-reset, so use a regmap patch to set them to defaults. cs35l56_reread_firmware_registers() has been removed. Its intent was to use whatever the firmware set as a default. But the driver now patches the defaults to the registers. Signed-off-by:
Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230718144625.39634-1-rf@opensource.cirrus.comSigned-off-by:
-
Mark Brown authored
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>: On below HW case, we would like to use it as "2 Cards", but unfortunately it is impossible in intuitive way, or possible but not intuitive way. In reality, it is handled as "1 big Card" today. +-- basic board --------+ |+--------+ | || CPU ch0| <--> CodecA | || ch1| <-+ | |+--------+ | | +-------------|---------+ +-- expansion board ----+ | | | | +-> CodecB| +-----------------------+ To handling it as intuitive "2 Cards", this patch-set adds multi Component support. To enable this patch-set, I included [01/15] patch into this patch-set which is posted but not yet accepted.
-
Mark Brown authored
The default KUnit build options are not supposed to enable any subsystems that were not already enabled but the topology code is a library which is generally selected by drivers that want to use it. Since KUnit is frequently run in virtual environments with minimal driver support this makes it difficult to enable the toplogy tests so provide an explicit Kconfig option which can be directly enabled when using KUnit, and also include this in the KUnit all_tests.config. Reviewed-by:
David Gow <davidgow@google.com> Reviewed-by:
Takashi Iwai <tiwai@suse.de> Signed-off-by:
-
Mark Brown authored
There are KUnit tests for some of the ASoC utility functions which are not enabled in the KUnit all_tests.config, do so. Reviewed-by:
-
Mark Brown authored
In order to facilitate testing using KUnit allow ALSA to build with UML, it's not super useful at runtime but that's a user problem rather than an actual dependency. The apparent reason for the dependency was the widespread use of iomem APIs in ALSA drivers, earlier patches in this series have provided stubs for these APIs so that there are no build time issues even without individual drivers having IOMEM dependencies added. Tested-by:
-
Mark Brown authored
The various _ioremap_resource functions are not built when CONFIG_HAS_IOMEM is disabled but no stubs are provided. Given how widespread IOMEM usage is in drivers and how rare !IOMEM configurations are in practical use let's just provide some stubs so users will build without having to add explicit dependencies on IOMEM. The most likely use case is builds with UML for KUnit testing. Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by:
-
Mark Brown authored
The various _ioremap_resource functions are not built when CONFIG_HAS_IOMEM is disabled but no stubs are provided. Given how widespread IOMEM usage is in drivers and how rare !IOMEM configurations are in practical use let's just provide some stubs so users will build without having to add explicit dependencies on HAS_IOMEM. The most likely use case is builds with UML for KUnit testing. Reviewed-by:
-
Dan Carpenter authored
The list iterator can't be NULL. Delete the check and pull the code in one tab. Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/b0c5b0ca-68da-47e6-a8b0-e0714f0de119@moroto.mountainSigned-off-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm9713 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm9712 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm9705 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8988 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8985 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8983 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8978 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8971 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8955 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the w8940 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8996 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8995 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8993 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8991 driver to use the more modern data structure. Acked-by:
-
Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8962 driver to use the more modern data structure. Acked-by:
-
