- 14 Jun, 2024 10 commits
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Ville Syrjälä authored
Reuse intel_dp_has_dsc() during .compute_config() instead of repeating some of the checks again by hand. We'll be adding more checks to intel_dp_has_dsc() and this will make sure we cover both .mode_valid() and .compute_config() with them. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240517145356.26103-5-ville.syrjala@linux.intel.comReviewed-by:
Jani Nikula <jani.nikula@intel.com>
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Ville Syrjälä authored
Utilize intel_dp_has_dsc() for MST as well. Signed-off-by:
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Ville Syrjälä authored
Extract a helper to check whether the source+sink combo supports DSC. That basic check is needed both during mode validation and compute config. We'll also need to add extra checks to both places, so having a single place for it is nicer. Signed-off-by:
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Ville Syrjälä authored
If we have no dsc_decompression_aux (only possible on MST) then we won't have the dsc_dpcd caps either. So checking both is not needed. Signed-off-by:
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Jani Nikula authored
None of these are used. The parametrized register macros all depend on the pipe/plane A offset macros alone. Remove the unused ones. v2: Rebase Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/16d278bea466a69cdce94fd83d98dd15ce1a8c89.1717773890.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
Some plane B/C specific bits were left next to the unused _DSPBCNTR macro. Move them next to the DSPCNTR() macro. Reviewed-by:
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Jani Nikula authored
Do not rely on having dev_priv local variable, pass it to the macro. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.wang.linux@gmail.com> Cc: intel-gvt-dev@lists.freedesktop.org Reviewed-by:
Zhi Wang <zhiwang@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/2ff78ebd0dc84178f5feacee7ef2a6cb4132b9ae.1717773890.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
Range is a bit odd name for what really is stride. Rename. Switch to u32 while at it. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.wang.linux@gmail.com> Cc: intel-gvt-dev@lists.freedesktop.org Reviewed-by:
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Jani Nikula authored
In order to be able to use the proper register macros instead of the underscore prefixed ones, pass i915_reg_t for the calc_index() parameters. Side note: DSPSURF is really about planes, not pipes. Fixed stride doesn't work for plane C for CHV (but that's okay for gvt). This doesn't support planes beyond C either. But all that is unrelated to the change at hand. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.wang.linux@gmail.com> Cc: intel-gvt-dev@lists.freedesktop.org Reviewed-by:
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Jani Nikula authored
All callers of calc_index() pass 0 for the end parameter. Remove it. Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: Zhi Wang <zhi.wang.linux@gmail.com> Cc: intel-gvt-dev@lists.freedesktop.org Reviewed-by:
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- 13 Jun, 2024 23 commits
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Imre Deak authored
Add a connector debugfs entry showing if link retraining is disabled. Reviewed-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-22-imre.deak@intel.com
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Imre Deak authored
Add a connector debugfs entry to force retrain an active link. This can be used to test both custom link parameters (previously forced via the force_link_rate/lane_count entries) or link train failure scenarios (previously forced via the force_link_training_failure entry). The entry will autoreset after the link-retrain is complete. v2: Add the entry from intel_dp_link_training.c (Jani) v3: Lock connection_mutex only for the required intel_dp state. (Ville) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Add a connector debugfs entry to force a failure during the following 1-2 link training. The entry will auto-reset after the specified link training events are complete. v2: Add the entry from intel_dp_link_training.c (Jani) v3: Lock connection_mutex only for the required intel_dp state. (Ville) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Add connector debugfs entries to get the maximum link rate and lane count. v2: Lock connection_mutex only for the required intel_dp state. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Add connector debugfs entries to force the link rate/lane count to be used by a link training afterwards. These settings will be clamped to the supported, i.e. the source's and sink's common rate/lane count. After forcing the link rate/lane count reset the link training parameters and for a non-auto setting disable reducing the link parameters via the fallback logic. The former one can be used after testing link training failure scenarios - via debugfs entries added later - to reset the reduced link parameters after the test. v2: - Add the entries from intel_dp_link_training.c (Jani) - Rename the entries to i915_dp_set_link_rate/lane_count. v3: (Ville) - Rename the entries/struct fields to force_link_rate/lane_count. - Lock connection_mutex only for the required intel_dp state. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Reduce the link parameters after a link training failure for MST outputs, similarly to how this is done for SST. For now allow the reduction only by staying in the 8b/10b vs. 128b/132b mode. Enabling the mode switch is left for a follow-up patchset, after taking measures ensuring that the mode switch happens properly. In particular a rediscovery of the whole MST topology may be required for such a switch, see the References below. Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10970Reviewed-by:
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Imre Deak authored
Reset the flag indicating an active link after disabling an MST link, similarly to how this is done for SST outputs. This avoids trying to retrain an MST link while its disabled. Reviewed-by:
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Imre Deak authored
After a link training failure if the link parameters can't be further reduced, there is no point in trying to retrain the link in the driver. This avoids excessive retrain attempts after detecting a bad link, for instance while handling MST HPD IRQs, which is likely redundant as the link training failed already twice with the same minimum link parameters. Userspace can still try to retrain the link with these parameters via a modeset. While at it make the error message more accurate. v2: Move converting the error to a debug message to the relevant follow-up patch. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: -
Imre Deak authored
Simplify things by retraining a DP link if a bad link is detected in the HPD IRQ handler from the encoder's check link state work, similarly to how this is done after a modeset link training failure. Reviewed-by:
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Imre Deak authored
Simplify things by retraining a DP link if a bad link is detected in the connector detect handler from the encoder's check link state work, similarly to how this is done after a modeset link training failure. v2: Add TODO: comment to remove the detect-time link state check. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: -
Imre Deak authored
Simplify things by retraining a DP link if a bad link is detected in the hotplug handler from the encoder's check link state work, similarly to how this is done after a modeset link training failure. Reviewed-by:
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Imre Deak authored
Send a modeset-retry uevent to all connectors in the same MST topology after a link training failure and reduction of the link parameters. This matches the way the same uevent is sent after a DP tunnel BW allocation failure. v2: Add NOTE that the atomic state may not be valid for SST links and assert that it's valid for MST links. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: -
Imre Deak authored
The next patch adds sending a modeset-retry uevent after a link training failure to all MST connectors on link. This requires the atomic state, so pass it to intel_dp_start_link_train(). In case of SST where retraining still happens by calling this function directly instead of a modeset commit the atomic state is not available and NULL is passed instead. This is ok, since in this case the encoder's only DP connector is available from intel_dp->attached_connector not requiring the atomic state. v2: Add NOTE that the atomic state may not be valid for SST links and assert that it's valid for MST links. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:Imre Deak <imre.deak@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-10-imre.deak@intel.com
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Imre Deak authored
Try to maintain the current link parameters by retrying the link training with unchanged link parameters before reducing these parameters (sending an uevent to userspace to retrain the link instead). Signed-off-by:
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Imre Deak authored
Recheck the link state after a passing link training, with a 2 sec delay to account for cases where the link goes bad following the link training and the sink doesn't report this via an HPD IRQ. The delayed work added here will be also used by a later patch after a failed link training to try to retrain the link with unchanged link params before reducing the link params. v2: Don't flush an uninitialized delayed work (on HDMI-only DDI ports). v3: - Move the helpers to a new intel_encoder.c file, rename them accordingly. (Ville) - Add the work to intel_encoder instead of intel_digital_port. - Call the encoder specific link check function via an encoder hook. - Flush the link check work during encoder destroy from intel_dp_encoder_flush_work(). - Flush the link check work during encoder suspend as well. v4: Call intel_encoder_link_check_init() with a valid encoder pointer. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Instead of direct calls to the link train functions, retrain the link via a commit modeset. The direct call means that the output port will be disabled/re-enabled while the rest of the pipeline (transcoder) is active, which doesn't seem to work on MST at least. It leads to underruns and black screen, presumedly because the transcoder is not disabled/re-enabled along the port. Leave switching to a commit modeset on SST for a later patchset, as that seems to work ok currently (though better to using a commit there too, due to the suppressed underruns). v2: Keep reverse line length order for local variables. (Ville) Reviewed-by:
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Imre Deak authored
Factor out a function to modeset commit a set of pipes, which a later patch will reuse for DP link retraining. Reviewed-by:
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Imre Deak authored
Reduce the indentation in intel_dp_get_link_train_fallback_values() by adding separate helpers to reduce the link rate and lane count. Also simplify things by passing crtc_state to the function. This also prepares for later patches in the patchset adding a limitation on how the link params are reduced. While at it use lt_dbg()/lt_err() for debug/error prints in the function which will also print the connector/encoder prefix and add a debug print about reducing the link parameters. v2: - Align reduce_lane_count()'s error handling flow with reduce_link_rate(). (Ville, Jani) - Use lt_dbg()/lt_err() in the function. Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by:
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Imre Deak authored
Move the functions used to reduce the link parameters during link training to intel_dp_link_training.c . Reviewed-by:
Manasi Navare <navaremanasi@chromium.org> Signed-off-by:
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Imre Deak authored
For clarity move the link training parameters updated during link training based on the pass/fail LT result under a substruct in intel_dp. This prepares for later patches in this patchset adding similar params here. Rename intel_dp_reset_max_link_params() to intel_dp_reset_link_params() to better reflect what state gets reset. v2: Add the parameters to a more generic link substruct. (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by:
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Imre Deak authored
Symbols consisting of multiple (4) TU timeslots may get split across MTPs when using 2 or 1 link lanes. Avoid this, as required by Bspec by aligning the allocated TUs to 2 when using 2 lanes and 4 when using 1 lane. Atm, we also have to align the PBNs used to allocate BW along the MST path, since DRM core keeps track of its own TU value, derived from the PBN and that TU value must match what the driver calculates. On some platforms the alignment is only required on 8b/10b links, a follow-up patch will remove the limitation for those. Bspec: 49266, 68922 Reviewed-by:
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Imre Deak authored
The branch or sink device decompressing a stream may have a limitation on the input/uncompressed BPP, which is lower than the base line BPP (determined by the sink's EDID). In some cases a stream with an input BPP higher than this limit will be converted automatically by the device decompressing the stream, by truncating the BPP, however in some cases - seen at least in Dell dock's DP->HDMI converters - the decompression will fail. Fix the above by limiting the input BPP correctly. This is done already correctly for SST outputs. Reviewed-by:
Luca Coelho <luciano.coelho@intel.com> Signed-off-by:
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Mitul Golani authored
Compute trans vrr vsync params only when either VRR or CMRR is enabled. Fixes: 5922f453 ("drm/i915/display: Compute vrr vsync params") Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by:
Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by:
Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240611120525.148042-1-mitulkumar.ajitkumar.golani@intel.com
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- 12 Jun, 2024 2 commits
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Stanislav Lisovskiy authored
According to BSpec we now should call "master" pipes, "primary" pipes and "slave" pipes, should be "secondary" pipes. Signed-off-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> [vsyrjala: Don't rename port sync stuff, catch a few more things] Signed-off-by:
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Stanislav Lisovskiy authored
Lets unify both bigjoiner and ultrajoiner under simple "joiner" name, because in future we might have multiple configurations, involving multiple bigjoiners, ultrajoiner, however it is possible to use same api for handling both. v2: - Renamed back some bigjoiner specific parts for now(Ville) Signed-off-by:
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- 11 Jun, 2024 5 commits
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Jouni Högander authored
When checking vblank length used wake time is aux less wake time for eDP Panel Replay (vblank length is not checked for DP2.0 Panel Replay). Signed-off-by:
Jouni Högander <jouni.hogander@intel.com> Reviewed-by:
Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607134917.1327574-14-jouni.hogander@intel.com
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Jouni Högander authored
As Lunarlake doesn't have block count configuration vblank should be checked against IO buffer wake time. Bspec: 68920 Signed-off-by:
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Jouni Högander authored
SU SDP scanline indication should be taken into account when checking vblank length. In Bspec we have: PSR2_CTL[ SU SDP scanline indication ] = 0: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start) > PSR2_CTL Block Count Number value in lines PSR2_CTL[ SU SDP scanline indication ] = 1: (TRANS_VBLANK Vertical Blank End- TRANS_VBLANK Vertical Blank Start- 1) > PSR2_CTL Block Count Number value in lines Bspec: 49274 Signed-off-by:
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Jouni Högander authored
We are about to add more complexity to vblank length check. It makes sense to move it to separate function for sake of clarity. v2: change name to wake_lines_fit_into_vblank Signed-off-by:
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Jouni Högander authored
Currently Panel Replay status printout is printing frame lock status. It should print Panel Replay status instead. Panel Replay status register field follows PSR status register field. Use existing PSR code for that. Fixes: ef75c25e ("drm/i915/panelreplay: Debugfs support for panel replay") Signed-off-by:
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