- 09 Jun, 2023 11 commits
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Fabio Estevam authored
mipi_dsi node requires #address-cells and #size-cells. Pass them to fix the following schema warnings: imx8mq-mnt-reform2.dtb: mipi-dsi@30a00000: '#address-cells' is a required property From schema: Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml imx8mq-mnt-reform2.dtb: mipi-dsi@30a00000: '#size-cells' is a required property From schema: Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml Signed-off-by:
Fabio Estevam <festevam@denx.de> Acked-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Use 'dsi' as node name to avoid the following schema warning: imx8mq-evk.dtb: mipi-dsi@30a00000: $nodename:0: 'mipi-dsi@30a00000' does not match '^dsi(@.*)?$' From schema: Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml Signed-off-by:
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Tim Harvey authored
On this board, vdd_bat is 16bit, not 24bit. Set the mode to mode_voltage_16bit (3) instead of mode_voltage_24bit (1). Fixes: 0d5b288c ("arm64: dts: freescale: Add imx8mp-venice-gw7905-2x") Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
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Alexander Stein authored
They originated from the downstream kernel and slipped into mainline. Remove them to silence also dtbs_check warnings: pcie@33800000: Unevaluated properties are not allowed ('epdev_on-supply', 'hard-wired' were unexpected) pcie@33c00000: Unevaluated properties are not allowed ('epdev_on-supply', 'hard-wired' were unexpected) Signed-off-by: -
Alexander Stein authored
Add the required bus-range property to PCI RC node. Fixes the warning: pcie@33c00000: 'bus-range' is a required property From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml Signed-off-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
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Alexander Stein authored
Add display APB and AXI clocks as required by bindings. This fixes the warnings: lcd-controller@30320000: clocks: [[2, 128]] is too short From schema: Documentation/devicetree/bindings/display/fsl,lcdif.yaml lcd-controller@30320000: clock-names: ['pix'] is too short From schema: Documentation/devicetree/bindings/display/fsl,lcdif.yaml Signed-off-by: -
Alexander Stein authored
"fsl,imx8mq-lcdif" is compatible to "fsl,imx6sx-lcdif", adjust the list accordingly. Fixes the dtbs_check warning: imx8mq-tqma8mq-mba8mx.dtb: lcd-controller@30320000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx8mq-lcdif', 'fsl,imx28-lcdif'] is too long 'fsl,imx8mq-lcdif' is not one of ['fsl,imx23-lcdif', 'fsl,imx28-lcdif', 'fsl,imx6sx-lcdif', 'fsl,imx8mp-lcdif', 'fsl,imx93-lcdif'] 'fsl,imx6sx-lcdif' was expected Signed-off-by:
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Lucas Stach authored
The audio clocks should be intitialized to the correct rate by the subsystem using them. There is no need to always initialize them from the CCM node assigned-clocks property. This way boards using the audio clocks in a non- standard way can change them without first duplicating the CCM clock setup. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
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Nicolas Cavallari authored
On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit values yield garbage values because of the additional byte, which is a configurable fan trippoint[1]. So set their mode to mode_voltage_16bit = 3 instead of mode_voltage_24bit = 1. [1]: http://trac.gateworks.com/wiki/gsc#SystemTemperatureandVoltageMonitor Only tested on GW7100. Signed-off-by:
Nicolas Cavallari <nicolas.cavallari@green-communications.fr> Acked-by:
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Frank Li authored
Add coresight trace components (ETM, ETF, ETB and Funnel). ┌───────┐ ┌───────┐ ┌───────┐ │ CPU0 ├─►│ ETM0 ├─►│ │ └───────┘ └───────┘ │ │ │ │ ┌───────┐ ┌───────┐ │ ATP │ │ CPU1 ├─►│ ETM1 ├─►│ │ └───────┘ └───────┘ │ │ │ FUNNEL│ ┌───────┐ ┌───────┐ │ │ │ CPU2 ├─►│ ETM2 ├─►│ │ └───────┘ └───────┘ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ ┌───────┐ ┌───────┐ │ │ │ M7 │ │ DSP │ │ CPU3 ├─►│ ETM3 ├─►│ │ │ │ │ │ └───────┘ └───────┘ └───┬───┘ └──┬──┘ └──┬──┘ AXI │ │ │ ▲ ▼ ▼ ▼ │ ┌───────────────────────────┐ ┌─────┐ ┌─┴──┐ │ ATP FUNNEL ├──►│ETF ├─► │ETR │ └───────────────────────────┘ └─────┘ └────┘ Signed-off-by:Frank Li <Frank.Li@nxp.com> Signed-off-by:
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Xu Yang authored
Add performance monitor. Signed-off-by:
Xu Yang <xu.yang_2@nxp.com> Signed-off-by:
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- 04 Jun, 2023 8 commits
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Fabio Estevam authored
The imx8mm-phg has a SN65DSI83 MIPI-DSI to LVDS bridge. Add suppor for it. Signed-off-by:
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Alexander Stein authored
Fixes the warnings: at24 0-0053: supply vcc not found, using dummy regulator at24 0-0057: supply vcc not found, using dummy regulator Signed-off-by:
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Fabio Estevam authored
imx8mm-evk has a MIPI DSI port that can be used with a ADV7535 MIPI DSI to HDMI bridge. Add support for it. Signed-off-by:
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Hugo Villeneuve authored
The VAR SOM symphony carrier board can be used with SOMs which have a soldered ethernet PHY onboard and with SOMs which don't have one. For SOMs with an onboard PHY, the PHY on the cartrier board is not used, and GPIO1_IO9 is used as a reset line to the onboard PHY. For SOMs without an onboard PHY, the PHY on the carrier board is used. For this configuration, pca9534 GPIO 5 (located on the carrier board) is used as a reset line to the PHY, and GPIO1_IO9 is not used. GPIO1_IO9 is not connected to any user-accessible pins or functions, and leaving it enabled in the mux pinctrl for both configurations is safe. Signed-off-by:
Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by:
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Hugo Villeneuve authored
This commit is taken from Variscite linux kernel public git repository. Original patch author: Nate Drude <nate.d@variscite.com> See: https://github.com/varigit/linux-imx/blob/5.15-2.0.x-imx_var01/drivers/net/ethernet/freescale/fec_main.c#L3993-L4050 The ethernet phy reset was moved from the fec controller to the mdio bus, see for example: 0e825b32 When the fec driver managed the reset, the regulator had time to settle during the fec phy reset before calling of_mdiobus_register, which probes the mii bus for the phy id to match the correct driver. Now that the mdio bus controls the reset, the fec driver no longer has any delay between enabling the regulator and calling of_mdiobus_register. If the regulator voltage has not settled, the phy id will not be read correctly and the generic phy driver will be used. The following call tree explains in more detail: fec_probe fec_reset_phy <- no longer introduces delay after migration to mdio reset fec_enet_mii_init of_mdiobus_register of_mdiobus_register_phy fwnode_mdiobus_register_phy get_phy_device <- mii probe for phy id to match driver happens here ... fwnode_mdiobus_phy_device_register phy_device_register mdiobus_register_device mdio_device_reset <- mdio reset assert / deassert delay happens here Add a 20ms enable delay to the regulator to fix the issue. Signed-off-by:
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Luca Ceresoli authored
The MSC SM2-MB-EP1 carrier board for the SM2S-IMX8PLUS SMARC module has an NXP SGTL5000 audio codec connected to I2S-0 (sai2). This requires to: * add the power supplies (always on) * enable sai2 with pinmuxes * reparent the CLKOUT1 clock that feeds the codec SYS_MCLK to IMX8MP_CLK_24M in order it to generate an accurate 24 MHz rate Signed-off-by:
Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by:
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Adam Ford authored
Instead of using a custom glue layer connecting the wm8962 CODEC to the SAI3 sound-dai, migrate the sound card to simple-audio-card. Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
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Adam Ford authored
The baseboard has an WM8962 Audio CODEC connected to the SAI3 peripheral. The CODEC supports stereo in and out and a microphone input connected to the headphone jack. Route this CODEC through the simple-audio-card driver. Signed-off-by:
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- 27 May, 2023 10 commits
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Wei Fang authored
Add fsl,stop-mode property for FEC to support Wake-on-LAN (WOL) feature. Otherwise, the WOL feature of FEC does not work. Signed-off-by:
Wei Fang <wei.fang@nxp.com> Signed-off-by:
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Marek Vasut authored
Add SAI I2S and audio bindings on MX8MP DHCOM PDK2 and PDK3. The VDDA is supplied from on-carrier-board regulator, the VDDIO is supplied from always-on on-SoM regulator. Except for different I2C bus used to connect the codec, the implementation is virtually identical on both carrier boards. Align regulator-avdd name to regulator-3p3vdd on PDK3, since this is the VDDA supply and it is the same on both carrier boards. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
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Tim Harvey authored
Remove the invalid #address-cells and #size-cells nodes from the fan-controller. Signed-off-by:
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Tim Harvey authored
The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard. The GW702x SOM contains the following: - i.MX8M Plus SoC - LPDDR4 memory - eMMC Boot device - Gateworks System Controller (GSC) with integrated EEPROM, button controller, and ADC's - PMIC - RGMII PHY (eQoS) - SOM connector providing: - eQoS GbE MII - 1x SPI - 2x I2C - 4x UART - 2x USB 3.0 - 1x PCI - 1x SDIO (4-bit 3.3V) - 1x SDIO (4-bit 3.3V/1.8V) - GPIO The GW7905 Baseboard contains the following: - GPS - microSD - off-board I/O connector with I2C, SPI, GPIO - EERPOM - PCIe clock generator - 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0 - 1x half-length miniPCIe socket with USB2.0 and USB3.0 - USB 3.0 HUB - USB Type-C with USB PD Sink capability and peripheral support - USB Type-C with USB 3.0 host support Signed-off-by:
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Marek Vasut authored
Add TC9595 DSI-to-DPI and DSI-to-(e)DP bridge to DH electronics i.MX8M Plus DHCOM SoM . The bridge is populated on the SoM, but disabled by default unless used for display output. Signed-off-by:
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Marek Vasut authored
Add DT node for the DeWarp Engine of the i.MX8MP. Signed-off-by:
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Marek Vasut authored
Sort AIPS4 nodes by node unit-address . No functional change . Suggested-by:
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Alexander Stein authored
Enable SAI3, add the codec and pinctrl nodes to enable audio support on MBa8MPxL. Signed-off-by:
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Alexander Stein authored
The base address of NOC is bigger than aips5, but smaller than aips4. Signed-off-by:
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Marek Vasut authored
The PDK3 carrier board contains a PCIe clock generator which is used to supply the PCIe clock lanes. This generator is always on, unless external CLKREQ signal toggles an output off, but this is handled in hardware. The generator does however have I2C interface, describe it in DT. Signed-off-by:
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- 15 May, 2023 10 commits
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Himanshu Bhavani authored
Add device tree support for the i.MX8MM Based Emtop SOM-IMX8MMLPD4 (V1) and IMX8M Mini Baseboard (V1). Currently supported are serial console, eMMC. Signed-off-by:
Himanshu Bhavani <himanshu.bhavani@siliconsignals.io> Signed-off-by:
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Peng Fan authored
Enable wdog3 to support watchdog feature Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
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Peng Fan authored
Add cpuidle node to support cpu idle. Signed-off-by:
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Peng Fan authored
Reorder device nodes per address - Move eqos node after fec node - Move mediamix node after mlmix node Signed-off-by:
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Peng Fan authored
Add i.MX93 OCOTP node Signed-off-by:
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Peng Fan authored
Add watchdog[1-5] nodes Signed-off-by:
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Marek Vasut authored
Enable SAI3 on i.MX8MP EVK, add WM8960 codec binding and regulator. This is all that is needed to get analog audio output operational on i.MX8MP EVK. Acked-by:
Marco Felsch <m.felsch@pengutronix.de> Signed-off-by:
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Marek Vasut authored
Add all SAI nodes, SDMA2 and SDMA3 nodes, and AudioMIX node. This is needed to get audio operational on i.MX8MP . Acked-by:
Richard Leitner <richard.leitner@skidata.com> Signed-off-by:
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Adam Ford authored
The baseboard has a very specific pinout for the TD Next 5640 camera which uses an OV5640 sensor. Enable it as part of the deveopment kit baseboard instead of an overlay. Enable the camera with the following media-ctl -l "'ov5640 1-0010':0 -> 'csis-32e30000.mipi-csi':0 [1]" media-ctl -v -V "'ov5640 1-0010':0 [fmt:UYVY8_1X16/640x480 field:none]" media-ctl -v -V "'crossbar':0 [fmt:UYVY8_1X16/640x480 field:none]" media-ctl -v -V "'mxc_isi.0':0 [fmt:UYVY8_1X16/640x480 field:none]" Signed-off-by:
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Adam Ford authored
The CSI in the imx8mn is the same as what is used in the imx8mm, but it's routed to the ISI on the Nano. Add both the ISI and CSI nodes, and pointing them to each other. Since the CSI capture is dependent on an attached camera, mark both ISI and CSI as disabled by default. Signed-off-by:
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- 14 May, 2023 1 commit
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Johannes Schneider authored
Add the i.MX8MM-EVKB [1] devicetree support. The EVKB is basically the same device except for the different used PMIC. [1] https://www.nxp.com/design/development-boards/ \ i-mx-evaluation-and-development-boards/ \ evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK Signed-off-by:
Johannes Schneider <johannes.schneider@leica-geosystems.com> [m.felsch@pengutronix.de: Adapt the commit message] [m.felsch@pengutronix.de: Include Shawns feedback] [m.felsch@pengutronix.de: Fix the regulator settings] Signed-off-by:
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