- 06 Apr, 2023 18 commits
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Thomas Zimmermann authored
The DRM device stores a pointer to the fbdev helper. Remove struct omap_drm_private.fbdev, which contains the same value. No functional changes. v2: * don't clear dev->fb_helper unnecessarily (Tomi) * include omap_fbdev.h in omap_fbdev.c (kernel test robot) Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by:
Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by:
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Thomas Zimmermann authored
Fbdev's framebuffer stores a pointer to the GEM object. Remove struct omap_fbdev.bo, which contains the same value. No functional changes. v2: * fix commit message (Tomi) Signed-off-by:
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Thomas Zimmermann authored
Fbdev's struct fb_helper stores a pointer to the framebuffer. Remove struct omap_fbdev.fb, which contains the same value. No functional changes. Signed-off-by:
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Thomas Zimmermann authored
Include <linux/of.h> to get the contained declarations. No functional changes. Signed-off-by:
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Maíra Canal authored
Before commit bc0d7fde ("drm: vkms: Supports to the case where primary plane doesn't match the CRTC"), the composition was executed on top of the primary plane. Therefore, the primary plane needed to cover the entire CRTC. After commit bc0d7fde, this is no longer necessary, as the composition is now executed on top of the CRTC. Then, allow the primary plane to be positioned in such a way that it doesn't cover the entire CRTC. This patch was tested with the vkms IGT testlist and all tests passed successfully. Moreover, the test igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-A used to fail and now is passing. Signed-off-by:
Maíra Canal <mcanal@igalia.com> Reviewed-by:
Melissa Wen <mwen@igalia.com> Signed-off-by:
Maíra Canal <mairacanal@riseup.net> Link: https://patchwork.freedesktop.org/patch/msgid/20230324164226.256084-3-mcanal@igalia.com
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Maíra Canal authored
Before commit bc0d7fde ("drm: vkms: Supports to the case where primary plane doesn't match the CRTC"), the composition was executed on top of the primary plane. Therefore, the primary plane needed to be visible and full screen. After commit bc0d7fde, this is no longer necessary, as the composition is now executed on top of the CRTC. Then, remove the conditional expression that forced the primary plane to be visible and full screen. This allows vkms to accept non-null framebuffers when the CRTC is disabled. This patch was tested with the vkms IGT testlist and all tests passed successfully. Moreover, the tests igt@kms_universal_plane@universal-plane-pipe-a-functional and igt@kms_universal_plane@disable-primary-vs-flip-pipe-a used to fail and now are passing. Signed-off-by:
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Thomas Hellström authored
When swapping in, or under memory pressure ttm_tt_populate() may sleep for a substantiable amount of time. Allow interrupts during the sleep. This will also allow us to inject -EINTR errors during swapin in upcoming patches. Also avoid returning VM_FAULT_OOM, since that will confuse the core mm, making it print out a confused message and retrying the fault. Return VM_FAULT_SIGBUS also under OOM conditions. Signed-off-by:
Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404200650.11043-4-thomas.hellstrom@linux.intel.com
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Thomas Hellström authored
When swapping out, we will split multi-order pages both in order to move them to the swap-cache and to be able to return memory to the swap cache as soon as possible on a page-by-page basis. Reduce the page max order to the system PMD size, as we can then be nicer to the system and avoid splitting gigantic pages. Looking forward to when we might be able to swap out PMD size folios without splitting, this will also be a benefit. v2: - Include all orders up to the PMD size (Christian König) v3: - Avoid compilation errors for architectures with special PFN_SHIFTs Signed-off-by:
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Thomas Hellström authored
When hitting an error, the error path forgot to unmap dma mappings and could call set_pages_wb() on already uncached pages. Fix this by introducing a common ttm_pool_free_range() function that does the right thing. v2: - Simplify that common function (Christian König) v3: - Rename that common function to ttm_pool_free_range() (Christian König) Fixes: d099fc8f ("drm/ttm: new TT backend allocation pool v3") Cc: Christian König <christian.koenig@amd.com> Cc: Dave Airlie <airlied@redhat.com> Cc: Christian Koenig <christian.koenig@amd.com> Cc: Huang Rui <ray.huang@amd.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by:
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Jeffrey Hugo authored
Add MAINTAINERS entry for the Qualcomm Cloud AI 100 driver. Signed-off-by:
Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by:
Carl Vanderlip <quic_carlv@quicinc.com> Reviewed-by:
Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com> Reviewed-by:
Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Reviewed-by:
Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Acked-by:
Oded Gabbay <ogabbay@kernel.org> Signed-off-by:
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Jeffrey Hugo authored
Now that we have all the components of a minimum QAIC which can boot and run an AIC100 device, add the infrastructure that allows the QAIC driver to be built. Signed-off-by:
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Pranjal Ramajor Asha Kanojiya authored
Some of the MHI channels for an AIC100 device need to be routed to userspace so that userspace can communicate directly with QSM. The MHI bus does not support this, and while the WWAN subsystem does (for the same reasons), AIC100 is not a WWAN device. Also, MHI is not something that other accelerators are expected to share, thus an accel subsystem function that meets this usecase is unlikely. Create a QAIC specific MHI userspace shim that exposes these channels. Start with QAIC_SAHARA which is required to boot AIC100 and is consumed by the kickstart application as documented in aic100.rst Each AIC100 instance (currently, up to 16) in a system will create a chardev for QAIC_SAHARA. This chardev will be found as /dev/<mhi instance>_QAIC_SAHARA For example - /dev/mhi0_QAIC_SAHARA Signed-off-by:
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Jeffrey Hugo authored
Add the datapath component that manages BOs and submits them to running workloads on the qaic device via the dma_bridge hardware. This allows QAIC clients to interact with their workloads (run inferences) via the following ioctls along with mmap(): DRM_IOCTL_QAIC_CREATE_BO DRM_IOCTL_QAIC_MMAP_BO DRM_IOCTL_QAIC_ATTACH_SLICE_BO DRM_IOCTL_QAIC_EXECUTE_BO DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO DRM_IOCTL_QAIC_WAIT_BO DRM_IOCTL_QAIC_PERF_STATS_BO Signed-off-by:
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Jeffrey Hugo authored
Add the control path component that talks to the management processor (QSM) to load workloads onto the AIC100 device. This implements the KMD portion of the NNC protocol over the QAIC_CONTROL MHI channel and the DRM_IOCTL_QAIC_MANAGE IOCTL to userspace. With this functionality, QAIC clients are able to load, run, and cleanup their workloads on the device but not interact with the workloads (run inferences). Signed-off-by:
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Jeffrey Hugo authored
An AIC100 device contains a MHI interface with a number of different channels for controlling different aspects of the device. The MHI controller works with the MHI bus to enable and drive that interface. AIC100 uses the BHI protocol in PBL to load SBL. The MHI controller expects the SBL to be located at /lib/firmware/qcom/aic100/sbl.bin and expects the MHI bus to manage the process of loading and sending SBL to the device. Signed-off-by:
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Jeffrey Hugo authored
Add the QAIC driver uapi file and core driver file that binds to the PCIe device. The core driver file also creates the accel device and manages all the interconnections between the different parts of the driver. The driver can be built as a module. If so, it will be called "qaic.ko". Signed-off-by:
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Jeffrey Hugo authored
The Qualcomm Cloud AI 100 (AIC100) device is an Artificial Intelligence accelerator PCIe card. It contains a number of components both in the SoC and on the card which facilitate running workloads: QSM: management processor NSPs: workload compute units DMA Bridge: dedicated data mover for the workloads MHI: multiplexed communication channels DDR: workload storage and memory The Linux kernel driver for AIC100 is called "QAIC" and is located in the accel subsystem. Signed-off-by:
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Daniel Vetter authored
If the crtc is being switched on or off then the semantics of computing the timestampe of the next vblank is somewhat ill-defined. And indeed, the code splats with a warning in the timestamp computation code. Specifically it hits the check to make sure that atomic drivers have full set up the timing constants in the drm_vblank structure, and that's just not the case before the crtc is actually on. For robustness it seems best to just not set deadlines for modesets. v2: Also skip on inactive crtc (Ville) Link: https://lore.kernel.org/dri-devel/dfc21f18-7e1e-48f0-c05a-d659b9c90b91@linaro.org/ Fixes: d39e48ca ("drm/atomic-helper: Set fence deadline for vblank") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Rob Clark <robdclark@chromium.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reported-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # test patch only Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230405133105.947834-1-daniel.vetter@ffwll.ch
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- 05 Apr, 2023 15 commits
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Ville Syrjälä authored
Include the device and connector information in the SCDC debugs. Makes it easier to figure out who did what. v2: Rely on connector->ddc (Maxime) Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Neil Armstrong <neil.armstrong@linaro.org> Cc: Robert Foss <rfoss@kernel.org> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Emma Anholt <emma@anholt.net> Cc: Maxime Ripard <mripard@kernel.org> Cc: intel-gfx@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Maxime Ripard <maxime@cerno.tech> Reviewed-by:
Andrzej Hajda <andrzej.hajda@intel.com> Acked-by:
Thierry Reding <treding@nvidia.com>
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Daniel Vetter authored
Apparently drivers need to check all this stuff themselves, which for most things makes sense I guess. And for everything else we luck out, because modern distros stopped supporting any other fbdev drivers than drm ones and I really don't want to argue anymore about who needs to check stuff. Therefore fixing all this just for drm fbdev emulation is good enough. Note that var->active is not set or validated. This is just control flow for fbmem.c and needs to be validated in there as needed. Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Signed-off-by:
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Daniel Vetter authored
The fb_check_var hook is supposed to validate all this stuff. Any errors from fb_set_par are considered driver/hw issues and resulting in dmesg warnings. Luckily we do fix up the pixclock already, so this is all fine. Signed-off-by:
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Daniel Vetter authored
Drivers are supposed to fix this up if needed if they don't outright reject it. Uncovered by 6c11df58 ("fbmem: Check virtual screen sizes in fb_set_var()"). Reported-by: syzbot+20dcf81733d43ddff661@syzkaller.appspotmail.com Link: https://syzkaller.appspot.com/bug?id=c5faf983bfa4a607de530cd3bb008888bf06cefc Cc: stable@vger.kernel.org # v5.4+ Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Javier Martinez Canillas <javierm@redhat.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
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Alexander Stein authored
There is no need to require non-sleeping GPIO access. Silence the WARN_ON() if GPIO is using e.g. I2C expanders. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a panel entry with delay_200_500_e50 for the AUO NE135FBM-N41 version 8.1, found on a number of ACER laptops, including the Swift 3 (SF313-52, SF313-53), Chromebook Spin 513 (CP513-2H) and others. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
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Pin-yen Lin authored
The default hpd_wait_us in panel_edp.c is 2 seconds. This makes the sleep time in the polling of _ps8640_wait_hpd_asserted become 200ms. Change it to a constant 20ms to speed up the function. Signed-off-by:
Pin-yen Lin <treapking@chromium.org> Reviewed-by:
Robert Foss <rfoss@kernel.org> Signed-off-by:
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Marek Vasut authored
Do not generate the HS front and back porch gaps, the HSA gap and EOT packet, as per "SN65DSI83 datasheet SLLSEC1I - SEPTEMBER 2012 - REVISED OCTOBER 2020", page 22, these packets are not required. This makes the TI SN65DSI83 bridge work with Samsung DSIM on i.MX8MN. Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Luca Ceresoli authored
The LDB driver currently checks whether dual mode is used, otherwise it assumes only channel 0 is in use. Add support for using only channel 1. In device tree terms, this means linking port 2 only. Doing this cleanly requires changing the logic of the probe functions from this: 1. use of_graph_get_remote_node() on port 1 to find the panel 2. use drm_of_lvds_get_dual_link_pixel_order() to detect dual mode to this: 1. use of_graph_get_remote_node() twice to find remote ports 2. reuse the result of the above to know whether each channel is enabled and to find the panel 3. if (both channels as enabled) use drm_of_lvds_get_dual_link_pixel_order() to detect dual mode Also add a dev_dbg() to log the detected mode and log an error in case no panel was found (no channel enabled). Signed-off-by:Luca Ceresoli <luca.ceresoli@bootlin.com> Reviewed-by:
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Luca Ceresoli authored
dev_warn() and similar require a training \n. Signed-off-by:
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Alexander Stein authored
There might be cases where the host attach is deferred, use dev_err_probe to add more detailed information to /sys/kernel/debug/devices_deferred. Signed-off-by:
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Karol Wachowski authored
VPU on MTL has hardware optimizations and does not require 10ms D0 - D3hot transition delay imposed by PCI specification (PCIe r6.0, sec 5.9.) . The delay removal is traditionally done by adding PCI ID to quirk_remove_d3hot_delay() in drivers/pci/quirks.c . But since we do not need that optimization before driver probe and we can better specify in the ivpu driver on what (future) hardware use the optimization, we do not use quirk_remove_d3hot_delay() for that. Signed-off-by:
Karol Wachowski <karol.wachowski@linux.intel.com> Signed-off-by:
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Qiang Yu authored
This reverts commit bccafec9. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230404002601.24136-4-yq882255@163.com
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Qiang Yu authored
This reverts commit 87767de8. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
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Qiang Yu authored
This reverts commit 4a66f3da. This is due to the depend commit has been reverted on upstream: commit baad1097 ("Revert "drm/scheduler: track GPU active time per entity"") Acked-by:
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- 04 Apr, 2023 5 commits
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Rob Clark authored
This should fix a crash that was reported on ast (and possibly other drivers which do not initialize vblank). fbcon: Taking over console Unable to handle kernel NULL pointer dereference at virtual address 0000000000000074 Mem abort info: ESR = 0x0000000096000004 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x04: level 0 translation fault Data abort info: ISV = 0, ISS = 0x00000004 CM = 0, WnR = 0 user pgtable: 4k pages, 48-bit VAs, pgdp=0000080009d16000 [0000000000000074] pgd=0000000000000000, p4d=0000000000000000 Internal error: Oops: 0000000096000004 [#1] SMP Modules linked in: ip6table_nat tun nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 rfkill ip_set nf_tables nfnetlink qrtr sunrpc binfmt_misc vfat fat xfs snd_usb_audio snd_hwdep snd_usbmidi_lib snd_seq snd_pcm snd_rawmidi snd_timer snd_seq_device snd soundcore joydev mc ipmi_ssif ipmi_devintf ipmi_msghandler arm_spe_pmu arm_cmn arm_dsu_pmu arm_dmc620_pmu cppc_cpufreq loop zram crct10dif_ce polyval_ce nvme polyval_generic ghash_ce sbsa_gwdt igb nvme_core ast nvme_common i2c_algo_bit xgene_hwmon gpio_dwapb scsi_dh_rdac scsi_dh_emc scsi_dh_alua ip6_tables ip_tables dm_multipath fuse CPU: 12 PID: 469 Comm: kworker/12:1 Not tainted 6.3.0-rc2-00008-gd39e48ca #1 Hardware name: ADLINK AVA Developer Platform/AVA Developer Platform, BIOS TianoCore 2.04.100.07 (SYS: 2.06.20220308) 09/08/2022 Workqueue: events fbcon_register_existing_fbs pstate: 20400009 (nzCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : drm_crtc_next_vblank_start+0x2c/0x98 lr : drm_atomic_helper_wait_for_fences+0x90/0x240 sp : ffff80000d583960 x29: ffff80000d583960 x28: ffff07ff8fc187b0 x27: 0000000000000000 x26: ffff07ff99c08c00 x25: 0000000000000038 x24: ffff07ff99c0c000 x23: 0000000000000001 x22: 0000000000000038 x21: 0000000000000000 x20: ffff07ff9640a280 x19: 0000000000000000 x18: ffffffffffffffff x17: 0000000000000000 x16: ffffb24d2eece1c0 x15: 0000003038303178 x14: 3032393100000048 x13: 0000000000000000 x12: 0000000000000000 x11: 0000000000000000 x10: 0000000000000000 x9 : ffffb24d2eeeaca0 x8 : ffff80000d583628 x7 : 0000080077783000 x6 : 0000000000000000 x5 : ffff80000d584000 x4 : ffff07ff99c0c000 x3 : 0000000000000130 x2 : 0000000000000000 x1 : ffff80000d5839c0 x0 : ffff07ff99c0cc08 Call trace: drm_crtc_next_vblank_start+0x2c/0x98 drm_atomic_helper_wait_for_fences+0x90/0x240 drm_atomic_helper_commit+0xb0/0x188 drm_atomic_commit+0xb0/0xf0 drm_client_modeset_commit_atomic+0x218/0x280 drm_client_modeset_commit_locked+0x64/0x1a0 drm_client_modeset_commit+0x38/0x68 __drm_fb_helper_restore_fbdev_mode_unlocked+0xb0/0xf8 drm_fb_helper_set_par+0x44/0x88 fbcon_init+0x1e0/0x4a8 visual_init+0xbc/0x118 do_bind_con_driver.isra.0+0x194/0x3a0 do_take_over_console+0x50/0x70 do_fbcon_takeover+0x74/0xf8 do_fb_registered+0x13c/0x158 fbcon_register_existing_fbs+0x78/0xc0 process_one_work+0x1ec/0x478 worker_thread+0x74/0x418 kthread+0xec/0x100 ret_from_fork+0x10/0x20 Code: f9400004 b9409013 f940a082 9ba30a73 (b9407662) ---[ end trace 0000000000000000 ]--- v2: Use drm_dev_has_vblank() Reported-by:Nathan Chancellor <nathan@kernel.org> Fixes: d39e48ca ("drm/atomic-helper: Set fence deadline for vblank") Signed-off-by:
Rob Clark <robdclark@chromium.org> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20230403160314.1210533-1-robdclark@gmail.com
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Daniel Vetter authored
It's not exactly the same since the open coded version doesn't set primary correctly. But that's a bugfix, so shouldn't hurt really. Signed-off-by:
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Daniel Vetter authored
It exists! Note that since this is an exact copy, there shouldn't be any functional difference here. Signed-off-by:
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Daniel Vetter authored
It's just open coded and matches. Note that Thomas said that his version apparently failed for some reason, but hey maybe we should try again. Signed-off-by:
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Sui Jingfeng authored
EFI FB, VESA FB or VGA FB etc belong to firmware based framebuffer driver. Signed-off-by:
Sui Jingfeng <suijingfeng@loongson.cn> Reviewed-by:
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- 03 Apr, 2023 2 commits
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Marek Vasut authored
The VS signal change is synchronized to HS signal change, start the info graphics with that event, instead of having that event occur in the middle of it. Scope trace of DPI bus with HS/VS active HIGH looks as follows: ________________...__ VS...___/__ __ \______... HS...___/ \_______/ \__...__/ \___... ^ ^ | | | Used to start here -' | '--- Start info graphics here Signed-off-by:Sam Ravnborg <sam@ravnborg.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230221200407.16531-1-marex@denx.de
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Marek Vasut authored
The TC358767/TC358867/TC9595 are capable of DSI burst mode, which is more energy efficient than the non-burst modes. Make use of it. The TC358767/TC358867/TC9595 are capable of DSI non-continuous clock, since it sources the internal PLL clock from external clock source. The DSI non-continuous clock further reduces power utilization. The TC358767/TC358867/TC9595 may use DSI LPM for command transmissions, make sure this is configured correctly in the DSI mode flags. Signed-off-by:
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