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- 19 Sep, 2023 24 commits
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Dmitry Baryshkov authored
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230731111158.3998107-1-dmitry.baryshkov@linaro.orgSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Douglas Anderson authored
Let's provide the proper link from the touchscreen to the panel on trogdor devices where the touchscreen support it. This allows the OS to power sequence the touchscreen more properly. For the most part, this is just expected to marginally improve power consumption while the screen is off. However, in at least one trogdor model (wormdingler) it's suspected that this will fix some behavorial corner cases when the panel power cycles (like for a modeset) without the touchscreen power cycling. NOTE: some trogdor variants use touchscreens that don't (yet) support linking the touchscreen and the panel. Those variants are left alone. Reviewed-by:
Maxime Ripard <mripard@kernel.org> Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Benjamin Tissoires <bentiss@kernel.org> Acked-by:
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Nikita Travkin authored
gt510 has two capacitive keys on the bottom. Define keycodes to enable them. Signed-off-by:
Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20230725-gt5-panel-v1-3-7c787e33a614@trvn.ruSigned-off-by:
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Siddharth Manthan authored
The device has a 8 inch lsl080al03 display. Add it to the device tree. Signed-off-by:
Siddharth Manthan <siddharth.manthan@gmail.com> Co-developed-by:
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Jasper Korten authored
The device has a 9.7 inch ltl101at01 display. Add it to the device tree. Signed-off-by:
Jasper Korten <jja2000@gmail.com> Co-developed-by:
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Marijn Suijten authored
Enable MDSS and DSI, and configure the Samsung SOFEF01-M ams597ut01 6.0" 1080x2520 panel. Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-17-a3f287dd6c07@somainline.orgSigned-off-by:
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Marijn Suijten authored
Add the DT nodes that describe the MDSS hardware on SM6125, containing one MDP (display controller) together with a single DSI and DSI PHY. No DisplayPort support is added for now. Reviewed-by:
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Marijn Suijten authored
Enable and configure the dispcc node on SM6125 for consumption by MDSS later on. Signed-off-by:
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Marijn Suijten authored
We have a working RPM XO clock; no other driver except rpmcc should be parenting directly to the fixed-factor xo_board clock nor should it be reachable by that global name. Remove the name to that effect, so that every clock relation is explicitly defined in DTS. Reviewed-by:
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Marijn Suijten authored
This node has always resided in the wrong spot, making it somewhat harder to contribute new node entries while maintaining proper sorting around it. Move the node up to sit after hsusb_phy1 where it maintains proper numerical sorting on the (first of its many) reg address property. Fixes: cff4bbaf ("arm64: dts: qcom: Add support for SM6125") Reviewed-by:
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Marijn Suijten authored
APPS IOMMU is the only node in sm6125.dtsi that doesn't have its address padded to 8 hexadecimals; fix this by prepending a 0. Fixes: 8ddb4bc3 ("arm64: dts: qcom: sm6125: Configure APPS SMMU") Signed-off-by:
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Krzysztof Kozlowski authored
Bindings require different order of clocks for USB DWC3 nodes (sleep before mock_utmi). Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
Bindings require different order of clocks for USB DWC3 nodes (sleep before mock_utmi). Signed-off-by:
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Krzysztof Kozlowski authored
There are two entries for similar reserved memory: qseecom@cb400000 and audio@cb400000. Keep the qseecom as it is longer. Warning (unique_unit_address_if_enabled): /reserved-memory/audio@cb400000: duplicate unit-address (also used in node /reserved-memory/qseecom@cb400000) Fixes: 69876bc6 ("arm64: dts: qcom: msm8992-libra: Fix the memory map") Signed-off-by:
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Krzysztof Kozlowski authored
Reserved memory @6c00000 is defined in MSM8994 DTSI and few boards: Warning (unique_unit_address_if_enabled): /reserved-memory/reserved@6c00000: duplicate unit-address (also used in node /reserved-memory/hole2@6c00000) Warning (unique_unit_address_if_enabled): /reserved-memory/reserved@6c00000: duplicate unit-address (also used in node /reserved-memory/memory@6c00000) Signed-off-by:
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Alexey Minnekhanov authored
Modem subsystem in SDM630/660 is similar to MSM8998 and device tree node for it is based on the one from msm8998.dtsi. Signed-off-by:
Alexey Minnekhanov <alexeymin@postmarketos.org> Link: https://lore.kernel.org/r/20230719093458.2668842-1-alexeymin@postmarketos.orgSigned-off-by:
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Konrad Dybcio authored
This property isn't used or defined anymore. Get rid of it. Signed-off-by:
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Krzysztof Kozlowski authored
Add proper audio routes for onboard analogue microphones: AMIC[1345]. Use also new DAPM input widget (TX SWR_INPUTn) for them, not the deprecated ADC one. Change is not compatible with older kernels not having the new SWR_INPUTn input widget. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by:
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Jagadeesh Kona authored
Add device node for camera clock controller on Qualcomm SM8550 platform. Signed-off-by:
Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by:
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Bjorn Andersson authored
Merge the SM8550 camera clock controller through a topic branch, to get access to the DeviceTree bindings.
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Jagadeesh Kona authored
Add support for camera qdss, sleep and xo clocks. Co-developed-by:
Taniya Das <quic_tdas@quicinc.com> Signed-off-by:
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Jagadeesh Kona authored
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8550 platform. Co-developed-by:
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Jagadeesh Kona authored
Lucid ole pll has as extra RINGOSC_CAL_L field in L register in addition to the fields that are part of lucid evo pll, hence add support for lucid ole pll configure function to configure the ole plls. Signed-off-by:
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Jagadeesh Kona authored
Add device tree bindings for the camera clock controller on Qualcomm SM8550 platform. Co-developed-by:
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- 16 Sep, 2023 1 commit
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Gaurav Kohli authored
Fix the apps iommu local address space range as per data sheet. Fixes: 6a6729f3 ("arm64: dts: qcom: msm8916: Add IOMMU support") Reviewed-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by:
Gaurav Kohli <quic_gkohli@quicinc.com> Reviewed-by:
Stephan Gerhold <stephan@gerhold.net> Acked-by:
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- 15 Sep, 2023 1 commit
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Konrad Dybcio authored
Describe the interconnect paths related to QUPs and add the power-domains powering them. This is required for icc sync_state, as otherwise QUP access is gated. Signed-off-by:
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- 14 Sep, 2023 14 commits
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
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Dmitry Baryshkov authored
Use usb_1_ssphy's clock as gcc's usb3_phy_wrapper_gcc_usb30_pipe_clk clock source. Suggested-by:
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Maulik Shah authored
Add power-domains for cpuidle states to use psci os-initiated idle states. Cc: devicetree@vger.kernel.org Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Maulik Shah <quic_mkshah@quicinc.com> Link: https://lore.kernel.org/r/20230703085555.30285-4-quic_mkshah@quicinc.com [bjorn: Corrected psci child node names to match binding] Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the VCCQ2 supply is not connected and the L3G regulator instead powers up the controller pads (VDD_PX10). Use correct supply vdd-hba and drop unsupported current limit for the vdd-hba. Signed-off-by:
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Krzysztof Kozlowski authored
According to schematics the VCCQ2 supply is not connected and the L3G regulator instead powers up the controller pads (VDD_PX10). Use correct supply vdd-hba and drop unsupported current limit for the vdd-hba. Signed-off-by:
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David Heidelberg authored
Cheza firmware doesn't allow controlling LMh from the operating system. Fixes: 36c65812 ("arm64: dts: qcom: sdm845: Add support for LMh node") Suggested-by:
David Heidelberg <david@ixit.cz> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20230912071205.11502-2-david@ixit.czSigned-off-by:
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