Add pinmux configurations for RGMII based CPSW ethernet to AM335x EVMsk.

Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.

Sleep mode is nothing but the values required for the module during
inactive state. The pins are configured to its reset state to optimize
energy usage for the pins for the suspend/resume cycle
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add pinmux configurations for MII based CPSW ethernet to am335x-bone.

Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.

Sleep mode is nothing but the values required for the module during
inactive state. The pins are configured to its reset state to optimize
energy usage for the pins for the suspend/resume cycle
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Commit c971ff18 'leds: leds-pwm: Defer led_pwm_set() if PWM can sleep'
fixed a crash when using a trigger with a pwm-led provided by an
external chip. Now it is safe to add the default trigger according
to board-overo.c.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The LED is active low, not active high.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The Tobi expansion boards embeds a SMSC LAN8700 PHY. Add the
corresponding node into the DT. The regulators are not designed
to be turned off.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Some nodes in OMAP3 DTS now use edge or level sensitive interrupts.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

clkout2 comes out on the pad and is being used by various
external on-board peripherals like, Audio codecs and stuff.
So enable the clkout2 by default during init sequence itself.

Also, add the missing entry of "clkout2_ck" to the clock table.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Represent debugSS clock interface as provided in
CM_WKUP_DEBUGSS_CLKCTRL register, includes
	- Clock gate for optional DEBUG_CLKA and DBGSYSCLK
	- Clock Mux for TRC_PMD and STM_PMD
	- Clock divider for STM and TPIU
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add Palmas MFD node and the regulator nodes for OMAP5.

The node definitions are based on: https://lkml.org/lkml/2013/6/6/25

Boot tested on omap5-uevm board.
Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

PWM output from ecap2 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales with
inverse polarity.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by
adding necessary properties like pwm-cells, base reg & set disabled as
status.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add bandgap devices for OMAP4460 devices.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add the bandgap entry for OMAP4430 devices.
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
[benoit.cousson@linaro.org: Add blank line and fix reg presentation]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

On most OMAP3 platforms, the twl4030 IRQ line is connected to the
SYS_NIRQ line on OMAP.  Add another DTS include file
(twl4030_omap3.dtsi) for boards that hook up the twl4030 this way
to include.

This allows RTC wake from off-mode to work again on OMAP3-based
platforms with twl4030.  Tested on 3530/Beagle, 3730/Beagle-xM,
3530/Overo, 3730/Overo-STORM.

Special thanks to Florian Vaussard for suggesting use of preprocessor
feature.

Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Using the gpio-keys bindings, configure the user button on Beagle
boards.  Since the user button is enabled as a wakeup source, also
ensure the GPIO pin is mux'd correctly and has IO ring wakeups enabled,
so it can also wakeup from off mode.

Special thanks to Florian Vaussard for suggesting the preprocessor
feature.

Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Ensure the console uart (UART3) on these boards is mux'd correctly, and
IO ring wakeup is enabled.

This is needed for serial console wakeups when using DT boot.

Thanks to Florian Vaussard for suggestion to use preprocessor
features.

Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Booting omap5 uevm results in the following error
"did not get pins for uart error: -19"

This happens because omap5 uevm dts file is not adapted
to use uart through pinctrl framework.
Populate uart pinctrl data to get rid of the error.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Add support for blue LED 1 off of GPIO 153.
Make the LED a heartbeat LED
Configure the MUX for GPIO output.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.

Also provide pin multiplexer information for the USB host
pins.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The uevm is the only official board supported for the OMAP5 soc
in mainline. The existent sevm platform will no more be supported.
Hence cleaning up the board dts file to have only the data
required for uevm.

Renaming the board dts file and adding the following cleanups.

 * There are no devices connected on I2C 2,3,4 buses. So remove
   the pinmux data for the same.

 * OMAP5432 and DDR3 memory is used in the uevm. Temperature polling
   is not supported with DDR3 memories. Because of DDR3 phy limitation
   the voltage change across DVFS and all shadow registers for DVFS on
   DDR3 is not supported. Hence the emif kernel driver is not required,
   so removing the DDR3 device file and emif nodes for uevm.

 * Keypad is not supported on uevm. So remove the device node.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

When making the dtbs target on OMAP/AM35xx, some trees are not
built.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The pinctrl IP inside the AM33XX family differs slightly from
what is found on OMAP2+. Define a specific header to take account
of the differences.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Replace /include/ by #include for AM33XX and AM35XX device tree
files, in order to use the C pre-processor, making use of #define
features possible.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those
represented here are the minimal DT nodes necessary to get kernel
booting.

In DT nodes, "ti,hwmod" property has not been added, this would be
added along with PRCM support for AM43x.
Signed-off-by: Ankur Kishore <a-kishore@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Update the dt property ti,audpwron-gpio to use the
gpio macro definition for GPIO_ACTIVE_HIGH.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es
are different.

A1-A3 = gpio_wk7
ES = gpio_110

There is no change to LED D2

Abstract away the pinmux and the LED definitions for the two boards into
the respective DTS files.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Most of the constants are taken from arch/arm/mach-omap2/mux.h.
Define some others for the PIN_OUTPUT_* flavours.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Use the constants defined in include/dt-bindings/interrupt-controller/
to enhance readability.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

Replace /include/ by #include for OMAP2+ DT, in order to use the
C pre-processor, making use of #define features possible.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

GPMC controller on AM335x-EVM has a NAND flash connected to it.
This patch updates following in am335x-evm.dts:
- adds nandflash specific pin-mux configs
- adds nand node as child of GPMC contoller, with information about
  NAND flash interface, NAND partition table, ECC scheme, elm handle id.
- updates GPMC node for newer GPMC DT properties added in linux-3.10.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Gupta, Pekon <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

ELM hardware engine is used for locating bit-flips in NAND data
This patch is required for working of hardware based NAND ECC schemes
with DT support.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The IGEP COM Module has an 512MB NAND flash memory.

Add a device node for this NAND and its partition layout.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The IGEPv2 board has an 512MB NAND flash memory.

Add a device node for this NAND and its partition layout.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to
the OMAP3 processor though the General-Purpose Memory Controller.

This patch adds a device node for the ethernet chip as a GPMC child
and all its dependencies (regulators, GPIO and pin muxs).
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>