Merge tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Merge "The Freescale/NXP arm64 device tree updates for 4.7" from Shawn Guo:

 - New board support of LS1043a-QDS from Freescale/NXP
 - Add new compatible for LS1043A and LS2080A GPIO devices
 - Update device tree bindings and sources for LS2080A fsl-mc device
 - Update QSPI and DSPI support on LS1043A and LS2080A

* tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: ls2080a: fsl-mc dt node updates
  Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
  arm64: dts: ls1043a: add the DTS node for QSPI support
  Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
  arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
  arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
  arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
  Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
  arm64: dts: ls1043a-rdb: add the DTS for DSPI support
  arm64: dts: add LS1043a-QDS board support
  Documentation: DT: Add entry for Freescale LS1043a-QDS board

Merge "ARM: mediatek: dts64 updates for v4.7" from Matthias Brugger:

- add thermal and auxadc device nodes to mt8173
- add thermal zone nodes to mt8173

* tag 'v4.6-next-dts64' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173: Add thermal zone node.
  ARM64: dts: mt8173: Add thermal/auxadc device nodes

Merge tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding:

Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.

* tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  dt-bindings: gk20a: Fix typo in compatible name

Merge tag 'tegra-for-4.7-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "dt-bindings: gpio: tegra: Add Tegra186 support" from Thierry Reding:

Adds device tree bindings for the GPIO and AON controllers found on the
Tegra186 SoC.

* tag 'tegra-for-4.7-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Add DT binding for Tegra186 GPIO controllers
  ARM: tegra: Fix naming in GPIO DT binding header

Merge "mvebu dt64 for 4.7" from Gregory CLEMENT:

- switch to label in the mvebu arm64 device tree
- use new clock binding on Armada 7K/8K
- improve SPI and I2C description on Armada 7K/8k
- add CP110 block adding PCIe, SATA and USB3
- add XOR support on Armada 3700
- few more little fix

* tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: add XOR node for Armada 3700 SoC
  arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
  arm64: dts: marvell: Rename armada-37xx USB node
  arm64: dts: marvell: Clean up armada-3720-db
  arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
  arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
  arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
  arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
  arm64: dts: marvell: use new clock binding on Armada AP806
  arm64: dts: marvell: add UART aliases and define stdout-path
  arm64: dts: marvell: rename armada-ap806 XOR nodes
  arm64: dts: marvell: clean up armada-7040-db

Merge tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Merge "Rockchip dts64 updates for v4.7 - part2" from Heiko Stübner:

Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.

* tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  clk: rockchip: export some necessary rk3399 clock ids
  clk: rockchip: rename rga clock-id on rk3399
  clk: rockchip: add general gpu soft-reset on rk3399
  arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
  clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
  clk: rockchip: add dt-binding header for rk3399

This merges fixes from linux-4.6 into the next/dt64 tree to avoid
a later merge conflict.

* renesas/fixes-2:
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks

Armada 3700 SoC comprise one dual-channel XOR engine and this
patch adds its according representation.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Use "rockchip,rk3399-evb" compatible string for Rockchip RK3399
evaluation board.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This patch adds core dtsi file for Rockchip RK3399 SoCs.

The RK3399 has big/little architecture, which needs a separate
node for the PMU of each microarchitecture, for now it missing
the pmu node since the old one could not work well.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Merge "ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7" Wei Xu:

- Fix its node without msi-cells for hip05
- Add nor flash node for hip05 D02 board
- Add initial dts for hip06 D03 board
- Reorder and add the hip06 D03 binding in the binding document

* tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
  Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
  arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
  arm64: dts: hip05: Add nor flash support
  arm64: dts: hip05: fix its node without msi-cells

Merge tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.7" from Simon Horman:

* Don't disable referenced optional clocks in DT of r8a7795 SoC
* Populate EXTALR in DT of salvator-x board
* Enable PCIe in DT of salvator-x board

* tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
  arm64: dts: r8a7795: Add CAN support
  arm64: dts: r8a7795: Add CAN external clock support

Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Even if the Armada 37xx does not any specific setup, the device tree
binding documentation requires to use a SoC-specific version
corresponding to the platform first followed by the generic version.

This patch introduce this new compatible string and updates the
documentation accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

No need to reflect the USB version in the node name.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]

Instead of duplicating the SoC's node hierarchy, including a bus node
named "internal-regs", reference the actually desired nodes by label,
like Berlin already does. Add labels where necessary.

Drop an inconsistent white line while at it.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]

This patch adds documentation for the devicetree bindings used by
the DT files of Hisilicon Hip06 D03 board.

Meanwhile, reorder the soc/board name alphabetically.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

The Hip06 soc has same cpu topology compared with Hip05, four clusters
and each cluster has quard Cortex-A57, but with different IO part,
like HNS, SAS and PCI, they are all upgraded. There are also not same
in ITS, MBIGEN and SMMU, etc.

This patch adds the initial dts for hip06 d03 board.

Note, there is no serial, because the soc use LPC uart, the serial node
is not needed.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

This patch is to add support nor-flash. Notice, the pre-defined
partitions may not be used.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

Fix commit abf9c25d ("arm64: dts: hip05: Append all gicv3 ITS
entries"), it forgets the property msi-cell, see arm,gic-v3.txt.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.

Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

It can be used for the watchdog.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The operating system driver can take advantage of the IOMMU to remove
the need for physically contiguous memory buffers.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

This clock is required for the GPU to operate.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

GM20B's definition is mostly similar to GK20A's, but requires an
additional clock.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

GK20A can optionally make use of an IOMMU.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The correct compatible name is "nvidia,gk20a".
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

This commit enables several interfaces of the CP side of the Armada
7040 for the Armada 7040 DB board:

 - one PCIe interface
 - one SPI controller with an attached SPI flash
 - one I2C controller
 - one SATA controller
 - two USB3 controllers
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

This commit adds an initial Device Tree description for the CP110
master that is found in the Armada 7K and 8K SoCs. This initial
description describes:

 - the system controller (to provide clocks)
 - three PCIe interfaces
 - the SATA interface
 - the I2C controllers
 - the SPI controllers

For the record, the organization of the SoCs is as follows:

 - 7020: dual-core AP, one CP110 (master)
 - 7040: quad-core AP, one CP110 (master)
 - 8020: dual-core AP, two CP110s (master and slave)
 - 8040: quad-core AP, two CP110s (master and slave)

For this reason, all of the 7020, 7040, 8020 and 8040 include
armada-cp110-master.dtsi. When support for the second CP110 (slave)
used in 8020 and 8040 will be added, the .dtsi files for those SoCs
will in addition include armada-cp110-slave.dtsi.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

The I2C controller found in the Marvell Armada 7K/8K provides the
bridge/offloading features, so the Device Tree should use the
marvell,mv78230-i2c compatible string instead of marvell,mv64xxx-i2c.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

This commit slightly improves the description of the SPI flash
connected to the SPI controller of the Armada 7040, by:

 - Using the more generic "jedec,spi-nor" compatible string, which
   lets the driver auto-detect the exact SPI flash type.

 - Removing the silly comment about the Chip Select, since reg = <0>
   is explicit enough.

 - Switching to the new Device Tree binding to describe flash
   partitions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

This commit updates the Marvell AP806 Device Tree description to make
use of the accepted clock Device Tree binding.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

This commit adds the necessary UART aliases to the main Armada 7K/8K
.dtsi file, and uses them to define the /chosen/stdout-path property
on the Armada 7040 DB board.
Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Node names should not contain an instance number, the unit address
serves to distinguish nodes of the same name. So rename the XOR nodes
to just xor@<address>.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas:
 - remove labels, they are really not needed for XOR engines.
 - remove the Fixes: tag, as this is not a fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Instead of duplicating the node hierarchy, reference the nodes by label,
adding labels where necessary.

Drop some trailing or inconsistent white lines while at it.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas: drop Fixes tag as it is not a bug fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

updates to the fsl-mc node for full functionality:
   -msi-parent is needed for interrupt support
   -ranges is needed to enable the bus driver to translate bus addresses
   -dpmac nodes provide a basis for relating dpmac objects to PHYs
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>