- 08 Apr, 2019 2 commits
-
-
YueHaibing authored
When building CONFIG_DEBUG_FS is not set gcc warn this: drivers/spi/spi-bcm2835aux.c: In function bcm2835aux_spi_probe: drivers/spi/spi-bcm2835aux.c:591:2: error: too many arguments to function bcm2835aux_debugfs_create bcm2835aux_debugfs_create(bs, dev_name(&pdev->dev)); ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/spi-bcm2835aux.c:145:13: note: declared here static void bcm2835aux_debugfs_create(struct bcm2835aux_spi *bs) Reported-by:
Hulk Robot <hulkci@huawei.com> Fixes: 8048d151 ("spi: bcm2835aux: add driver stats to debugfs") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
Mukesh Ojha <mojha@codeaurora.org> Signed-off-by:
Mark Brown <broonie@kernel.org>
-
Sergei Shtylyov authored
The 'status' local variable is initialized but this value is never used, thus kill that initializer. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
-
- 05 Apr, 2019 13 commits
-
-
Naga Sureshkumar Relli authored
Add support for QSPI controller driver used by Xilinx Zynq SOC. Signed-off-by:
Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by:
-
Naga Sureshkumar Relli authored
This patch adds the dts binding document for Zynq SOC QSPI controller. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Andrey Smirnov authored
There's no code using 'pdev' field in struct spi_gpio. Drop it. Signed-off-by:
Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
-
Andrey Smirnov authored
The logic of setting mflags in spi_gpio_request() is very simple and there isn't much benefit in having it in that function. Move all of that code outside into spi_gpio_probe() in order to simplify things. Signed-off-by:
-
Andrey Smirnov authored
Move code calling spi_get_gpio_descs() to happen after ctlr->dev's name is set in order to have proper GPIO consumer names. Before: cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio: gpio-6 ( |regulator-usb0-vbus ) out lo gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio: gpio-36 ( |scl ) in hi gpio-37 ( |sda ) in hi gpio-40 ( |(null) CS1 ) out lo gpio-41 ( |(null) CS0 ) out lo ACTIVE LOW gpio-42 ( |miso ) in hi gpio-43 ( |mosi ) in lo gpio-44 ( |sck ) out lo After: cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio: gpio-6 ( |regulator-usb0-vbus ) out lo gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio: gpio-36 ( |scl ) in hi gpio-37 ( |sda ) in hi gpio-40 ( |spi0 CS1 ) out lo gpio-41 ( |spi0 CS0 ) out lo ACTIVE LOW gpio-42 ( |miso ) in hi gpio-43 ( |mosi ) in lo gpio-44 ( |sck ) out lo Signed-off-by:
-
Andrey Smirnov authored
DT use-case already relies on SPI core to control CS (requested by of_spi_register_master() and controlled spi_set_cs()), so there's no need to try to request those GPIO in spi-gpio code. Change the code such that spi-gpio's CS related code is only used if device is probed via pdata. Signed-off-by:
-
Sowjanya Komatineni authored
This patch sets SPI device id from the device tree as the bus number. Signed-off-by:
Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by:
-
Sowjanya Komatineni authored
Packed mode expects minimum transfer length of 4 bytes. This patch fixes this by using unpacked mode for transfers less than 4 bytes. Signed-off-by:
-
Sowjanya Komatineni authored
Tegra SPI supports 4 through 32 bits per word. This patch sets bits_per_word_mask accordingly to support transfer with these bits per word. Signed-off-by:
-
Sowjanya Komatineni authored
This patch dumps SPI registers on transfer error or timeout for debug purpose. Signed-off-by:
-
Mark Brown authored
-
Sowjanya Komatineni authored
This patch moves SPI controller reset out of spin lock. Signed-off-by:
-
Sowjanya Komatineni authored
With SW CS, during the transfer completion CS is de-asserted by writing default command1 register value to SPI_COMMAND1 register. With this both mode and CS state are set at the same time and if current transfer mode is different to default SPI mode and if mode change happens prior to CS de-assert, clock polarity can change while CS is active before transfer finishes. This causes Slave to see spurious clock edges resulting in data mismatch. This patch fixes this by de-asserting CS before writing SPI_COMMAND1 to its default value so through out the transfer it will be in same SPI mode. Signed-off-by:
-
- 04 Apr, 2019 4 commits
-
-
Geert Uytterhoeven authored
Convert GPIO chip selects in the Renesas MSIOF SPI driver from legacy GPIO numbers to GPIO descriptors. Notes: - The board file for the SH7724-based Ecovec24 development board now registers a GPIO descriptor lookup, instead of passing a GPIO number through controller_data, - sh_msiof_get_cs_gpios() must release all GPIOs, else spi_get_gpio_descs() cannot claim them during SPI controller registration. Signed-off-by:Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
-
kbuild test robot authored
Fixes: 5fd917af ("spi: bcm2835aux: make the polling duration limits configurable") Signed-off-by:
kbuild test robot <lkp@intel.com> Signed-off-by:
-
Geert Uytterhoeven authored
While devm_gpiod_get_index_optional() returns NULL if the GPIO is not present (i.e. -ENOENT), it may still return other error codes, like -EPROBE_DEFER. Currently these are not handled, leading to unrecoverable failures later in case of probe deferral: gpiod_set_consumer_name: invalid GPIO (errorpointer) gpiod_direction_output: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) Detect and propagate errors to fix this. Fixes: f3186dd8 ("spi: Optionally use GPIO descriptors for CS GPIOs") Signed-off-by: -
Geert Uytterhoeven authored
The conversion from GPIO numbers to GPIO descriptors removed the use of spi->controller_data, but forgot to update a comment referring to it. Fixes: 9b00bc7b ("spi: spi-gpio: Rewrite to use GPIO descriptors") Signed-off-by:
-
- 03 Apr, 2019 19 commits
-
-
Martin Sperl authored
To estimate efficiency add statistics on transfer types (polling and interrupt) used to debugfs. Signed-off-by:
Martin Sperl <kernel@martin.sperl.org> Signed-off-by:
-
Geert Uytterhoeven authored
In accordance with hardware specification Ver 1.0, reset register transmission / reception setting before transfer. Signed-off-by:
Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> [geert: Use readl_poll_timeout_atomic()] Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
-
Geert Uytterhoeven authored
Replace the open-coded loop in sh_msiof_modify_ctr_wait() by a call to the readl_poll_timeout_atomic() helper macro. Suggested-by:
Wolfram Sang <wsa@the-dreams.de> Signed-off-by:
-
Clark Wang authored
Add the missing complete operations for dma_completion to fix the problem of blocking at the wait_for_completion_interruptible() function when use spi_slave_abort(). Signed-off-by:
Clark Wang <xiaoning.wang@nxp.com> Signed-off-by:
-
Andrey Smirnov authored
Drop unused pdata copy in struct spi_gpio. No functional change intended. Signed-off-by:
-
Andrey Smirnov authored
Swap branches of the if statement in order to simplify it's logical condition being checked. No functional change intended. Signed-off-by:
-
Andrey Smirnov authored
Use a local "struct spi_bitbang *bb" in spi_gpio_probe() for brevity. No functional change intended. Signed-off-by:
-
Andrey Smirnov authored
Use a local "struct device *dev" in spi_gpio_probe() for brevity. No functional change intended. Signed-off-by:
-
Andrey Smirnov authored
Spi_to_pdata() is not used anywhere in the code. Drop it. Signed-off-by:
-
Martin Sperl authored
Under some circumstances the default 30 us polling limit is not optimal and may lead to long delays because we are waiting on an interrupt. with this patch we have the possibility to influence this policy. So make this limit (in us) configurable via a module parameters (but also modifyable via /sys/modules/...) Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
-
Martin Sperl authored
Setup gpio-cs to the correct levels during setup and also make the gpio definitely an output GPIO. This is transparently fixing some badly configured DTs in the process where cs-gpio is set but the gpios are still configured with native cs. It also makes 100% sure that the initial CS levels are as expected - especially on systems with devices on a bus with mixed CS_HIGH/CS_LOW settings. Fixes: 1ea29b39 ("spi: bcm2835aux: add bcm2835 auxiliary spi device...") Signed-off-by:
-
Martin Sperl authored
From personal bad experience (even as the author of the original driver) it shows that native-cs is "somewhat" supported by the spi bus driver when using a buggy device tree. So make sure that the driver is warning in dmesg about this fact that we are running in a not supported mode that may have surprizing limitations. Fixes: 1ea29b39 ("spi: bcm2835aux: add bcm2835 auxiliary spi device...") Signed-off-by:
-
Martin Sperl authored
The original driver by default defines num_chipselects as -1. This actually allicates an array of 65535 entries in of_spi_register_master. There is a side-effect for buggy device trees that (contrary to dt-binding documentation) have no cs-gpio defined. This mode was never supported by the driver due to limitations of native cs and additional code complexity and is explicitly not stated to be implemented. To keep backwards compatibility with such buggy DTs we limit the number of chip_selects to 1, as for all practical purposes it is only ever realistic to use a single chip select in native cs mode without negative side-effects. Fixes: 1ea29b39 ("spi: bcm2835aux: add bcm2835 auxiliary spi device...") Signed-off-by:
-
Martin Sperl authored
Remove dead code that never can get reached, as we limit count to a max of 3. Suggested-by:
Hubert Denkmair <h.denkmair@intence.de> Signed-off-by:
-
Martin Sperl authored
On long running tests with a mcp2517fd can controller it showed that on rare occations the data read shows corruptions for longer spi transfers. Example of a 22 byte transfer: expected (as captured on logic analyzer): FF FF 78 00 00 00 08 06 00 00 91 20 77 56 84 85 86 87 88 89 8a 8b read by the driver: FF FF 78 00 00 00 08 06 00 00 91 20 77 56 84 88 89 8a 00 00 8b 9b To fix this use BCM2835_AUX_SPI_STAT_RX_LVL to determine when we may read data from the fifo reliably without any corruption. Surprisingly the only values ever empirically read in BCM2835_AUX_SPI_STAT_RX_LVL are 0x00, 0x10, 0x20 and 0x30. So whenever the mask is not 0 we can read from the fifo in a safe manner. The patch has now been tested intensively and we are no longer able to reproduce the "RX" issue any longer. Fixes: 1ea29b39 ("spi: bcm2835aux: add bcm2835 auxiliary spi device...") Reported-by:
-
Martin Sperl authored
This read of the fifo is a potential candidate for a race condition as the spi transfer is not necessarily finished and so can lead to an early read of the fifo that still misses data. So it has been removed. Fixes: 1ea29b39 ("spi: bcm2835aux: add bcm2835 auxiliary spi device...") Suggested-by:
-
Martin Sperl authored
Sharing more code between polling and interrupt-driven mode. Signed-off-by:
-
Naga Sureshkumar Relli authored
Export spi_mem_default_supports_op(), so that controller drivers can use this. spi-mem driver already exports this using EXPORT_SYMBOL, but not declared it in spi-mem.h. This patch declares spi_mem_default_supports_op() in spi-mem.h and also removes the static from the function prototype. Signed-off-by:
-
Geert Uytterhoeven authored
Improve maintainability by converting the register bit, bitmask, and bitfield definitions from hexadecimal constants to constructs using BIT(), GENMASK(), or "val << shift". Suggested-by:
Simon Horman <horms+renesas@verge.net.au> Signed-off-by:
-
- 02 Apr, 2019 2 commits
-
-
Rasmus Villemoes authored
Taking one interrupt for every byte is rather slow. Since the controller is perfectly capable of transmitting 32 bits at a time, change t->bits_per-word to 32 when the length is divisible by 4 and large enough that the reduced number of interrupts easily compensates for the one or two extra fsl_spi_setup_transfer() calls this causes. Signed-off-by:
Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by:
-
Rasmus Villemoes authored
Commit c9bfcb31 (spi_mpc83xx: much improved driver) introduced logic to ensure bits_per_word and speed_hz stay the same for a series of spi_transfers with CS active, arguing that The current driver may cause glitches on SPI CLK line since one must disable the SPI controller before changing any HW settings. This sounds quite reasonable. So this is a quite naive attempt at relaxing this sanity checking to only ensure that speed_hz is constant - in the faint hope that if we do not causes changes to the clock-related fields of the SPMODE register (DIV16 and PM), those glitches won't appear. The purpose of this change is to allow automatically optimizing large transfers to use 32 bits-per-word; taking one interrupt for every byte is extremely slow. Signed-off-by:
-
