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  1. 23 Nov, 2018 2 commits
    • Linus Torvalds's avatar
      Merge tag 'drm-fixes-2018-11-23' of git://anongit.freedesktop.org/drm/drm · 9b7c880c
      Linus Torvalds authored 
      Pull drm fixes from Dave Airlie:
 "Regular drm fixes:

  amdgpu:
   - Vega20 fixes
   - firmware loading fix
   - panel display fix
   - override fix

  i915:
   - Sandybridge lockup fix
   - fastboot DSI panel fix
   - GPU hang on Broxton
   - GPU reloc fixes on pineview/bearlake

  ast:
   - screen blurring fix
   - cursor appearance fix

  udmabuf:
   - mmap fix

  vc4:
   - NULL deref fix
   - async cursor update fix

  All seems pretty normal at this stage"

* tag 'drm-fixes-2018-11-23' of git://anongit.freedesktop.org/drm/drm:
  drm/ast: fixed cursor may disappear sometimes
  drm/ast: change resolution may cause screen blurred
  drm/i915: Add rotation readout for plane initial config
  drm/i915: Force a LUT update in intel_initial_commit()
  drm/fb-helper: Blacklist writeback when adding connectors to fbdev
  drm/i915: Write GPU relocs harder with gen3
  drm/amdgpu: Enable HDP memory light sleep
  drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture
  drm/amd/pp: handle negative values when reading OD
  drm/amdgpu: Add missing firmware entry for HAINAN
  drm/amd/powerplay: disable Vega20 DS related features
  drm/amdgpu: Fix oops when pp_funcs->switch_power_profile is unset
  drm/i915: Disable LP3 watermarks on all SNB machines
  drm/ast: Remove existing framebuffers before loading driver
  udmabuf: set read/write flag when exporting
  drm/amd/display: Support amdgpu "max bpc" connector property (v2)
  drm/amdgpu: Add amdgpu "max bpc" connector property (v2)
  drm/vc4: Set ->legacy_cursor_update to false when doing non-async updates
  drm/vc4: Fix NULL pointer dereference in the async update path
      9b7c880c
    • Dave Airlie's avatar
      Merge tag 'drm-intel-fixes-2018-11-22' of... · 98c9cdfd
      Dave Airlie authored 
      Merge tag 'drm-intel-fixes-2018-11-22' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

- Fix for fastboot DSI panel boot time flicker regression, also fixes Bugzilla #108225
- Fix Bugzilla #101269 to avoid GPU hangs on Sandybridge machines
- Avoid GPU hang on error capture on Broxton with Vt-d enabled
- Avoid missing GPU relocations on Pineview and Bearlake (Gen3)
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181122120555.GA18282@jlahtine-desk.ger.corp.intel.com
      98c9cdfd
  3. 22 Nov, 2018 9 commits
  5. 21 Nov, 2018 5 commits
  7. 20 Nov, 2018 13 commits
  9. 19 Nov, 2018 11 commits
    • Thor Thayer's avatar
      mtd: spi-nor: Fix Cadence QSPI page fault kernel panic · a6a66f80
      Thor Thayer authored 
      The current Cadence QSPI driver caused a kernel panic sporadically
when writing to QSPI. The problem was caused by writing more bytes
than needed because the QSPI operated on 4 bytes at a time.
<snip>
[   11.202044] Unable to handle kernel paging request at virtual address bffd3000
[   11.209254] pgd = e463054d
[   11.211948] [bffd3000] *pgd=2fffb811, *pte=00000000, *ppte=00000000
[   11.218202] Internal error: Oops: 7 [#1] SMP ARM
[   11.222797] Modules linked in:
[   11.225844] CPU: 1 PID: 1317 Comm: systemd-hwdb Not tainted 4.17.7-d0c45cd44a8f
[   11.235796] Hardware name: Altera SOCFPGA Arria10
[   11.240487] PC is at __raw_writesl+0x70/0xd4
[   11.244741] LR is at cqspi_write+0x1a0/0x2cc
</snip>
On a page boundary limit the number of bytes copied from the tx buffer
to remain within the page.

This patch uses a temporary buffer to hold the 4 bytes to write and then
copies only the bytes required from the tx buffer.
Reported-by: default avatarAdrian Amborzewicz <adrian.ambrozewicz@intel.com>
Signed-off-by: default avatarThor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
      a6a66f80
    • Greathouse, Joseph's avatar
      drm/amd/pp: handle negative values when reading OD · a4233cc9
      Greathouse, Joseph authored 
      Reading the sysfs files pp_sclk_od and pp_mclk_od return the
percentage difference between the VBIOS-provided default
frequency and the current (possibly user-set) frequency in
the highest SCLK and MCLK DPM states, respectively.

Writing to these files provides an easy mechanism for
setting a higher-than-default maximum frequency. We
normally only allow values >= 0 to be written here.

However, with the addition of pp_od_clk_voltage, we now
allow users to set custom DPM tables. If they then set
the maximum DPM state to something less than the default,
later reads of pp_*_od should return a negative value.
The highest DPM state is now less than the VBIOS-provided
default, so the percentage is negative.

The math to calculate this was originally performed with
unsigned values, meaning reads that should return negative
values returned meaningless data. This patch corrects that
issue and normalizes how all of the calculations are done
across the various hwmgr types.
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarJoseph Greathouse <Joseph.Greathouse@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      a4233cc9
    • Takashi Iwai's avatar
      drm/amdgpu: Add missing firmware entry for HAINAN · 8d4d7c58
      Takashi Iwai authored 
      Due to lack of MODULE_FIRMWARE() with hainan_mc.bin, the driver
doesn't work properly in initrd.  Let's add it.

Bugzilla: https://bugzilla.suse.com/show_bug.cgi?id=1116239
Fixes: 8eaf2b1f ("drm/amdgpu: switch firmware path for SI parts")
Cc: <stable@vger.kernel.org>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      8d4d7c58
    • Evan Quan's avatar
      drm/amd/powerplay: disable Vega20 DS related features · 009dd011
      Evan Quan authored 
      Disable these features on Vega20 for now.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: Feifei Xu<Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      009dd011
    • Felix Kuehling's avatar
      drm/amdgpu: Fix oops when pp_funcs->switch_power_profile is unset · 919a52fc
      Felix Kuehling authored 
      On Vega20 and other pre-production GPUs, powerplay is not enabled yet.
Check for NULL pointers before calling pp_funcs function pointers.

Also affects Kaveri.

CC: Joerg Roedel <jroedel@suse.de>
Signed-off-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Tested-by: default avatarJoerg Roedel <jroedel@suse.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
      919a52fc
    • Linus Torvalds's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net · f2ce1065
      Linus Torvalds authored 
      Pull networking fixes from David Miller:

 1) Fix some potentially uninitialized variables and use-after-free in
    kvaser_usb can drier, from Jimmy Assarsson.

 2) Fix leaks in qed driver, from Denis Bolotin.

 3) Socket leak in l2tp, from Xin Long.

 4) RSS context allocation fix in bnxt_en from Michael Chan.

 5) Fix cxgb4 build errors, from Ganesh Goudar.

 6) Route leaks in ipv6 when removing exceptions, from Xin Long.

 7) Memory leak in IDR allocation handling of act_pedit, from Davide
    Caratti.

 8) Use-after-free of bridge vlan stats, from Nikolay Aleksandrov.

 9) When MTU is locked, do not force DF bit on ipv4 tunnels. From
    Sabrina Dubroca.

10) When NAPI cached skb is reused, we must set it to the proper initial
    state which includes skb->pkt_type. From Eric Dumazet.

11) Lockdep and non-linear SKB handling fix in tipc from Jon Maloy.

12) Set RX queue properly in various tuntap receive paths, from Matthew
    Cover.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (61 commits)
  tuntap: fix multiqueue rx
  ipv6: Fix PMTU updates for UDP/raw sockets in presence of VRF
  tipc: don't assume linear buffer when reading ancillary data
  tipc: fix lockdep warning when reinitilaizing sockets
  net-gro: reset skb->pkt_type in napi_reuse_skb()
  tc-testing: tdc.py: Guard against lack of returncode in executed command
  tc-testing: tdc.py: ignore errors when decoding stdout/stderr
  ip_tunnel: don't force DF when MTU is locked
  MAINTAINERS: Add entry for CAKE qdisc
  net: bridge: fix vlan stats use-after-free on destruction
  socket: do a generic_file_splice_read when proto_ops has no splice_read
  net: phy: mdio-gpio: Fix working over slow can_sleep GPIOs
  Revert "net: phy: mdio-gpio: Fix working over slow can_sleep GPIOs"
  net: phy: mdio-gpio: Fix working over slow can_sleep GPIOs
  net/sched: act_pedit: fix memory leak when IDR allocation fails
  net: lantiq: Fix returned value in case of error in 'xrx200_probe()'
  ipv6: fix a dst leak when removing its exception
  net: mvneta: Don't advertise 2.5G modes
  drivers/net/ethernet/qlogic/qed/qed_rdma.h: fix typo
  net/mlx4: Fix UBSAN warning of signed integer overflow
  ...
      f2ce1065
    • Ville Syrjälä's avatar
      drm/i915: Disable LP3 watermarks on all SNB machines · 21556350
      Ville Syrjälä authored 
      I have a Thinkpad X220 Tablet in my hands that is losing vblank
interrupts whenever LP3 watermarks are used.

If I nudge the latency value written to the WM3 register just
by one in either direction the problem disappears. That to me
suggests that the punit will not enter the corrsponding
powersave mode (MPLL shutdown IIRC) unless the latency value
in the register matches exactly what we read from SSKPD. Ie.
it's not really a latency value but rather just a cookie
by which the punit can identify the desired power saving state.
On HSW/BDW this was changed such that we actually just write
the WM level number into those bits, which makes much more
sense given the observed behaviour.

We could try to handle this by disallowing LP3 watermarks
only when vblank interrupts are enabled but we'd first have
to prove that only vblank interrupts are affected, which
seems unlikely. Also we can't grab the wm mutex from the
vblank enable/disable hooks because those are called with
various spinlocks held. Thus we'd have to redesigne the
watermark locking. So to play it safe and keep the code
simple we simply disable LP3 watermarks on all SNB machines.

To do that we simply zero out the latency values for
watermark level 3, and we adjust the watermark computation
to check for that. The behaviour now matches that of the
g4x/vlv/skl wm code in the presence of a zeroed latency
value.

v2: s/USHRT_MAX/U32_MAX/ for consistency with the types (Chris)

Cc: stable@vger.kernel.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101269
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103713Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181114173440.6730-1-ville.syrjala@linux.intel.com
(cherry picked from commit 03981c6e)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      21556350
    • Connor McAdams's avatar
      ALSA: hda/ca0132 - fix AE-5 pincfg · a6b0961b
      Connor McAdams authored 
      This patch fixes the pincfg assignment for the AE-5, which was
previously using the Recon3D pincfg's by mistake.

Fixes: d06feaf0 ("ALSA: hda/ca0132 - Add pincfg for AE-5")
Signed-off-by: default avatarConnor McAdams <conmanx360@gmail.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      a6b0961b
    • Connor McAdams's avatar
      ALSA: hda/ca0132 - Add new ZxR quirk · cce99729
      Connor McAdams authored 
      This patch adds a new PCI subsys ID for the ZxR, as found and tested by
other users. Without a way to know if any Z's use it as well, it keeps
the quirk of QUIRK_SBZ and goes through the HDA subsys test function.
Signed-off-by: default avatarConnor McAdams <conmanx360@gmail.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
      cce99729
    • Matthew Cover's avatar
      tuntap: fix multiqueue rx · 8ebebcba
      Matthew Cover authored 
      When writing packets to a descriptor associated with a combined queue, the
packets should end up on that queue.

Before this change all packets written to any descriptor associated with a
tap interface end up on rx-0, even when the descriptor is associated with a
different queue.

The rx traffic can be generated by either of the following.
  1. a simple tap program which spins up multiple queues and writes packets
     to each of the file descriptors
  2. tx from a qemu vm with a tap multiqueue netdev

The queue for rx traffic can be observed by either of the following (done
on the hypervisor in the qemu case).
  1. a simple netmap program which opens and reads from per-queue
     descriptors
  2. configuring RPS and doing per-cpu captures with rxtxcpu

Alternatively, if you printk() the return value of skb_get_rx_queue() just
before each instance of netif_receive_skb() in tun.c, you will get 65535
for every skb.

Calling skb_record_rx_queue() to set the rx queue to the queue_index fixes
the association between descriptor and rx queue.
Signed-off-by: default avatarMatthew Cover <matthew.cover@stackpath.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8ebebcba
    • David Ahern's avatar
      ipv6: Fix PMTU updates for UDP/raw sockets in presence of VRF · 7ddacfa5
      David Ahern authored 
      Preethi reported that PMTU discovery for UDP/raw applications is not
working in the presence of VRF when the socket is not bound to a device.
The problem is that ip6_sk_update_pmtu does not consider the L3 domain
of the skb device if the socket is not bound. Update the function to
set oif to the L3 master device if relevant.

Fixes: ca254490 ("net: Add VRF support to IPv6 stack")
Reported-by: default avatarPreethi Ramachandra <preethir@juniper.net>
Signed-off-by: default avatarDavid Ahern <dsahern@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7ddacfa5
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