1. 25 Jul, 2009 2 commits
    • Jean Pihet's avatar
      OMAP3: Setup MUX settings for SDRC CKE signals · 9fb97412
      Jean Pihet authored
      This patches ensures the MUX settings are correct for the SDRC
      CKE signals to SDRAM. This allows the self-refresh to work when
      2 chip-selects are in use.
      
      A warning is thrown away in case the initial muxing is incorrect,
      in order to track faulty or old-dated bootloaders.
      Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options
      must be enabled for the mux code to have effect.
      Signed-off-by: default avatarJean Pihet <jpihet@mvista.com>
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      9fb97412
    • Jean Pihet's avatar
      OMAP3 SDRC: add support for 2 SDRAM chip selects · 58cda884
      Jean Pihet authored
      Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2
      SDRAM parts connected to the SDRC.
      
      This patch adds the following:
      - add a new argument of type omap_sdrc_params struct*
      to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params
      - adapted the OMAP boards files to the new prototype of
      omap2_init_common_hw
      - add the SDRC 2nd CS registers offsets defines
      - adapt the sram sleep code to configure the SDRC for the 2nd CS
      
      Note: If the 2nd param to omap2_init_common_hw is NULL, then the
      parameters are not programmed into the SDRC CS1 registers
      
      Tested on 3430 SDP and Beagleboard rev C2 and B5, with
      suspend/resume and frequency changes (cpufreq).
      Signed-off-by: default avatarJean Pihet <jpihet@mvista.com>
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      58cda884
  2. 23 Jul, 2009 1 commit
  3. 22 Jul, 2009 37 commits