Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>

When destroying an inactive queue, we don't need to call
execute_queues_cpsch.
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Oak Zeng <oak.zeng@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Oak Zeng <oak.zeng@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

drm/tegra: Changes for v4.16-rc1

The bulk of these changes are preparation work and addition of support
for Tegra186. Currently only HDMI output (the primary output on Jetson
TX2) is supported, but the hardware is also capable of doing DSI and
DisplayPort.

Tegra DRM now also uses the atomic commit helpers instead of the open-
coded variant that was only doing half its job. As a bit of a byproduct
of the Tegra186 support the driver also gained HDMI 2.0 as well as zpos
property support.

Along the way there are also a few patches to clean up a few things and
fix minor issues.

* tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux: (51 commits)
  drm/tegra: dc: Properly cleanup overlay planes
  drm/tegra: dc: Fix possible_crtcs mask for planes
  drm/tegra: dc: Restore YUV overlay support
  drm/tegra: dc: Implement legacy blending
  drm/tegra: Correct timeout in tegra_syncpt_wait
  drm/tegra: gem: Correct iommu_map_sg() error checking
  drm/tegra: dc: Link DC1 to DC0 on Tegra20
  drm/tegra: Fix non-debugfs builds
  drm/tegra: dpaux: Keep reset defaults for hybrid pad parameters
  drm/tegra: Mark Tegra186 display hub PM functions __maybe_unused
  drm/tegra: Use IOMMU groups
  gpu: host1x: Use IOMMU groups
  drm/tegra: Implement zpos property
  drm/tegra: dc: Remove redundant spinlock
  drm/tegra: dc: Use direct offset to plane registers
  drm/tegra: dc: Support more formats
  drm/tegra: fb: Force alpha formats
  drm/tegra: dpaux: Add Tegra186 support
  drm/tegra: dpaux: Implement runtime PM
  drm/tegra: sor: Support HDMI 2.0 modes
  ...

Updates for 4.16.. fairly small this time around, main thing is
devfreq support for the gpu.

* tag 'drm-msm-next-2018-01-10' of git://people.freedesktop.org/~robclark/linux:
  drm/msm: Add devfreq support for the GPU
  drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter
  drm/msm/adreno: Read the speed bins for a5xx targets
  drm/msm/adreno: Move clock parsing to adreno_gpu_init()
  drm/msm/adreno: Cleanup chipid parsing
  drm/msm/gpu: Remove unused bus scaling code
  drm/msm/adreno: Remove a useless call to dev_pm_opp_get_freq()
  drm/msm/adreno: Call dev_pm_opp_put()
  drm/msm: Fix NULL deref in adreno_load_gpu
  drm/msm: gpu: Only sync fences on rings that exist
  drm/msm: fix leak in failed get_pages
  drm/msm: avoid false-positive -Wmaybe-uninitialized warning
  drm/msm/mdp4: Deduplicate bus_find_device() by name matching
  drm/msm: add missing MODULE_FIRMWARE declarations
  drm/msm: update adreno firmware path in MODULE_FIRMWARE
  drm/msm: free kstrdup'd cmdline
  drm/msm: fix msm_rd_dump_submit prototype
  drm/msm: fix spelling mistake: "ringubffer" -> "ringbuffer"

Add support for devfreq to dynamically control the GPU frequency.
By default try to use the 'simple_ondemand' governor which can
adjust the frequency based on GPU load.

v2: Fix __aeabi_uldivmod issue from the 0 day bot and use
devfreq_recommended_opp() as suggested by Rob.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

Even though the default countable for CP0 is CP_ALWAYS_COUNT (0),
program the selector during HW initialization in an effort to be
up front about which counters are programmed and why.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

Some 5xx based chipsets have different bins for GPU clock speeds.
Read the fuses (if applicable) and set the appropriate OPP table.
This will only work with OPP v2 tables - the bin will be ignored
for legacy pwrlevel tables.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

Move the clock parsing to adreno_gpu_init() to allow for target
specific probing and manipulation of the clock tables.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

We don't need to convert the chipid to an intermediate value and
then back again into a struct adreno_rev.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

Remove the downstream bus scaling code. It isn't needed for for
compatibility with a downstream or vendor kernel. Get it out of the
way to clear space for devfreq support.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

Calling dev_pm_opp_find_freq_floor() returns the matched frequency
in 'freq'.  We don't need to call dev_pm_opp_get_freq() again
to get the frequency value.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

We need to call dev_pm_opp_put() to put back the reference
for the OPP struct after calling the various dev_pm_opp_get_*
functions.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

The newly added get_local_mem_info() function prints a phys_addr_t
using 0x%llx, which is wrong on most 32-bit systems, as shown by
this warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c: In function 'get_local_mem_info':
include/linux/kern_levels.h:5:18: error: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'resource_size_t {aka unsigned int}' [-Werror=format=]
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:297:31: note: format string is defined here
  pr_debug("Address base: 0x%llx limit 0x%llx public 0x%llx private 0x%llx\n",

Passing the address by reference to the special %pap format string will
produce the correct output and avoid the warning.

Fixes: 30f1c042 ("drm/amdgpu: Implement get_local_mem_info")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm-misc-next for 4.16:

Cross-subsystem Changes:

- some dt-binding changes for Ilitek and sun4i devices

Core Changes:

- panel_orientation_quirks: fix tainted kernel

Driver Changes:

- panel changes
- A83T and LVDS support to sun4i

* tag 'drm-misc-next-2018-01-08' of git://anongit.freedesktop.org/drm/drm-misc:
  drm/panel: lvds: Add support for the power-supply property
  dt-bindings: panel: lvds: Document power-supply property
  drm/sun4i: Add A83T support
  drm/sun4i: Add LVDS support
  drm/sun4i: Create minimal multipliers and dividers
  drm/sun4i: Force the mixer rate at 150MHz
  dt-bindings: display: sun4i-drm: Add A83T pipeline
  dt-bindings: display: sun4i-drm: Add LVDS properties
  drm/tinydrm: add driver for ST7735R panels
  dt-bindings: Add binding for Sitronix ST7735R display panels
  dt-bindings: add jianda vendor prefix
  drm/tinydrm: Update ILI9225 compatible string
  dt-bindings: update compatible string for ILI9225
  dt-bindings: Add "vot" vendor prefix
  drm: fix tainted kernel caused by drm_panel_orientation_quirks.c
  drm/panel: Add Ilitek ILI9322 driver
  drm/panel: Add DT bindings for Ilitek ILI9322

Last few updates for 4.16:
- Misc fixes for amdgpu
- Enable swapout for reserved BOs during allocation for ttm
- Misc cleanups for ttm

* 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (24 commits)
  drm/amdgpu: Correct the IB size of bo update mapping.
  drm/ttm: enable swapout for reserved BOs during allocation
  drm/ttm: add new function to check if bo is allowable to evict or swapout
  drm/ttm: use an operation ctx for ttm_tt_bind
  drm/ttm: use an operation ctx for ttm_tt_populate in ttm_bo_driver (v2)
  drm/ttm: use an operation ctx for ttm_mem_global_alloc_page
  drm/ttm: use an operation ctx for ttm_mem_global_alloc
  drm/ttm: call ttm_bo_swapout directly when ttm shrink
  drm/vmwgfx: remove the default io_mem_pfn set
  drm/virtio: remove the default io_mem_pfn set
  drm/radeon: remove the default io_mem_pfn set
  drm/qxl: remove the default io_mem_pfn set
  drm/nouveau: remove the default io_mem_pfn set
  drm/mgag200: remove the default io_mem_pfn set
  drm/cirrus: remove the default io_mem_pfn set
  drm/bochs: remove the default io_mem_pfn set
  drm/ast: remove the default io_mem_pfn set
  drm/ttm: add ttm_bo_io_mem_pfn to check io_mem_pfn
  drm/amdgpu: fix VM faults with per VM BOs
  drm/ttm: drop the spin in delayed delete if the trylock doesn't work
  ...

The first overlay plane can leak if initialization of the second overlay
plane fails. Fix this by properly destroying the first overlay plane on
error.
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Cursor and overlay planes use a possible_crtcs mask based on the DC pipe
number. However, DRM requires each bit in the mask to correspond to the
index of the CRTC, which will be different from the DC pipe number for a
configuration where the first display controller is disabled, or where a
deferred probe leads to the first display controller being probed after
the first.
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Commit ebae8d07 ("drm/tegra: dc: Implement legacy blending") broke
support for YUV overlays by accident. The reason is that YUV formats are
considered opaque because they have no alpha component, but on the other
hand no corresponding format with an alpha component can be returned. In
the case of YUV formats, the opaque format is the same as the alpha
format, so add the special case to restore YUV overlay support.
Reported-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0c0819bdf88fa948188df95e57a10820a8a4548d.1513854122.git-series.maxime.ripard@free-electrons.com

The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0a6a3abcf1a6b7f0e66a81af8a44c5c0566ce06c.1513854122.git-series.maxime.ripard@free-electrons.com

drm/imx: format modifier support

- Add tiled prefetch support to PRE
- Add format modifier support to PRG and imx-drm-core
- Use runtime PM to control PRG clock
- Allow building ipu-v3 under COMPILE_TEST

* tag 'imx-drm-next-2018-01-02' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: allow to build with COMPILE_TEST
  drm/imx: advertise supported plane format modifiers
  drm/imx: add FB modifier support
  gpu: ipu-v3: prg: add modifier support
  gpu: ipu-v3: pre: add tiled prefetch support
  gpu: ipu-v3: prg: switch to runtime PM

This series builds upon the set of fixes previously submitted to move
Armada DRM closer to atomic modeset.  We're nowhere near yet, but this
series helps to get us closer by unifying some of the differences
between the primary and overlay planes.

New features added allows userspace to disable the primary plane if
overlay is full screen and there's nothing obscuring the colorkey -
this saves having to fetch an entire buffer containing nothing but
colorkey when displaying full screen video.

[airlied: fixup for atomic plane helper rename:
a01cb8ba
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Wed Nov 1 22:16:19 2017 +0200

    drm: Move drm_plane_helper_check_state() into drm_atomic_helper.c
]

* 'drm-armada-devel-4.15' of git://git.armlinux.org.uk/~rmk/linux-arm: (29 commits)
  drm/armada: expand overlay trace entry
  drm/armada: implement primary plane update
  drm/armada: extract register generation from armada_drm_primary_set()
  drm/armada: wait for previous work when moving overlay window
  drm/armada: move overlay plane register update generation
  drm/armada: re-organise overlay register update generation
  drm/armada: disable planes at next blanking period
  drm/armada: avoid work allocation
  drm/armada: allow armada_drm_plane_work_queue() to silently fail
  drm/armada: use drm_plane_helper_check_state()
  drm/armada: only enable HSMOOTH if scaling horizontally
  drm/armada: move writes of LCD_SPU_SRAM_PARA1 under lock
  drm/armada: move regs into armada_plane_work
  drm/armada: move event sending into armada_plane_work
  drm/armada: move fb retirement into armada_plane_work
  drm/armada: move overlay plane work out from under spinlock
  drm/armada: clear plane enable bit when disabling
  drm/armada: clean up armada_drm_crtc_plane_disable()
  drm/armada: allow the primary plane to be disabled
  drm/armada: wait and cancel any pending frame work at disable
  ...

Highlights this time:
1. Fix for a nasty Kconfig dependency chain issue from Philipp.
2. Occlusion query buffer address added to the cmdstream validator by
Christian.
3. Fixes and cleanups to the job handling from me. This allows us to
turn on the GPU performance profiling added in the last cycle.
It is also prep work for hooking in the DRM GPU scheduler, which I hope
to land for the next cycle.

* 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux: (32 commits)
  drm/etnaviv: use memset32 to init pagetable
  drm/etnaviv: move submit free out of critical section
  drm/etnaviv: re-enable perfmon support
  drm/etnaviv: couple runtime PM management to submit object lifetime
  drm/etnaviv: move GPU active handling to bo pin/unpin
  drm/etnaviv: move cmdbuf into submit object
  drm/etnaviv: use submit exec_state for perfmon sampling
  drm/etnaviv: move exec_state to submit object
  drm/etnaviv: move PMRs to submit object
  drm/etnaviv: refcount the submit object
  drm/etnaviv: move ww_acquire_ctx out of submit object
  drm/etnaviv: move object unpinning to submit cleanup
  drm/etnaviv: attach in fence to submit and move fence wait to fence_sync
  drm/etnaviv: rename submit fence to out_fence
  drm/etnaviv: move object fence attachment to gem_submit path
  drm/etnaviv: simplify submit_create
  drm/etnaviv: add lockdep annotations to buffer manipulation functions
  drm/etnaviv: hold GPU lock while inserting END command
  drm/etnaviv: move workqueue to be per GPU
  drm/etnaviv: remove switch_context member from etnaviv_gpu
  ...

Merge tag 'exynos-drm-next-for-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Remove lagacy IPP driver
- This driver isn't used anymore so remove it. Marek is preparing new one
  which includes completely rewritten API so this driver will be replaced
  with the new version[1] later.
And cleanups.

[1] https://patches.linaro.org/cover/118386/

* tag 'exynos-drm-next-for-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
  drm/exynos: ipp: Remove Exynos DRM IPP subsystem
  drm/exynos/decon: Add include guard to the Exynos7 header
  drm/exynos/decon: Move headers from global to local place
  drm/exynos: decon5433: Remove unnecessary platform_get_resource() error check

- Add CWSR (compute wave save restore) support for GFX8 (Carrizo)
- Fix SDMA user-mode queues support for GFX7 (Kaveri)
- Add SDMA user-mode queues support for GFX8 (Carrizo)
- Allow HWS (hardware scheduling) to schedule multiple processes concurrently
- Add debugfs support
- Simplify process locking and lock dependencies
- Refactoring topology code to prepare for dGPU support + fixes to that code
  - Add option to generate dummy/virtual CRAT table when its missing or deformed
  - Recognize CPUs other then APUs as compute entities
- Various clean ups and bug fixes

I have not yet sent the dGPU topology code because it depends on a patch
for the PCI subsystem that adds PCIe atomics support. Once that patch is
upstreamed we can continue with the rest of the dGPU code.

* tag 'drm-amdkfd-next-2017-12-24' of git://people.freedesktop.org/~gabbayo/linux: (53 commits)
  drm/amdgpu: Add support for reporting VRAM usage
  drm/amdkfd: Ignore ACPI CRAT for non-APU systems
  drm/amdkfd: Module option to disable CRAT table
  drm/amdkfd: Add AQL Queue Memory flag on topology
  drm/amdkfd: Fixup incorrect info in the CZ CRAT table
  drm/amdkfd: Add perf counters to topology
  drm/amdkfd: Add topology support for dGPUs
  drm/amdkfd: Add topology support for CPUs
  drm/amdkfd: Fix sibling_map[] size
  drm/amdkfd: Simplify counting of memory banks
  drm/amdkfd: Turn verbose topology messages into pr_debug
  drm/amdkfd: sync IOLINK defines to thunk spec
  drm/amdkfd: Support enumerating non-GPU devices
  drm/amdkfd: Decouple CRAT parsing from device list update
  drm/amdkfd: Reorganize CRAT fetching from ACPI
  drm/amdkfd: Group up CRAT related functions
  drm/amdkfd: Fix memory leaks in kfd topology
  drm/amdkfd: Topology: Fix location_id
  drm/amdkfd: Update number of compute unit from KGD
  drm/amd: Remove get_vmem_size from KGD-KFD interface
  ...

Add support for the A83T display pipeline.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/614b430adf3a67320362a75c01b01bd53013da8a.1513854122.git-series.maxime.ripard@free-electrons.com

The TCON supports the LVDS interface to output to a panel or a bridge.
Let's add support for it.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7fbb85f33ee1d5009fde4f0d7d236e11ca58b114.1513854122.git-series.maxime.ripard@free-electrons.com

The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/92ff5881c8f8674056d34458b2f264cd48d4e136.1513854122.git-series.maxime.ripard@free-electrons.com

It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f5f05307972ed05250e8094b302d68b9e7e167f6.1513854122.git-series.maxime.ripard@free-electrons.com

The A83T has two video pipelines in parallel that looks quite similar to
the other SoCs.

The video planes are handled through a controller called the mixer, and the
video signal is then passed to the timing controller (TCON).

And while there is two instances of the mixers and TCONs, they have a
significant number of differences. The TCONs are quite easy to deal with,
one is supposed to generate TV (in the broader term, so including things
like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And
while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs
call them TCON-TV and TCON-LCD, which seems more appropriate.

However, the mixers differ mostly by their capabilities, with some features
being available only in the first one, or the number of planes they expose,
but also through their register layout. And while the capabilities could be
represented as properties, the register layout differences would need to
express all the registers offsets as properties, which is usually quite
bad. Especially since documentation on that hardware block is close to
non-existent and we don't even have the list of all those registers in the
first place.

So let's call them mixer 0 and 1 in our compatibles, even though the name
is pretty bad...

At the moment, we only have tested the code on a board that has a single
display output, so we're leaving the tcon-tv and mixer1 out.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2702a5c1d224af1c51743492ad1b917966f2ad43.1513854122.git-series.maxime.ripard@free-electrons.com

Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.

Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ddbde28fe2e4f21412974e4c69fbfe1c5ff9383f.1513854122.git-series.maxime.ripard@free-electrons.com

The msm/kms driver should work even if there is no GPU device specified
in DT. Currently, we get a NULL dereference crash in adreno_load_gpu
since the driver assumes that priv->gpu_pdev is non-NULL.

Perform an additional check on priv->gpu_pdev before trying to retrieve
the msm_gpu pointer from it.

v2: Incorporate Jordan's comments:
- Simplify the check to share the same error message.
- Use dev_err_once() to avoid an error message every time we open the
  drm device fd.

Fixes: eec874ce (drm/msm/adreno: load gpu at probe/bind time)
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

This adds a new driver for Sitronix ST7735R display panels.

This has been tested using an Adafruit 1.8" TFT.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1514833336-22564-4-git-send-email-david@lechnology.com

This adds a new device tree binding for Sitronix ST7735R display panels,
such as the Adafruit 1.8" TFT.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1514833336-22564-3-git-send-email-david@lechnology.com

This adds a vendor prefix "jianda" for Jiandangjing Technology Co., Ltd.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1514833336-22564-2-git-send-email-david@lechnology.com

This updates the compatible string for a no-name LCD panel to
"vot,v220hf01a-t", "ilitek,ili9225".

The original bindings were the generic "ilitek,ili9225-2.2in-176x220"
because I could not find a datasheet. However, after some more research,
I finally found one, so the actual vendor and model name are now known.

This previous bindings have not made it to the mainline kernel yet, so
this is not breaking backwards compatibility.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1513881187-3197-4-git-send-email-david@lechnology.com

This updates the compatible string for a no-name LCD panel to
"vot,v220hf01a-t", "ilitek,ili9225".

The original bindings [1] were the generic "ilitek,ili9225-2.2in-176x220"
because I could not find a datasheet. However, after some more research,
I finally found one, so the actual vendor and model name are now known.

This previous bindings have not made it to the mainline kernel yet, so
this is not breaking backwards compatibility.

This is also following the precedence of the ILI9322 bindings [2] by using
the pattern "vendor,specific-system-config", "vendor,ip-part";

[1]: https://patchwork.ozlabs.org/patch/839352/
[2]: https://patchwork.ozlabs.org/patch/843576/Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1513881187-3197-3-git-send-email-david@lechnology.com

This adds a vendor prefix "vot" for Vision Optical Technology Co., Ltd.
They make LCD displays.
Signed-off-by: David Lechner <david@lechnology.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1513881187-3197-2-git-send-email-david@lechnology.com

Now that memset32 is available, the open-coded pagetable initialization
loop can be replaced.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>