In order to have any realistic chance of calculating proper
ACR values, we need to be able to calculate both N and CTS,
not just CTS. We still aim for the ideal N as specified in
the HDMI spec though.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69675Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The values were taken from the HDMI spec, but they assumed
exact x/1.001 clocks. Since we round the clocks, we also need
to calculate different N and CTS values.

Note that the N for 25.2/1.001 MHz at 44.1 kHz audio is out of
spec. Hopefully this mode is rarely used and/or HDMI sinks
tolerate overly large values of N.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69675Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Audio is enabled by default now.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

This adds the pci ids for hawaii.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Fill in gpu details for hawaii.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Uses the same code as bonaire.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

This updates atombios.h with the latest changes
required for hawaii.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Set the PA_SC_RASTER_CONFIG[_1] registers for hawaii.
The rest is the same as the other asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

This updates the CI dpm (dynamic power management)
support for hawaii.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Has same version of UVD as other CIK parts.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

This just updates the firmware loading functions
to look for the appropriate firmware files for
hawaii.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The formula needs to be adjusted since there are 4 RBs
per SH rather than 2 as on previous asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The golden register settings are optimal settings for
certain registers from the hardware team.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Hawaii uses a different tiling configuration.  Add support
for it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Skip programming a register that was removed and
adjust the mask of the VM client status.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

This adds the hawaii asic specific configuration
details.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Hawaii is a new CI-based dGPU.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Spotted by Brad Smith when porting to OpenBSD.
Noticed-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The new HDP flush method doesn't seem to work reliably on
sDMA either, so use the old method here too.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

To plug the VRAM memory leak (see previous patch for
details) we must unpin the frame buffer when disabling the
CRTC. This warrants the addition of disable function for legacy
CRTC, which puts the CRTC in DPMS-OFF state and unpins the
frame buffer if there is one associated with the CRTC.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

When drm_helper_disable_unused_functions calls disable
function of the CRTC, it also sets the crtc->fb pointer
to NULL. This can later (when the mode on that CRTC is setup
again from user space) cause ***_do_set_base functions to
"think" that there is no old buffer and skip the unpinning
code. Consequently, the buffer that has been NULL-ified in
drm_helper_disable_unused_functions will never be unpinned
causing a leak in VRAM.

This patch plugs the leak by unpinning the frame buffer
in crtc_disable function.
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

The current code writing SADs to the audio registers seems to assume
that there is at most a single SAD per audio format.

However, that is not the case. Especially for PCM it is somewhat common
for sinks to have two SADs, one for 8-channel and one for 2-channel
audio, which may have different supported sample rates (i.e. the sink
supports stereo audio at higher sample rates than multichannel audio).

Because of this, only the 2-channel SAD may be used if it appears before
the 8-channel SAD. Unless other SADs require otherwise, this may cause
the ALSA HDA driver to allow stereo playback only.

Fix the code to pick the PCM SAD with the highest number of channels,
while merging the rate masks of PCM SADs with lower amount of channels
into the additional stereo rate mask byte.

Technically there are even more cases to handle (multiple non-PCM SADs
of the same type, more than two PCM SADs with varying channel counts,
etc), but those have not actually been encountered in the field and
handling them would be non-trivial.

Example affected EDID from Onkyo TX-SR674 specifying 192kHz stereo
support and 96kHz 8-channel support (and other 8-channel compressed
formats):
00ffffffffffff003dcb010000000001
ffff0103800000780a0dc9a057479827
12484c00000001010101010101010101
010101010101011d8018711c1620582c
2500c48e2100009e011d007251d01e20
6e285500c48e2100001e000000fc0054
582d53523637342020202020000000fd
00313d0f2e08000a202020202020019b
02032f724f8504030f0e07069413121e
1d1615012f097f070f1f071707503707
503f07c0834f000066030c00ffff808c
0ad08a20e02d10103e9600c48e210000
18011d80d0721c1620102c2580c48e21
00009e011d00bc52d01e20b8285540c4
8e2100001e8c0ad090204031200c4055
00c48e210000180000000000000000a8
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Tested-by: Andre Heider <a.heider@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Merge tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

Bit a bit -fixes pull request in the merge window than usual dua to two
feauture-y things:
- Display CRCs are now enabled on all platforms, including the odd DP case
  on gm45/vlv. Since this is a testing-only feature it should ever hurt,
  but I figured it'll help with regression-testing -fixes. So I left it
  in and didn't postpone it to 3.14.
- Display power well refactoring from Imre. Would have caused major pain
  conflict with the bdw stage 1 patches if I'd postpone this to -next.
  It's only an relatively small interface rework, so shouldn't cause pain.
  It's also been in my tree since almost 3 weeks already.

That accounts for about two thirds of the pull, otherwise just bugfixes:
- vlv backlight fix from Jesse/Jani
- vlv vblank timestamp fix from Jesse
- improved edp detection through vbt from Ville (fixes a vlv issue)
- eDP vdd fix from Paulo
- fixes for dvo lvds on i830M
- a few smaller things all over

Note: This contains a backmerge of v3.12. Since the -internal branch
always applied on top of -nightly I need that unified base to merge bdw
patches. So you'll get a conflict with radeon connector props when pulling
this (and nouveau/master will also conflict a bit when Ben doesn't
rebase). The backmerge itself only had conflicts in drm/i915.

There's also a tiny conflict between Jani's backlight fix and your sysfs
lifetime fix in drm-next.

* tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel: (940 commits)
  drm/i915/vlv: use per-pipe backlight controls v2
  drm/i915: make backlight functions take a connector
  drm/i915: move opregion asle request handling to a work queue
  drm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV
  drm/i915: Make intel_dp_is_edp() less specific
  drm/i915: Give names to the VBT child device type bits
  drm/i915/vlv: enable HDA display audio for Valleyview2
  drm/i915/dvo: call ->mode_set callback only when the port is running
  drm/i915: avoid unclaimed registers when capturing the error state
  drm/i915: Enable DP port CRC for the "auto" source on g4x/vlv
  drm/i915: scramble reset support for DP port CRC on vlv
  drm/i915: scramble reset support for DP port CRC on g4x
  drm/i916: add "auto" pipe CRC source
  ...

Conflicts:
	MAINTAINERS
	drivers/gpu/drm/i915/intel_panel.c
	drivers/gpu/drm/nouveau/core/subdev/mc/base.c
	drivers/gpu/drm/radeon/atombios_encoders.c
	drivers/gpu/drm/radeon/radeon_connectors.c

Though I'm not really happy with how ugly this code is now.
Signed-off-by: Dave Airlie <airlied@redhat.com>

The present code assumes that optimus is present whenever two
VGA (PCI_CLASS_DISPLAY_VGA) devices are present. This does not
seem to be the case of newer laptops with optimus, in which
case the nvidia gpu is a PCI_CLASS_DISPLAY_3D device.

Rework the logic so that we count both VGA and 3D devices,
when contemplating if optimus is present on the platform.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70208Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

- Ilia's PMPEG improvements
- MSI fixes, and another attempt at enabling by default
- Initial GK208 support, just modesetting
- "Old" PM code gone, new infrastructure and various different stages of support (depending which chipset / ram type etc) is in its place.  This includes support that goes beyond what the previous code was capable of.  User control has been deliberately sabotaged, it's not safe to use still.
- Thermal management / fan control that's been present for a while is turned ON by default now.
- Misc other fixes that have accumulated

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (74 commits)
  drm/nouveau/fb: implement various bits of work towards memory reclocking
  drm/nouveau: implement a simple sysfs interface to new pm code
  drm/nouveau/device: initial control object class, with pstate control methods
  drm/nouveau/clk: implement power state and engine clock control in core
  drm/nouveau/volt: implement voltage control in core
  drm/nouveau/bios: parsing for various tables required for power management
  drm/nouveau/perfmon: initial infrastructure to expose performance counters
  drm/nouveau/bus: add interfaces/helpers for sequencer
  drm/nouveau/bus: make external class definitions pointers
  drm/nouveau/pwr: initial implementation
  drm/nouveau/therm: update target fanspeed outside of therm lock
  drm/nouveau/therm: automatic mode by default
  drm/nouveau/therm: no toggle fan control either if we can't guarantee no pwm connected
  drm/nvc0/therm: allow fan control if we've killed the vbios ppwr ucode
  drm/nouveau/therm: if no bios trip/linear info, default to perf-suggested speed
  drm/nouveau/therm: add hook for clk to suggest fanspeed to therm
  drm/nouveau/pwr: assign a subdev id for upcoming implementation
  drm/nouveau/gpio: return different error code for not found vs invalid
  drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERM
  drm/nouveau/core: make all info-level messages silent for runtime pm
  ...

This isn't useful anymore.
Signed-off-by: Dave Airlie <airlied@redhat.com>

Not even remotely ready for the vast majority of the world.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

User control of this has been hard-coded as disabled for now.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Internal use only at this point.  Userspace later.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>