- 23 May, 2016 4 commits
-
-
Dave Airlie authored
The tiled 5K Dell monitor appears to be hiding it's tiled mode inside the displayid timings block, this patch parses this blocks and adds the modes to the modelist. v1.1: add missing __packed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95207Signed-off-by:
Dave Airlie <airlied@redhat.com>
-
Dave Airlie authored
We need to use this for validating modeline additions. Signed-off-by: -
Tomas Bzatek authored
This will iterate over all DisplayID blocks found in the buffer. Previously only the first block was parsed. https://bugs.freedesktop.org/show_bug.cgi?id=95207Signed-off-by:
Tomas Bzatek <tomas@bzatek.net> Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
-
Dave Airlie authored
This just makes the code easier to follow. Reviewed-by:
-
- 20 May, 2016 36 commits
-
-
Daniel Vetter authored
This was added in commit 0a3e67a4 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Sep 30 12:14:26 2008 -0700 drm: Rework vblank-wait handling to allow interrupt reduction. to stay backwards-compatible with old UMS code that didn't even tell the kernel when it did a modeset, so that the kernel could save/restore vblank counters. At worst this means vblanks will be somewhat funky on a setup that very likely no one still runs. So let's just nuke it. Plan B would be to set it unconditionally in drm_vblank_init for kms drivers, instead of in each driver separately. So if this patch breaks anything please only restore the hunks in drmP.h and drm_irq.c, plus add a check for DRIVER_MODESET in drm_vblank_init. Stumbled over this in a discussion on irc with Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Liviu Dudau <Liviu.Dudau@arm.com> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by:
-
git://people.freedesktop.org/~thomash/linuxDave Airlie authored
Pull request of 2016-05-20 * tag 'vmwgfx-next-160520' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Report vmwgfx version to vmware.log drm/vmwgfx: Add VMWare host messaging capability drm/vmwgfx: Kill some lockdep warnings
-
git://github.com/skeggsb/linuxDave Airlie authored
Nothing too exciting here, there's a larger chunk of work that still needs more testing but not likely to get that done today - so - here's the rest of it. Assuming nothing else goes horribly wrong, I should be able to send the rest Monday if it isn't too late.... Changes: - Improvements to power sensor support - Initial attempt at GM108 support - Minor fixes to GR init + ucode - Make use of topology information (provided by the GPU) in various places, should at least fix some fault recovery issues and engine/runlist mapping confusion on newer GPUs. * 'linux-4.7' of git://github.com/skeggsb/linux: (51 commits) drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode drm/nouveau/core: recognise GM108 chipsets drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup drm/nouveau/gr/gk104-: share implementation of ppc exception init drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx drm/nouveau/bios/pll: check BIT table version before trying to parse it drm/nouveau/bios/pll: prevent oops when limits table can't be parsed drm/nouveau/volt/gk104: round up in gk104_volt_set drm/nouveau/fb/gm200: setup mmu debug buffer registers at init() drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init() drm/nouveau/fb/gf100-: allocate mmu debug buffers drm/nouveau/fb: allow chipset-specific actions for oneinit() drm/nouveau/gr/gm200-: fix bad hardcoding of a max-tpcs-per-gpc value drm/nouveau/gr/gm200-: rop count == ltc count drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fb drm/nouveau/gr/gm200: move some code into init_gpc_mmu() hook drm/nouveau/gr/gm200: make generate_main() static drm/nouveau/gr/gf100-: abstract fetching rop count drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offset drm/nouveau/gr/gf100-: remove hardcoded idle_timeout values ...
-
Sinclair Yeh authored
When tracking down a customer issue, it is useful to know exactly which version of the vmwgfx they are using. Since vmware.log is often the only available debug log, report vmwgfx version in there. Signed-off-by:
Sinclair Yeh <syeh@vmware.com> Signed-off-by:
Thomas Hellstrom <thellstrom@vmware.com>
-
Sinclair Yeh authored
This patch adds capabilities for a VMWare guest to send and receive messages from the host, and adds functions to sending log messages to vmware.log and to request device settings that aren't available through the virtual hardware, e.g. certain settings in the VMX file. Signed-off-by:
-
Thomas Hellstrom authored
Some global KMS state that is elsewhere protected by the mode_config mutex here needs to be protected with a local mutex. Remove corresponding lockdep checks and introduce a new driver-private global_kms_state_mutex, and make sure its locking order is *after* the crtc locks in order to avoid having to release those when the new mutex is taken. Signed-off-by:
Brian Paul <brianp@vmware.com> Reviewed-by:
-
Ben Skeggs authored
This is a simplied version of the fix by Roy in fdo#93629. While this doesn't appear to fix the issues for the users in that report, it's a real issue that deserves to be resolved. Reported-by:
Roy Spliet <rspliet@eclipso.eu> Signed-off-by:
Ben Skeggs <bskeggs@redhat.com>
-
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Also removes an XXX; according to nvgpu headers the field is called NV_PGRAPH_GPCS_SWDX_TC_BETA_CB_SIZE_DIV3, so, apparently not some magic we need to figure out :) Signed-off-by: -
Ben Skeggs authored
This was really inconsistent, some implementations could touch PPCs that didn't exist, others neglected to touch ones that did. Signed-off-by: -
Ben Skeggs authored
Matches newer RM. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Karol Herbst authored
We always want a equal or higher voltage than the requested ones, otherwise nouveau undervolts. Signed-off-by:
Karol Herbst <nouveau@karolherbst.de> Signed-off-by:
-
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
These are specified by PTOP on Maxwell GPUs. Signed-off-by: -
Ben Skeggs authored
It appears these don't map to PBDMAs (at least on Kepler, it may or may be valid for Fermi - this hasn't been checked), but to runlists. This drops the NVKM_ENGINE_FIFO data from the entries too, as resetting all of PFIFO is *not* the way to handle such faults. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
These are now specified directly in the MC subdev. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by:
-
