1. 07 Jun, 2016 5 commits
  2. 06 Jun, 2016 3 commits
  3. 05 Jun, 2016 1 commit
  4. 02 Jun, 2016 3 commits
  5. 01 Jun, 2016 8 commits
    • Dave Airlie's avatar
      Merge branch 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel into drm-next · 66fd7a66
      Dave Airlie authored
      drm-intel-next-2016-05-22:
      - cmd-parser support for direct reg->reg loads (Ken Graunke)
      - better handle DP++ smart dongles (Ville)
      - bxt guc fw loading support (Nick Hoathe)
      - remove a bunch of struct typedefs from dpll code (Ander)
      - tons of small work all over to avoid casting between drm_device and the i915
        dev struct (Tvrtko&Chris)
      - untangle request retiring from other operations, also fixes reset stat corner
        cases (Chris)
      - skl atomic watermark support from Matt Roper, yay!
      - various wm handling bugfixes from Ville
      - big pile of cdclck rework for bxt/skl (Ville)
      - CABC (Content Adaptive Brigthness Control) for dsi panels (Jani&Deepak M)
      - nonblocking atomic commits for plane-only updates (Maarten Lankhorst)
      - bunch of PSR fixes&improvements
      - untangle our map/pin/sg_iter code a bit (Dave Gordon)
      drm-intel-next-2016-05-08:
      - refactor stolen quirks to share code between early quirks and i915 (Joonas)
      - refactor gem BO/vma funcstion (Tvrtko&Dave)
      - backlight over DPCD support (Yetunde Abedisi)
      - more dsi panel sequence support (Jani)
      - lots of refactoring around handling iomaps, vma, ring access and related
        topics culmulating in removing the duplicated request tracking in the execlist
        code (Chris & Tvrtko) includes a small patch for core iomapping code
      - hw state readout for bxt dsi (Ramalingam C)
      - cdclk cleanups (Ville)
      - dedupe chv pll code a bit (Ander)
      - enable semaphores on gen8+ for legacy submission, to be able to have a direct
        comparison against execlist on the same platform (Chris) Not meant to be used
        for anything else but performance tuning
      - lvds border bit hw state checker fix (Jani)
      - rpm vs. shrinker/oom-notifier fixes (Praveen Paneri)
      - l3 tuning (Imre)
      - revert mst dp audio, it's totally non-functional and crash-y (Lyude)
      - first official dmc for kbl (Rodrigo)
      - and tons of small things all over as usual
      
      * 'drm-intel-next' of git://anongit.freedesktop.org/drm-intel: (194 commits)
        drm/i915: Revert async unpin and nonblocking atomic commit
        drm/i915: Update DRIVER_DATE to 20160522
        drm/i915: Inline sg_next() for the optimised SGL iterator
        drm/i915: Introduce & use new lightweight SGL iterators
        drm/i915: optimise i915_gem_object_map() for small objects
        drm/i915: refactor i915_gem_object_pin_map()
        drm/i915/psr: Implement PSR2 w/a for gen9
        drm/i915/psr: Use ->get_aux_send_ctl functions
        drm/i915/psr: Order DP aux transactions correctly
        drm/i915/psr: Make idle_frames sensible again
        drm/i915/psr: Try to program link training times correctly
        drm/i915/userptr: Convert to drm_i915_private
        drm/i915: Allow nonblocking update of pageflips.
        drm/i915: Check for unpin correctness.
        Reapply "drm/i915: Avoid stalling on pending flips for legacy cursor updates"
        drm/i915: Make unpin async.
        drm/i915: Prepare connectors for nonblocking checks.
        drm/i915: Pass atomic states to fbc update functions.
        drm/i915: Remove reset_counter from intel_crtc.
        drm/i915: Remove queue_flip pointer.
        ...
      66fd7a66
    • Dave Airlie's avatar
      Merge tag 'topic/drm-misc-2016-06-01' of git://anongit.freedesktop.org/drm-intel into drm-next · 65439b68
      Dave Airlie authored
      Frist -misc pull for 4.8, with pretty much just random all over plus a few
      more lockless gem BO patches acked/reviewed by driver maintainers.
      
      I'm starting a bit earlier this time around because there's a few invasive
      patch series to land (nonblocking atomic prep work, fence prep work,
      rst/sphinx kerneldoc finally happening) and I need a baseline with all the
      branches merged.
      
      * tag 'topic/drm-misc-2016-06-01' of git://anongit.freedesktop.org/drm-intel: (21 commits)
        drm/vc4: Use lockless gem BO free callback
        drm/vc4: Use drm_gem_object_unreference_unlocked
        drm: Initialize a linear gamma table by default
        drm/vgem: Use lockless gem BO free callback
        drm/qxl: Don't set a gamma table size
        drm/msm: Nuke dummy gamma_set/get functions
        drm/cirrus: Drop redundnant gamma size check
        drm/fb-helper: Remove dead code in setcolreg
        drm/mediatek: Use lockless gem BO free callback
        drm/hisilicon: Use lockless gem BO free callback
        drm/hlcd: Use lockless gem BO free callback
        vga_switcheroo: Support deferred probing of audio clients
        vga_switcheroo: Add helper for deferred probing
        virtio-gpu: fix output lookup
        drm/doc: Unify KMS Locking docs
        drm/atomic-helper: Do not call ->mode_fixup for CRTC which will be disabled
        Fix annoyingly awkward typo in drm_edid_load.c
        drm/doc: Drop vblank_disable_allow wording
        drm: use seqlock for vblank time/count
        drm/mm: avoid possible null pointer dereference
        ...
      65439b68
    • Kumar, Mahesh's avatar
      drm/i915/skl+: Use scaling amount for plane data rate calculation (v4) · 8d19d7d9
      Kumar, Mahesh authored
      if downscaling is enabled plane data rate increases according to scaling
      amount. take scaling amount under consideration while calculating plane
      data rate
      
      v2: Address Matt's comments, where data rate was overridden because of
      missing else.
      
      v3 (by Matt):
       - Add braces to 'else' branch to match kernel coding style
       - Adjust final calculation now that skl_plane_downscale_amount()
         returns 16.16 fixed point value instead of a decimal fixed point
      
      v4 (by Matt):
       - Avoid integer overflow by making sure final multiplication is
         treated as 64-bit.
      
      Cc: matthew.d.roper@intel.com
      Signed-off-by: default avatarKumar, Mahesh <mahesh1.kumar@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarKumar Mahesh <mahesh1.kumar@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1463695381-21368-1-git-send-email-matthew.d.roper@intel.com
      8d19d7d9
    • Kumar, Mahesh's avatar
      drm/i915/skl+: calculate plane pixel rate (v4) · 9c2f7a9d
      Kumar, Mahesh authored
      Don't use pipe pixel rate for plane pixel rate. Calculate plane pixel according
      to formula
      
      adjusted plane_pixel_rate = adjusted pipe_pixel_rate * downscale ammount
      
      downscale amount = max[1, src_h/dst_h] * max[1, src_w/dst_w]
      if 90/270 rotation use rotated width & height
      
      v2: use intel_plane_state->visible instead of (fb == NULL) as per Matt's
          comment.
      
      v3 (by Matt):
       - Keep downscale amount in 16.16 fixed point rather than converting to
         decimal fixed point.
       - Store adjusted plane pixel rate in plane state instead of the plane
         parameters structure that we no longer use.
      
      v4 (by Matt):
       - Significant rebasing onto latest atomic watermark work
       - Don't bother storing plane pixel rate in state; just calculate it
         right before the calls that make use of it.
       - Fix downscale calculations to actually use width values when
         computing downscale_w rather than copy/pasted height values.
      
      Cc: matthew.d.roper@intel.com
      Signed-off-by: default avatarKumar, Mahesh <mahesh1.kumar@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarKumar Mahesh <mahesh1.kumar@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1463439121-28974-4-git-send-email-matthew.d.roper@intel.com
      9c2f7a9d
    • Kumar, Mahesh's avatar
      drm/i915/skl+: calculate ddb minimum allocation (v6) · cbcfd14b
      Kumar, Mahesh authored
      don't always use 8 ddb as minimum, instead calculate using proper
      algorithm.
      
      v2: optimizations as per Matt's comments.
      
      v3 (by Matt):
       - Fix boolean logic for !fb test in skl_ddb_min_alloc()
       - Adjust negative tiling format comparisons in skl_ddb_min_alloc() to
         improve readability.
      
      v4 (by Matt):
       - Rebase onto recent atomic watermark changes
       - Slight tweaks to code flow to make the logic more closely match the
         description in the bspec.
      
      v5 (by Matt):
       - Handle minimum scanline calculation properly for 4 & 8 bpp formats.
         8bpp isn't actually possible right now, but it's listed in the bspec
         so I've included it here for forward compatibility (similar to how
         we have logic for NV12).
      
      v6 (by Matt):
       - Calculate plane_bpp correctly for non-NV12 formats. (Mahesh)
      
      Cc: matthew.d.roper@intel.com
      Signed-off-by: default avatarKumar, Mahesh <mahesh1.kumar@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarKumar Mahesh <mahesh1.kumar@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1464713939-10440-1-git-send-email-matthew.d.roper@intel.com
      cbcfd14b
    • Matt Roper's avatar
      drm/i915: Don't try to calculate relative data rates during hw readout · edd4156f
      Matt Roper authored
      We don't actually read out full plane state during driver startup (only
      whether the primary plane is enabled/disabled), so all of the src/dest
      rectangles are invalid at this point.  However this calculation was
      needless anyway since we re-calculate them from scratch on the very
      first atomic transaction after boot anyway.
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarKumar Mahesh <mahesh1.kumar@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1463439121-28974-2-git-send-email-matthew.d.roper@intel.com
      edd4156f
    • Chris Wilson's avatar
      drm/i915: Only ignore eDP ports that are connected · 457c52d8
      Chris Wilson authored
      If the VBT says that a certain port should be eDP (and hence fused off
      from HDMI), but in reality it isn't, we need to try and acquire the HDMI
      connection instead. So only trust the VBT edp setting if we can connect
      to an eDP device on that port.
      
      Fixes: d2182a66 (drm/i915: Don't register HDMI connectors for eDP ports on VLV/CHV)
      References: https://bugs.freedesktop.org/show_bug.cgi?id=96288Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Tested-by: default avatarPhidias Chiang <phidias.chiang@canonical.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1464766070-31623-1-git-send-email-chris@chris-wilson.co.uk
      457c52d8
    • Daniel Vetter's avatar
      drm/i915: Revert async unpin and nonblocking atomic commit · e42aeef1
      Daniel Vetter authored
      This reverts the following patches:
      
      d55dbd06 drm/i915: Allow nonblocking update of pageflips.
      15c86bdb drm/i915: Check for unpin correctness.
      95c2ccdc Reapply "drm/i915: Avoid stalling on pending flips for legacy cursor updates"
      a6747b73 drm/i915: Make unpin async.
      03f476e1 drm/i915: Prepare connectors for nonblocking checks.
      2099deff drm/i915: Pass atomic states to fbc update functions.
      ee7171af drm/i915: Remove reset_counter from intel_crtc.
      2ee004f7 drm/i915: Remove queue_flip pointer.
      b8d2afae drm/i915: Remove use_mmio_flip kernel parameter.
      8dd634d9 drm/i915: Remove cs based page flip support.
      143f73b3 drm/i915: Rework intel_crtc_page_flip to be almost atomic, v3.
      84fc494b drm/i915: Add the exclusive fence to plane_state.
      6885843a drm/i915: Convert flip_work to a list.
      aa420ddd drm/i915: Allow mmio updates on all platforms, v2.
      afee4d87 Revert "drm/i915: Avoid stalling on pending flips for legacy cursor updates"
      
      "drm/i915: Allow nonblocking update of pageflips" should have been
      split up, misses a proper commit message and seems to cause issues in
      the legacy page_flip path as demonstrated by kms_flip.
      
      "drm/i915: Make unpin async" doesn't handle the unthrottled cursor
      updates correctly, leading to an apparent pin count leak. This is
      caught by the WARN_ON in i915_gem_object_do_pin which screams if we
      have more than DRM_I915_GEM_OBJECT_MAX_PIN_COUNT pins.
      
      Unfortuantely we can't just revert these two because this patch series
      came with a built-in bisect breakage in the form of temporarily
      removing the unthrottled cursor update hack for legacy cursor ioctl.
      Therefore there's no other option than to revert the entire pile :(
      
      There's one tiny conflict in intel_drv.h due to other patches, nothing
      serious.
      
      Normally I'd wait a bit longer with doing a maintainer revert, but
      since the minimal set of patches we need to revert (due to the bisect
      breakage) is so big, time is running out fast. And very soon
      (especially after a few attempts at fixing issues) it'll be really
      hard to revert things cleanly.
      
      Lessons learned:
      - Not a good idea to rush the review (done by someone fairly new to
        the area) and not make sure domain experts had a chance to read it.
      
      - Patches should be properly split up. I only looked at the two
        patches that should be reverted in detail, but both look like the
        mix up different things in one patch.
      
      - Patches really should have proper commit messages. Especially when
        doing more than one thing, and especially when touching critical and
        tricky core code.
      
      - Building a patch series and r-b stamping it when it has a built-in
        bisect breakage is not a good idea.
      
      - I also think we need to stop building up technical debt by
        postponing atomic igt testcases even longer. I think it's clear that
        there's enough corner cases in this beast that we really need to
        have the testcases _before_ the next step lands.
      
      (cherry picked from commit 5a21b665
      from drm-intel-next-queeud)
      
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
      Cc: John Harrison <John.C.Harrison@Intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Acked-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Acked-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Acked-by: default avatarDave Airlie <airlied@redhat.com>
      Acked-by: default avatarJani Nikula <jani.nikula@linux.intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
      e42aeef1
  6. 31 May, 2016 15 commits
  7. 30 May, 2016 5 commits