- 28 Mar, 2019 21 commits
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Reviewed-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Nikola Cornij authored
pass SDP splitting when setting stream attributes for future use Signed-off-by:
Nikola Cornij <nikola.cornij@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Eryk Brol authored
Create dccg_init and init_clocks for future use Signed-off-by:
Eryk Brol <eryk.brol@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Fatemeh Darbehani authored
[Why] set_display_requirement, dcn1_pplib_apply_display_requirements are no longer used and should be removed. Signed-off-by:
Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by:
Hersen Wu <hersenxs.wu@amd.com> Acked-by:
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Harry Wentland authored
[WHY] The resource constructor currently needs num_virtual_links from init_data but will need access to other items provided by DM. [HOW] Pass init_data into DCN create_resource_pool functions. Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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Hugo Hu authored
[Why] When you have a SST branch device the driver, Even no sink device connected, it also send HPD with a valid EDID. Driver will config it to DP sink. Therefore, there're two displays in display setting. DPCD 0x05, DFP_PRESENT = 1 (branch device), DFP_TYPE = 00 (Display Port) [How] Driver determine DPCD 0x05 DFP_PRESENT = 1(branch) as an active dongle And check DFP count. Signed-off-by:
Hugo Hu <hugo.hu@amd.com> Reviewed-by:
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hersen wu authored
program default output gamma if no user specific gamma parameters passed. Signed-off-by:
Sun peng Li <Sunpeng.Li@amd.com> Acked-by:
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Jun Lei authored
[why] existing logic finds "first free pipe from 5 -> 0" to split this will cause certain sequences to require DC to move an MPCC from one tree to another, which is unsupported this leads to blackscreen to mitigate this problem, we will always try to acquire the "preferred" pipe, and each pipe has a unique preferred pipe this means we avoid most of the scenarios where pipe splitting leads to moving MPCC from one tree to another Signed-off-by:
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Christian König authored
Instead of skipping the root PD while processing the relocated list just never put it on the list in the first place. This avoids walking the list all together when the root PD is the only entry and so also avoids trying to submit a zero sized IB to the SDMA. Signed-off-by:
Christian König <christian.koenig@amd.com> Tested-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Christian König authored
It is redundant with the job pointer. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Christian König authored
Clean that up further and also fix another case where the BO wasn't kmapped for CPU based updates. Signed-off-by:
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shaoyunl authored
Driver vote low to high pstate switch whenever there is an outstanding XGMI mapping request. Driver vote high to low pstate when all the outstanding XGMI mapping is terminated. Signed-off-by:
shaoyunl <shaoyun.liu@amd.com> Reviewed-by:
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Christian König authored
And remove the existing code when it is unused. Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
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Evan Quan authored
As the cleanup jobs performed in pre_fini may still need these buffers. NULL pointer dereference will be triggered without them. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Evan Quan authored
Large piece of codes share one error prompt. That is not friendly for debugging. Signed-off-by:
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Evan Quan authored
The error return value should be correctly reflected. Signed-off-by:
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Evan Quan authored
"error" was not correctly spelled. Signed-off-by:
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xinhui pan authored
there is ras_control node which can do its job. Signed-off-by:
xinhui pan <xinhui.pan@amd.com> Reviewed-by:
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xinhui pan authored
Add helpes to transalte the two enums. And it will catch bugs easily. Signed-off-by:
Nathan Chancellor <natechancellor@gmail.com> Reviewed-by:
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xinhui pan authored
better to use macro. Signed-off-by:
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xinhui pan authored
ras context might be NULL, so move con->h_data after check !con also fix sizeof wrong type while at it. Signed-off-by:
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- 21 Mar, 2019 19 commits
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Dan Carpenter authored
We already unlocked a few lines earlier so this code unlocks twice on the success path. Fixes: 289921b0 ("drm/amd/powerplay: implement sysfs of pp_table for smu11 (v2)") Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
Kevin Wang <kevin1.wang@amd.com> Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Dan Carpenter authored
The > should be >= so that we don't read one element beyond the end of the vega20_message_map[] array. Fixes: 78031c2c ("drm/amd/powerplay: implement smu vega20_message_map for vega20") Reviewed-by:
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Dan Carpenter authored
The "size" variable is unsigned. We never pass invalid sizes to this function and we already used it as an array offset earlier so it's too late to check here. Reviewed-by:
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Alex Deucher authored
Leads to an undefined symbol otherwise. Reviewed-by:
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Christian König authored
This reverts commit 9b638f97. Adding this to the mapping is complete nonsense and the whole implementation looks racy. This patch wasn't thoughtfully reviewed and should be reverted for now. Signed-off-by:
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Christian König authored
And remove the existing code when it is unused. Signed-off-by:
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Christian König authored
And remove the existing code when it is unused. Signed-off-by:
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Christian König authored
Separate out all functions for SDMA and CPU based page table updates into separate backends. This way we can keep most of the complexity of those from the core VM code. Signed-off-by:
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Christian König authored
Allocating 16KB was way to much, just use 2KB as a start for now. Signed-off-by:
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Christian König authored
Move the update parameter into the VM header and rename them. Signed-off-by:
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Christian König authored
Clean that up a bit and allow to always have the DMA addresses around. Signed-off-by:
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Christian König authored
Not needed any more. Signed-off-by:
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Huang Rui authored
RLC #53815 ucode has the noise issue on 4k playback while gfxoff enabled. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Signed-off-by:
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Huang Rui authored
This patch enables gfxoff and stutter mode again, since we take more testing on raven series. For raven2 and picasso, we can enable it directly. And for raven, we need check the RLC/SMC ucode version cannot be less than #531/0x1e45. v2: add smc version checking for raven. Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in pr_warn message; fix it. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Nathan Chancellor authored
When building with -Wsometimes-uninitialized, Clang warns: drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:456:2: warning: variable 'num_of_levels' is used uninitialized whenever '?:' condition is false [-Wsometimes-uninitialized] smu_read_smc_arg(smu, &num_of_levels); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:608:3: note: expanded from macro 'smu_read_smc_arg' ((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:457:7: note: uninitialized use occurs here if (!num_of_levels) { ^~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:456:2: note: remove the '?:' if its condition is always true smu_read_smc_arg(smu, &num_of_levels); ^ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:608:3: note: expanded from macro 'smu_read_smc_arg' ((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0) ^ drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:446:27: note: initialize the variable 'num_of_levels' to silence this warning uint32_t i, num_of_levels, clk; ^ = 0 1 warning generated. The if statement it mentions as potentially problematic is currently always true because the read_smc_arg callback is assigned at the bottom of this file but Clang can't tell that. If the callback were ever to disappear, num_of_levels would never be initialized. Just zero initialize it to ensure that the intent behind this code remains the same. Link: https://github.com/ClangBuiltLinux/linux/issues/425Signed-off-by: -
YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/radeon/radeon_ttm.c: In function 'radeon_move_vram_ram': drivers/gpu/drm/radeon/radeon_ttm.c:254:24: warning: variable 'rdev' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/radeon/radeon_ttm.c: In function 'radeon_move_ram_vram': drivers/gpu/drm/radeon/radeon_ttm.c:301:24: warning: variable 'rdev' set but not used [-Wunused-but-set-variable] It's not used since a987fcaa ("ttm: Make parts of a struct ttm_bo_device global.") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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Nicholas Kazlauskas authored
We want DRM planes to be initialized in the following order: - primary planes - overlay planes - cursor planes to support existing userspace expectations for plane z-ordering. This means that we also need to register CRTCs after all planes have been initialized since overlay planes can be placed on any CRTC. So the only reason why we have the mode_info->planes list is to remember the primary planes for use later when we need to register the CRTC. Overlay planes have no purpose being in this list. DRM will cleanup any planes that we've registered for us, so the only planes that need to be explicitly cleaned up are the ones that have failed to register. By dropping the explicit free on every plane in the mode_info->planes list this patch also fixes a double-free in the case where we fail to initialize only some of the planes. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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David Francis authored
[Why] We need arbitrary read/write over DP AUX DPCD for debugging [How] Three debugfs entries Set the target address by writing to "aux_dpcd_address" (The first four bytes written are used) Set the transaction size in bytes by writing to "aux_dpcd_size" (The first four bytes written are used) Start a transaction by reading/writing "aux_dpcd_data" Do note: there is no concerrency protection at all Accessing these entries in quick succession can lead to strange behaviour Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
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