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  1. 01 Nov, 2018 8 commits
    • Serge Semin's avatar
      ntb: idt: Alter the driver info comments · a662315d
      Serge Semin authored 
      Since IDT PCIe-switch temperature sensor is now always available
irregardless of the EEPROM/BIOS settings, Kconfig and in-code
description should be properly altered. In addition lets update
the driver copyright lines.
Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      a662315d
    • Serge Semin's avatar
      ntb: idt: Discard temperature sensor IRQ handler · b8babacb
      Serge Semin authored 
      IDT PCIe-switch temperature sensor interface is very broken. First
of all only a few combinations of TMPCTL threshold enable bits
really cause the interrupts unmasked. Even if an individual bit
indicates the event unmasked, corresponding IRQ just isn't generated.
Most of the threshold enable bits combinations are in fact useless and
non of them can help to create a fully functional alarm interface.
So to speak, we can't create a well defined hwmon alarms based on
the IDT PCI-switch threshold IRQs.

Secondly a single threshold IRQ (not a combination of thresholds) can
be successfully enabled without the issue described above. But in this
case we experienced an enormous number of interrupts generated by
the chip if the temperature got near the enabled threshold value. Filter
adjustment didn't help much. It also doesn't provide a hysteresis settings.
Due to the temperature sample fluctuations near the threshold the
interrupts spate makes the system nearly unusable until the temperature
value finally settled so being pushed either to be fully higher or lower
the threshold.

All of these issues makes the temperature sensor alarm interface useless
and even at some point dangerous to be used in the driver. In this case
it is safer to completely discard it and disable the temperature alarm
interrupts.
Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      b8babacb
    • Serge Semin's avatar
      ntb: idt: Add basic hwmon sysfs interface · aed1b7b3
      Serge Semin authored 
      IDT PCIe switches provide an embedded temperature sensor working
within [0; 127.5]C with resolution of 0.5C. They also can generate
a PCIe upstream interrupt in case if the temperature passes through
specified thresholds. Since this thresholds interface is very broken
the created hwmon-sysfs interface exposes only the next set of hwmon
nodes: current input temperature, lowest and highest values measured,
history resetting, value offset. HWmon alarm interface isn't provided.

IDT PCIe switch also've got an ADC/filter settings of the sensor.
This driver doesn't expose them to the hwmon-sysfs interface at the
moment, except the offset node.
Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      aed1b7b3
    • Serge Semin's avatar
      ntb: idt: Alter temperature read method · 40070408
      Serge Semin authored 
      In order to create a hwmon interface for the IDT PCIe-switch temperature
sensor the already available reader method should be improved. Particularly
we need to redesign it so one would be able to read temperature/offset
values from registers of the passed types. Since IDT sensor interface
provides temperature in unsigned format 0:7:1 (7 bits for real value
and one for fraction) we also need to have helpers for the typical sysfs
temperature data type conversion to and from this format. Even though
the IDT PCIe-switch provided temperature offset got the same but signed
type it can be translated by these methods too.
Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      40070408
    • Aaron Sierra's avatar
      ntb_netdev: Simplify remove with client device drvdata · 906e86b2
      Aaron Sierra authored 
      Replace the elaborate private structure global linked-list used in
ntb_netdev_probe() and ntb_netdev_remove() by stashing our private
data in the NTB transport client device.
Signed-off-by: default avatarAaron Sierra <asierra@xes-inc.com>
Reviewed-by: default avatarLogan Gunthorpe <logang@deltatee.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      906e86b2
    • Aaron Sierra's avatar
      NTB: transport: Try harder to alloc an aligned MW buffer · fc5d1829
      Aaron Sierra authored 
      Be a little wasteful if the (likely CMA) message window buffer is not
suitably aligned after our first attempt; allocate a buffer twice as big
as we need and manually align our MW buffer within it.

This was needed on Intel Broadwell DE platforms with intel_iommu=off
Signed-off-by: default avatarAaron Sierra <asierra@xes-inc.com>
Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      fc5d1829
    • Gustavo A. R. Silva's avatar
      ntb: ntb_transport: Mark expected switch fall-throughs · 846429bc
      Gustavo A. R. Silva authored 
      In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.

Addresses-Coverity-ID: 1373888 ("Missing break in switch")
Addresses-Coverity-ID: 1373889 ("Missing break in switch")
Signed-off-by: default avatarGustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: default avatarAllen Hubbe <allenbh@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      846429bc
    • Serge Semin's avatar
      ntb: idt: Set PCIe bus address to BARLIMITx · 37a3e969
      Serge Semin authored 
      IDT NTB driver sets the upper limit of actual translation address
being written to the corresponding memory window setup. It is achieved
by BARLIMITx register initialization. Needless to say, that the register
works within PCIe bus address space.

In general CPU and PCIe address spaces are different. It means,
that addresses used for Memory TLPs routine can be different from
CPU addresses. While in most of cases they are the same, there are
exceptions when the proper mapping must be performed to have the
portable driver code. There used to be a virt_to_bus()/bus_to_virt()
interface for this purpose. But it's deprecated now. It was also a
mistake to use pci_resource_start() since the return address of the
method is at the CPU address space. In order to achieve the desired
purpose we need to use pci_bus_address() helper. This method shall
return a PCIe bus base address of the corresponding BAR resource.
Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Acked-by: default avatarAllen Hubbe <allenbh@gmail.com>
Signed-off-by: default avatarJon Mason <jdmason@kudzu.us>
      37a3e969
  3. 31 Oct, 2018 3 commits
  5. 22 Oct, 2018 8 commits
  7. 21 Oct, 2018 3 commits
  9. 20 Oct, 2018 11 commits
  11. 19 Oct, 2018 7 commits
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