1. 17 May, 2010 1 commit
    • Tom Lyon's avatar
      intel-iommu: errors with smaller iommu widths · a99c47a2
      Tom Lyon authored
      When using iommu_domain_alloc with the Intel iommu, the domain address
      width is always initialized to 48 bits (agaw 2).  This domain->agaw value
      is then used by pfn_to_dma_pte to (always) build a 4 level page table.
      However, not all systems support iommu width of 48 or 4 level page tables.
      In particular, the Core i5-660 and i5-670 support an address width of 36
      bits (not 39!), an agaw of only 1, and only 3 level page tables.
      
      This version of the patch simply lops off extra levels of the page tables
      if the agaw value of the iommu is less than what is currently allocated
      for the domain (in intel_iommu_attach_device).  If there were already
      allocated addresses above what the new iommu can handle, EFAULT is
      returned.
      Signed-off-by: default avatarTom Lyon <pugs@cisco.com>
      Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
      a99c47a2
  2. 14 Apr, 2010 1 commit
  3. 09 Apr, 2010 8 commits
  4. 30 Mar, 2010 6 commits
  5. 29 Mar, 2010 24 commits