1. 23 Jan, 2020 1 commit
  2. 21 Jan, 2020 4 commits
  3. 16 Jan, 2020 4 commits
  4. 13 Jan, 2020 4 commits
  5. 11 Jan, 2020 2 commits
  6. 10 Jan, 2020 3 commits
  7. 09 Jan, 2020 1 commit
  8. 08 Jan, 2020 4 commits
    • Quanyang Wang's avatar
      ARM: zynq: use physical cpuid in zynq_slcr_cpu_stop/start · 6c6b3f1f
      Quanyang Wang authored
      When kernel booting, it will create a cpuid map between the logical cpus
      and physical cpus. In a normal boot, the cpuid map is as below:
      
          Physical      Logical
              0    ==>     0
              1    ==>     1
      
      But in kdump, there is a condition that the crash happens at the
      physical cpu1, and the crash kernel will run at the physical cpu1 too,
      so the cpuid map in crash kernel is as below:
      
          Physical      Logical
              1    ==>     0
              0    ==>     1
      
      The functions zynq_slcr_cpu_stop/start is to stop/start the physical
      cpus, the parameter cpu should be the physical cpuid. So use
      cpu_logical_map to translate the logical cpuid to physical cpuid.
      Or else the logical cpu0(physical cpu1) will stop itself and
      the processor will hang.
      Signed-off-by: default avatarQuanyang Wang <quanyang.wang@windriver.com>
      Tested-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      6c6b3f1f
    • Stephen Warren's avatar
      ARM: tegra: Use clk_m CPU on Tegra124 LP1 resume · 9c65b846
      Stephen Warren authored
      Configure the clock controller to set an alternate clock for the CPU
      when it receives an IRQ during LP1 (system suspend). Specifically, use
      clk_m (the crystal) rather than clk_s (a 32KHz clock). Such an IRQ will
      be the LP1 wake event. This reduces the amount of time taken to resume
      from LP1.
      
      NVIDIA's downstream kernel executes this code on both Tegra30 and
      Tegra124, so it appears OK to make this change unconditionally.
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      9c65b846
    • Stephen Warren's avatar
      ARM: tegra: Modify reshift divider during LP1 · cf94a7a0
      Stephen Warren authored
      The reshift hardware module implements the RAM re-repair process. This
      module uses PLLP as an input clock during LP1 resume. The input divider
      for this clock is typically set for PLLP's normal rate. During LP1
      resume, PLLP is bypassed and so runs at the crystal rate, which is much
      slower. Consequently, decrease the divider so that the reshift module
      runs at a reasonable rate during LP1 resume.
      
      NVIDIA's downstream kernel code only does this if not compiled for
      Tegra30, so the added code is made conditional upon the chip ID.
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      cf94a7a0
    • Stephen Warren's avatar
      ARM: tegra: Enable PLLP bypass during Tegra124 LP1 · 1a3388d5
      Stephen Warren authored
      For a little over a year, U-Boot has configured the flow controller to
      perform automatic RAM re-repair on off->on power transitions of the CPU
      rail[1]. This is mandatory for correct operation of Tegra124. However,
      RAM re-repair relies on certain clocks, which the kernel must enable and
      leave running. PLLP is one of those clocks. This clock is shut down
      during LP1 in order to save power. Enable bypass (which I believe routes
      osc_div_clk, essentially the crystal clock, to the PLL output) so that
      this clock signal toggles even though the PLL is not active. This is
      required so that LP1 power mode (system suspend) operates correctly.
      
      The bypass configuration must then be undone when resuming from LP1, so
      that all peripheral clocks run at the expected rate. Without this, many
      peripherals won't work correctly; for example, the UART baud rate would
      be incorrect.
      
      NVIDIA's downstream kernel code only does this if not compiled for
      Tegra30, so the added code is made conditional upon the chip ID.
      NVIDIA's downstream code makes this change conditional upon the active
      CPU cluster. The upstream kernel currently doesn't support cluster
      switching, so this patch doesn't test the active CPU cluster ID.
      
      [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair
      Reported-by: default avatarJonathan Hunter <jonathanh@nvidia.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      1a3388d5
  9. 07 Jan, 2020 3 commits
  10. 27 Dec, 2019 1 commit
  11. 20 Dec, 2019 1 commit
  12. 17 Dec, 2019 5 commits
    • Suman Anna's avatar
      ARM: OMAP2+: use separate IOMMU pdata to fix DRA7 IPU1 boot · 4601832f
      Suman Anna authored
      The IPU1 MMU has been using common IOMMU pdata quirks defined and
      used by all IPU IOMMU devices on OMAP4 and beyond. Separate out the
      pdata for IPU1 MMU with the additional .set_pwrdm_constraint ops
      plugged in, so that the IPU1 power domain can be restricted to ON
      state during the boot and active period of the IPU1 remote processor.
      This eliminates the pre-conditions for the IPU1 boot issue as
      described in commit afe518400bdb ("iommu/omap: fix boot issue on
      remoteprocs with AMMU/Unicache").
      
      NOTE:
      1. RET is not a valid target power domain state on DRA7 platforms,
         and IPU power domain is normally programmed for OFF. The IPU1
         still fails to boot though, and an unclearable l3_noc error is
         thrown currently on 4.14 kernel without this fix. This behavior
         is slightly different from previous 4.9 LTS kernel.
      2. The fix is currently applied only to IPU1 on DRA7xx SoC, as the
         other affected processors on OMAP4/OMAP5/DRA7 are in domains
         that are not entering RET. IPU2 on DRA7 is in CORE power domain
         which is only programmed for ON power state. The fix can be easily
         scaled if these domains do hit RET in the future.
      3. The issue was not seen on current DRA7 platforms if any of the
         DSP remote processors were booted and using one of the GPTimers
         5, 6, 7 or 8 on previous 4.9 LTS kernel. This was due to the
         errata fix for i874 implemented in commit 1cbabcb9 ("ARM:
         DRA7: clockdomain: Implement timer workaround for errata i874")
         which keeps the IPU1 power domain from entering RET when the
         timers are active. But the timer workaround did not make any
         difference on 4.14 kernel, and an l3_noc error was seen still
         without this fix.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      4601832f
    • Tero Kristo's avatar
      ARM: OMAP2+: omap-iommu.c conversion to ti-sysc · 4ea3711a
      Tero Kristo authored
      Convert omap2 iommu platform code to use ti-sysc instead of legacy
      omap-device / hwmod interfaces.
      Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      4ea3711a
    • Suman Anna's avatar
      ARM: OMAP2+: Add workaround for DRA7 DSP MStandby errata i879 · 2f14101a
      Suman Anna authored
      Errata Title:
      i879: DSP MStandby requires CD_EMU in SW_WKUP
      
      Description:
      The DSP requires the internal emulation clock to be actively toggling
      in order to successfully enter a low power mode via execution of the
      IDLE instruction and PRCM MStandby/Idle handshake. This assumes that
      other prerequisites and software sequence are followed.
      
      Workaround:
      The emulation clock to the DSP is free-running anytime CCS is connected
      via JTAG debugger to the DSP subsystem or when the CD_EMU clock domain
      is set in SW_WKUP mode. The CD_EMU domain can be set in SW_WKUP mode
      via the CM_EMU_CLKSTCTRL [1:0]CLKTRCTRL field.
      
      Implementation:
      This patch implements this workaround by denying the HW_AUTO mode
      for the EMU clockdomain during the power-up of any DSP processor
      and re-enabling the HW_AUTO mode during the shutdown of the last
      DSP processor (actually done during the enabling and disabling of
      the respective DSP MDMA MMUs). Reference counting has to be used to
      manage the independent sequencing between the multiple DSP processors.
      
      This switching is done at runtime rather than a static clockdomain
      flags value to meet the target power domain state for the EMU power
      domain during suspend.
      
      Note that the DSP MStandby behavior is not consistent across all
      boards prior to this fix. Please see commit 45f871eec6c0 ("ARM:
      OMAP2+: Extend DRA7 IPU1 MMU pdata quirks to DSP MDMA MMUs") for
      details.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      2f14101a
    • Tero Kristo's avatar
      ARM: OMAP4+: remove pdata quirks for omap4+ iommus · e4c4b540
      Tero Kristo authored
      IOMMU driver will be using ti-sysc bus driver for power management control
      going forward, and the pdata quirks are not needed for anything anymore.
      Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      e4c4b540
    • Tero Kristo's avatar
      ARM: OMAP2+: pdata-quirks: add PRM data for reset support · 8de44fb7
      Tero Kristo authored
      The parent clockdomain for reset must be in force wakeup mode, otherwise
      the reset may never complete. Add pdata quirks for this purpose for PRM
      driver.
      Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
      Acked-by: default avatarTony Lindgren <tony@atomide.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      8de44fb7
  13. 15 Dec, 2019 6 commits
    • Linus Torvalds's avatar
      Linux 5.5-rc2 · d1eef1c6
      Linus Torvalds authored
      d1eef1c6
    • Linus Torvalds's avatar
      Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma · 9603e221
      Linus Torvalds authored
      Pull rdma fixes from Doug Ledford:
       "A small collection of -rc fixes. Mostly. One API addition, but that's
        because we wanted to use it in a fix. There's also a bug fix that is
        going to render the 5.5 kernel's soft-RoCE driver incompatible with
        all soft-RoCE versions prior, but it's required to actually implement
        the protocol according to the RoCE spec and required in order for the
        soft-RoCE driver to be able to successfully work with actual RoCE
        hardware.
      
        Summary:
      
         - Update Steve Wise info
      
         - Fix for soft-RoCE crc calculations (will break back compatibility,
           but only with the soft-RoCE driver, which has had this bug since it
           was introduced and it is an on-the-wire bug, but will make
           soft-RoCE fully compatible with real RoCE hardware)
      
         - cma init fixup
      
         - counters oops fix
      
         - fix for mlx4 init/teardown sequence
      
         - fix for mkx5 steering rules
      
         - introduce a cleanup API, which isn't a fix, but we want to use it
           in the next fix
      
         - fix for mlx5 memory management that uses API in previous patch"
      
      * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
        IB/mlx5: Fix device memory flows
        IB/core: Introduce rdma_user_mmap_entry_insert_range() API
        IB/mlx5: Fix steering rule of drop and count
        IB/mlx4: Follow mirror sequence of device add during device removal
        RDMA/counter: Prevent auto-binding a QP which are not tracked with res
        rxe: correctly calculate iCRC for unaligned payloads
        Update mailmap info for Steve Wise
        RDMA/cma: add missed unregister_pernet_subsys in init failure
      9603e221
    • Linus Torvalds's avatar
      Merge tag 'riscv/for-v5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux · 1522d9da
      Linus Torvalds authored
      Pull RISC-V fixes from Paul Walmsley:
       "Two minor build fixes:
      
         - Fix builds of the ELF loader when built with 'make -j1' (nommu
           only)
      
         - Fix CONFIG_SOC_SIFIVE builds when CONFIG_TTY is disabled (found
           during randconfig testing)"
      
      * tag 'riscv/for-v5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
        riscv: only select serial sifive if TTY is enabled
        riscv: Fix build dependency for loader
      1522d9da
    • Linus Torvalds's avatar
      Merge tag 'for-linus-5.5b-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip · b01d7cb4
      Linus Torvalds authored
      Pull xen fixes from Juergen Gross:
       "Two fixes: one for a resource accounting bug in some configurations
        and a fix for another patch which went into rc1"
      
      * tag 'for-linus-5.5b-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
        xen/balloon: fix ballooned page accounting without hotplug enabled
        xen-blkback: prevent premature module unload
      b01d7cb4
    • Linus Torvalds's avatar
      Merge branch 'remove-ksys-mount-dup' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux · 2e6d3045
      Linus Torvalds authored
      Pull ksys_mount() and ksys_dup() removal from Dominik Brodowski:
       "This small series replaces all in-kernel calls to the
        userspace-focused ksys_mount() and ksys_dup() with calls to
        kernel-centric functions:
      
        For each replacement of ksys_mount() with do_mount(), one needs to
        verify that the first and third parameter (char *dev_name, char *type)
        are strings allocated in kernelspace and that the fifth parameter
        (void *data) is either NULL or refers to a full page (only occurence
        in init/do_mounts.c::do_mount_root()). The second and fourth
        parameters (char *dir_name, unsigned long flags) are passed by
        ksys_mount() to do_mount() unchanged, and therefore do not require
        particular care.
      
        Moreover, instead of pretending to be userspace, the opening of
        /dev/console as stdin/stdout/stderr can be implemented using in-kernel
        functions as well. Thereby, ksys_dup() can be removed for good"
      
      [ This doesn't get rid of the special "kernel init runs with KERNEL_DS"
        case, but it at least removes _some_ of the users of "treat kernel
        pointers as user pointers for our magical init sequence".
      
        One day we'll hopefully be rid of it all, and can initialize our
        init_thread addr_limit to USER_DS.    - Linus ]
      
      * 'remove-ksys-mount-dup' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux:
        fs: remove ksys_dup()
        init: unify opening /dev/console as stdin/stdout/stderr
        init: use do_mount() instead of ksys_mount()
        initrd: use do_mount() instead of ksys_mount()
        devtmpfs: use do_mount() instead of ksys_mount()
      2e6d3045
    • Linus Torvalds's avatar
      Merge tag 'Wimplicit-fallthrough-5.5-rc2' of... · 510c9788
      Linus Torvalds authored
      Merge tag 'Wimplicit-fallthrough-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux
      
      Pull fall through fix from Gustavo Silva:
       "Fix compile error on sh by marking expected switch fall-through"
      
      * tag 'Wimplicit-fallthrough-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux:
        sh: kgdb: Mark expected switch fall-throughs
      510c9788
  14. 14 Dec, 2019 1 commit
    • Linus Torvalds's avatar
      Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi · 07c4b9e9
      Linus Torvalds authored
      Pull SCSI fixes from James Bottomley:
       "24 fixes, all in drivers. The lion's share (16) are qla2xxx and the
        rest are iscsi (3), ufs (2), smarpqi, lpfc and libsas"
      
      * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (24 commits)
        scsi: iscsi: Avoid potential deadlock in iscsi_if_rx func
        scsi: iscsi: Fix a potential deadlock in the timeout handler
        scsi: smartpqi: Update attribute name to `driver_version`
        scsi: libsas: stop discovering if oob mode is disconnected
        scsi: ufs: Disable autohibern8 feature in Cadence UFS
        scsi: iscsi: qla4xxx: fix double free in probe
        scsi: ufs: Give an unique ID to each ufs-bsg
        scsi: qla2xxx: Add debug dump of LOGO payload and ELS IOCB
        scsi: qla2xxx: Ignore PORT UPDATE after N2N PLOGI
        scsi: qla2xxx: Don't defer relogin unconditonally
        scsi: qla2xxx: Send Notify ACK after N2N PLOGI
        scsi: qla2xxx: Configure local loop for N2N target
        scsi: qla2xxx: Fix PLOGI payload and ELS IOCB dump length
        scsi: qla2xxx: Don't call qlt_async_event twice
        scsi: qla2xxx: Allow PLOGI in target mode
        scsi: qla2xxx: Change discovery state before PLOGI
        scsi: qla2xxx: Drop superfluous INIT_WORK of del_work
        scsi: qla2xxx: Initialize free_work before flushing it
        scsi: qla2xxx: Use explicit LOGO in target mode
        scsi: qla2xxx: Ignore NULL pointer in tcm_qla2xxx_free_mcmd
        ...
      07c4b9e9