1. 17 Mar, 2020 2 commits
    • Laurentiu Tudor's avatar
      powerpc/fsl_booke: Avoid creating duplicate tlb1 entry · aa411334
      Laurentiu Tudor authored
      In the current implementation, the call to loadcam_multi() is wrapped
      between switch_to_as1() and restore_to_as0() calls so, when it tries
      to create its own temporary AS=1 TLB1 entry, it ends up duplicating
      the existing one created by switch_to_as1(). Add a check to skip
      creating the temporary entry if already running in AS=1.
      
      Fixes: d9e1831a ("powerpc/85xx: Load all early TLB entries at once")
      Cc: stable@vger.kernel.org # v4.4+
      Signed-off-by: default avatarLaurentiu Tudor <laurentiu.tudor@nxp.com>
      Acked-by: default avatarScott Wood <oss@buserror.net>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      Link: https://lore.kernel.org/r/20200123111914.2565-1-laurentiu.tudor@nxp.com
      aa411334
    • Stephen Rothwell's avatar
      tty: evh_bytechan: Fix out of bounds accesses · 3670664b
      Stephen Rothwell authored
      ev_byte_channel_send() assumes that its third argument is a 16 byte
      array. Some places where it is called it may not be (or we can't
      easily tell if it is). Newer compilers have started producing warnings
      about this, so make sure we actually pass a 16 byte array.
      
      There may be more elegant solutions to this, but the driver is quite
      old and hasn't been updated in many years.
      
      The warnings (from a powerpc allyesconfig build) are:
      
        In file included from include/linux/byteorder/big_endian.h:5,
                         from arch/powerpc/include/uapi/asm/byteorder.h:14,
                         from include/asm-generic/bitops/le.h:6,
                         from arch/powerpc/include/asm/bitops.h:250,
                         from include/linux/bitops.h:29,
                         from include/linux/kernel.h:12,
                         from include/asm-generic/bug.h:19,
                         from arch/powerpc/include/asm/bug.h:109,
                         from include/linux/bug.h:5,
                         from include/linux/mmdebug.h:5,
                         from include/linux/gfp.h:5,
                         from include/linux/slab.h:15,
                         from drivers/tty/ehv_bytechan.c:24:
        drivers/tty/ehv_bytechan.c: In function ‘ehv_bc_udbg_putc’:
        arch/powerpc/include/asm/epapr_hcalls.h:298:20: warning: array subscript 1 is outside array bounds of ‘const char[1]’ [-Warray-bounds]
          298 |  r6 = be32_to_cpu(p[1]);
        include/uapi/linux/byteorder/big_endian.h:40:51: note: in definition of macro ‘__be32_to_cpu’
           40 | #define __be32_to_cpu(x) ((__force __u32)(__be32)(x))
              |                                                   ^
        arch/powerpc/include/asm/epapr_hcalls.h:298:7: note: in expansion of macro ‘be32_to_cpu’
          298 |  r6 = be32_to_cpu(p[1]);
              |       ^~~~~~~~~~~
        drivers/tty/ehv_bytechan.c:166:13: note: while referencing ‘data’
          166 | static void ehv_bc_udbg_putc(char c)
              |             ^~~~~~~~~~~~~~~~
      
      Fixes: dcd83aaf ("tty/powerpc: introduce the ePAPR embedded hypervisor byte channel driver")
      Signed-off-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
      Tested-by: default avatarLaurentiu Tudor <laurentiu.tudor@nxp.com>
      [mpe: Trim warnings from change log]
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      Link: https://lore.kernel.org/r/20200109183912.5fcb52aa@canb.auug.org.au
      3670664b
  2. 13 Mar, 2020 4 commits
  3. 10 Mar, 2020 1 commit
  4. 05 Mar, 2020 1 commit
    • Michael Ellerman's avatar
      powerpc/mm: Fix missing KUAP disable in flush_coherent_icache() · 59bee45b
      Michael Ellerman authored
      Stefan reported a strange kernel fault which turned out to be due to a
      missing KUAP disable in flush_coherent_icache() called from
      flush_icache_range().
      
      The fault looks like:
      
        Kernel attempted to access user page (7fffc30d9c00) - exploit attempt? (uid: 1009)
        BUG: Unable to handle kernel data access on read at 0x7fffc30d9c00
        Faulting instruction address: 0xc00000000007232c
        Oops: Kernel access of bad area, sig: 11 [#1]
        LE PAGE_SIZE=64K MMU=Radix SMP NR_CPUS=2048 NUMA PowerNV
        CPU: 35 PID: 5886 Comm: sigtramp Not tainted 5.6.0-rc2-gcc-8.2.0-00003-gfc37a163 #79
        NIP:  c00000000007232c LR: c00000000003b7fc CTR: 0000000000000000
        REGS: c000001e11093940 TRAP: 0300   Not tainted  (5.6.0-rc2-gcc-8.2.0-00003-gfc37a163)
        MSR:  900000000280b033 <SF,HV,VEC,VSX,EE,FP,ME,IR,DR,RI,LE>  CR: 28000884  XER: 00000000
        CFAR: c0000000000722fc DAR: 00007fffc30d9c00 DSISR: 08000000 IRQMASK: 0
        GPR00: c00000000003b7fc c000001e11093bd0 c0000000023ac200 00007fffc30d9c00
        GPR04: 00007fffc30d9c18 0000000000000000 c000001e11093bd4 0000000000000000
        GPR08: 0000000000000000 0000000000000001 0000000000000000 c000001e1104ed80
        GPR12: 0000000000000000 c000001fff6ab380 c0000000016be2d0 4000000000000000
        GPR16: c000000000000000 bfffffffffffffff 0000000000000000 0000000000000000
        GPR20: 00007fffc30d9c00 00007fffc30d8f58 00007fffc30d9c18 00007fffc30d9c20
        GPR24: 00007fffc30d9c18 0000000000000000 c000001e11093d90 c000001e1104ed80
        GPR28: c000001e11093e90 0000000000000000 c0000000023d9d18 00007fffc30d9c00
        NIP flush_icache_range+0x5c/0x80
        LR  handle_rt_signal64+0x95c/0xc2c
        Call Trace:
          0xc000001e11093d90 (unreliable)
          handle_rt_signal64+0x93c/0xc2c
          do_notify_resume+0x310/0x430
          ret_from_except_lite+0x70/0x74
        Instruction dump:
        409e002c 7c0802a6 3c62ff31 3863f6a0 f8010080 48195fed 60000000 48fe4c8d
        60000000 e8010080 7c0803a6 7c0004ac <7c00ffac> 7c0004ac 4c00012c 38210070
      
      This path through handle_rt_signal64() to setup_trampoline() and
      flush_icache_range() is only triggered by 64-bit processes that have
      unmapped their VDSO, which is rare.
      
      flush_icache_range() takes a range of addresses to flush. In
      flush_coherent_icache() we implement an optimisation for CPUs where we
      know we don't actually have to flush the whole range, we just need to
      do a single icbi.
      
      However we still execute the icbi on the user address of the start of
      the range we're flushing. On CPUs that also implement KUAP (Power9)
      that leads to the spurious fault above.
      
      We should be able to pass any address, including a kernel address, to
      the icbi on these CPUs, which would avoid any interaction with KUAP.
      But I don't want to make that change in a bug fix, just in case it
      surfaces some strange behaviour on some CPU.
      
      So for now just disable KUAP around the icbi. Note the icbi is treated
      as a load, so we allow read access, not write as you'd expect.
      
      Fixes: 890274c2 ("powerpc/64s: Implement KUAP for Radix MMU")
      Cc: stable@vger.kernel.org # v5.2+
      Reported-by: default avatarStefan Berger <stefanb@linux.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      Link: https://lore.kernel.org/r/20200303235708.26004-1-mpe@ellerman.id.au
      59bee45b
  5. 04 Mar, 2020 26 commits
  6. 27 Feb, 2020 1 commit
  7. 25 Feb, 2020 3 commits
  8. 24 Feb, 2020 2 commits