- 15 Aug, 2023 7 commits
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Rasmus Villemoes authored
The isl12022 has a dual-purpose irq/f_out pin, which can either be used as an interrupt or clock output. Signed-off-by:
Rasmus Villemoes <linux@rasmusvillemoes.dk> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230615105826.411953-8-linux@rasmusvillemoes.dkSigned-off-by:
Alexandre Belloni <alexandre.belloni@bootlin.com>
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Rasmus Villemoes authored
Since the meaning of the SR_LBAT85 and SR_LBAT75 bits are different in battery backup mode, they may very well be set after power on, and stay set for up to a minute (i.e. until the battery detection in VDD mode happens when the seconds counter hits 59). This would mean that userspace doing a ioctl(RTC_VL_READ) early on could get a false positive. The battery level detection can also be triggered by explicitly writing a 1 to the TSE bit in the BETA register. Do that once during boot. Empirically, this does not immediately update the bits in the status register (i.e., an immediate read of SR after this write can still show stale values), but the update is done after a few milliseconds, so certainly before the RTC device gets registered and userspace has a chance of doing the ioctl() on this device. Signed-off-by:
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Rasmus Villemoes authored
Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 bits. Translate the former to "battery low", and the latter to "battery empty or not-present". Signed-off-by:
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Rasmus Villemoes authored
Implement support for using the values given in the isil,battery-trip-levels-microvolt property to set appropriate values in the VB85TP/VB75TP bits in the PWR_VBAT register. Signed-off-by:
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Rasmus Villemoes authored
The isl12022 has a built-in support for monitoring the voltage of the backup battery, and setting bits in the status register when that voltage drops below two predetermined levels (usually 85% and 75% of the nominal voltage). However, since it can operate at wide range of battery voltages (2.5V - 5.5V), one must configure those trip levels according to which battery is used on a given board. Add bindings for defining these two trip levels. While the register and bit names suggest that they should correspond to 85% and 75% of the nominal battery voltage, the data sheet also says There are total of 7 levels that could be selected for the first alarm. Any of the of levels could be selected as the first alarm with no reference as to nominal Battery voltage level. Hence this provides the hardware designer the ability to choose values based on the discharge characteristics of the battery chosen for the given product, rather than just having one battery-microvolt property and having the driver choose levels close to 0.85/0.75 times that. Signed-off-by:
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Rasmus Villemoes authored
Move the isil,isl12022 RTC bindings from trivial-rtc.yaml into its own intersil,isl12022.yaml file, in preparation for adding more bindings. Reviewed-by:
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Rasmus Villemoes authored
There are multiple problems with this warning. First of all, it triggers way too often, in fact nearly on every boot, because the SR_LBAT85/SR_LBAT75 bits have another meaning when in battery backup mode. Quoting from the data sheet: LOW BATTERY INDICATOR 85% BIT (LBAT85) In Normal Mode (VDD), this bit indicates when the battery level has dropped below the pre-selected trip levels. [...] The LBAT85 detection happens automatically once every minute when seconds register reaches 59. In Battery Mode (VBAT), this bit indicates the device has entered into battery mode by polling once every 10 minutes. The LBAT85 detection happens automatically once when the minute register reaches x9h or x0h minutes. Similar wording applies to the LBAT75 bit. This means that if the device is powered off for more than 10 minutes, the LBAT85 bit is guaranteed to be set. Upon power-on, unless we're close enough to the end of a minute and/or the boot is slow enough that the second register passes 59, the LBAT85 bit is still set when the kernel (or early userspace) reads the RTC to set the system's wallclock time. Another minor problem is with the bit logic. If the 75% level is reached, logically we're also below 85%, so both bits would most likely be set. So even if the battery is below 75%, the warning would still say "voltage dropped below 85%". A third problem is that the driver and current DT binding offer no way to indicate the nominal battery level and/or settings of the Battery Level Monitor Trip Bits. Since the default value of the VB85TP[2:0] and VB75TP[2:0] bits are 000, this means the actual setting of the LBAT85/LBAT75 bits in VDD mode doesn't happen until the battery is below 2.125V/1.875V, which for a standard 3V battery is way too late. A fourth problem is emitting this warning from ->read_time: util-linux' hwclock will, in the absence of support for getting an interrupt when the seconds counter is updated, issue ioctl(RTC_RD_TIME) in a busy-loop until it sees a change in the seconds field. In that case, if the battery low bits are set (either genuinely, more than a minute after boot, due to the battery actually being low, or as above, bogusly shortly after boot), the kernel log is swamped with hundreds of identical warnings. Subsequent patches will add such bindings and driver support, and also proper support for RTC_VL_READ. For now, remove the broken warning. Signed-off-by:
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- 10 Aug, 2023 3 commits
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Zhu Wang authored
Signed-off-by:
Zhu Wang <wangzhu9@huawei.com> Link: https://lore.kernel.org/r/20230808115213.154377-2-wangzhu9@huawei.com Link: https://lore.kernel.org/r/20230808115213.154377-3-wangzhu9@huawei.com Link: https://lore.kernel.org/r/20230808115213.154377-4-wangzhu9@huawei.com Link: https://lore.kernel.org/r/20230808115213.154377-5-wangzhu9@huawei.com Link: https://lore.kernel.org/r/20230808115213.154377-6-wangzhu9@huawei.comSigned-off-by:
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Chen Jiahao authored
Referring to platform_get_irq()'s definition, the return value has already been checked if ret < 0, and printed via dev_err_probe(). Calling dev_err_probe() one more time outside platform_get_irq() is obviously redundant. Removing dev_err_probe() outside platform_get_irq() to clean up above problem. Signed-off-by:
Chen Jiahao <chenjiahao16@huawei.com> Link: https://lore.kernel.org/r/20230802093650.976352-1-chenjiahao16@huawei.comSigned-off-by:
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Arnd Bergmann authored
After a previous commit changed the driver over to SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(), the suspend/resume functions must no longer be hidden behind an #ifdef: In file included from include/linux/clk.h:13, from drivers/rtc/rtc-stm32.c:8: drivers/rtc/rtc-stm32.c:927:39: error: 'stm32_rtc_suspend' undeclared here (not in a function); did you mean 'stm32_rtc_probe'? 927 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stm32_rtc_suspend, stm32_rtc_resume) | ^~~~~~~~~~~~~~~~~ include/linux/kernel.h:58:44: note: in definition of macro 'PTR_IF' 58 | #define PTR_IF(cond, ptr) ((cond) ? (ptr) : NULL) | ^~~ include/linux/pm.h:329:26: note: in expansion of macro 'pm_sleep_ptr' 329 | .suspend_noirq = pm_sleep_ptr(suspend_fn), \ | ^~~~~~~~~~~~ Fixes: fb9a7e53 ("rtc: stm32: change PM callbacks to "_noirq()"") Signed-off-by:Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230801105932.3738430-1-arnd@kernel.orgSigned-off-by:
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- 27 Jul, 2023 30 commits
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Uwe Kleine-König authored
The driver was introduced when .probe_new was the right probe callback to use for i2c drivers. Today .probe is the right one (again) and the driver was already switched in commit 31b0cecb ("rtc: Switch i2c drivers back to use .probe()") but the name continued to include "_new" in its name. To prevent code readers wondering about what might be new here, drop that irritating part of the name. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230725070429.383070-1-u.kleine-koenig@pengutronix.deSigned-off-by:
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Rob Herring authored
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230724205456.767430-1-robh@kernel.orgSigned-off-by:
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Andrej Picej authored
Property "trickle-resistor-ohms" allows us to set trickle charger resistor. However there is no possibility to disable it afterwards. Add support for "aux-voltage-chargeable" property which can be used to enable/disable the trickle charger circuit explicitly. The default behavior of the code is kept as it is! Additionally, lets make sure we only update internal EEPROM in case of a change. This prevents wear due to excessive EEPROM writes on each probe. Signed-off-by:
Andrej Picej <andrej.picej@norik.com> Link: https://lore.kernel.org/r/20230623081533.76334-1-andrej.picej@norik.comSigned-off-by:
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Arnd Bergmann authored
The added HAS_IOPORT dependency might not actually be necessary as Geert points out, but the driver is also only used on one architecture. Sparc is also a special case here since it converts port numbers into virtual addresses rather than having them mapped into a particular part of the __iomem address space, so the difference is actually not important here. Add a dependency on sparc, but allow compile-testing otherwise, to make this clearer without anyone having to spend much time modernizing the driver beyond that. Reported-by:
Geert Uytterhoeven <geert+renesas@glider.be> Cc: David S. Miller <davem@davemloft.net> Link: https://lore.kernel.org/all/CAMuHMdWEx0F=fNei4Bz_JPkuvoaN-+zk08h0i8KnSi_VjO615g@mail.gmail.com/Signed-off-by:
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Biju Das authored
Drop enum pcf85063_type and split the array pcf85063_cfg[] as individual variables, and make lines shorter by referring to e.g. &pcf85063_cfg instead of &pcf85063_cfg[PCF85063]. Suggested-by:
Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20230717124059.196244-3-biju.das.jz@bp.renesas.comSigned-off-by:
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Biju Das authored
The pcf85063_ids[].driver_data could store a pointer to the config, like for DT-based matching, making I2C and DT-based matching more similar. After that, we can simplify the probe() by replacing of_device_get_ match_data() and i2c_match_id() by i2c_get_match_data() as we have similar I2C and DT-based matching table. Signed-off-by:
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Biju Das authored
Simplify the probe() by replacing of_device_get_match_data() and i2c_match_id() by i2c_get_match_data() as we have similar I2C and DT-based matching table. Signed-off-by:
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Valentin Caron authored
Fix a few style issues reported by checkpatch.pl: - Unnecessary parentheses - Lines should not end with a '(' Signed-off-by: -
Valentin Caron authored
stm32_rtc_valid_alrm function has some issues : - arithmetical operations are impossible on BCD values - "cur_mon + 1" can overflow - the use case with the next month, the same day/hour/minutes went wrong To solve that, we prefer to use timestamp comparison. e.g. : On 5 Dec. 2021, the alarm limit is 5 Jan. 2022 (+31 days) On 31 Jan 2021, the alarm limit is 28 Feb. 2022 (+28 days) Signed-off-by: -
Gabriel Fernandez authored
The RTC driver stops the RTCAPB clock during suspend, but the irq handler from RTC is called before starting clock. Then we are blocked while accessing RTC registers. We changes PM callbacks to '_no_irq()' to disable irq during resume callback and so irq handler will be called after the enable of RTCAPB clock. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by:
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Valentin Caron authored
Change stm32-rtc driver to not generate an error message when device probe operation is deferred for a clock. Signed-off-by:
Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by:
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Christophe Guibout authored
The rtc is used to update the stgen counter on wake up from low power modes, so it needs to be as much accurate as possible. The maximization of asynchronous divider leads to a 4ms rtc precision clock. By decreasing pred_a to 0, it will have pred_s=32767 (when need_accuracy is true), so stgen clock becomes more accurate with 30us precision. Nevertheless this will leads to an increase of power consumption. Signed-off-by:
Christophe Guibout <christophe.guibout@foss.st.com> Signed-off-by:
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Antonio Borneo authored
RTC counters are stopped when INIT bit in ISR register is set and start counting from the (eventual) new value when INIT is reset. In stm32_rtc_init(), called during probe, the INIT bit is set to program the prescaler and the 24h mode. This halts the RTC counter at each probe tentative causing the RTC time to loose from 0.3s to 0.8s at each kernel boot. If the RTC is battery powered, both prescaler value and 24h mode are kept during power cycle and there is no need to program them again. Check if the desired prescaler value and the 24h mode are already programmed, then skip reprogramming them to avoid halting the time counter. Signed-off-by:
Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by:
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Antonio Borneo authored
Date and time are read from two separate RTC registers. To ensure consistency between the two registers, reading the time register locks the values in the shadow date register until the date register is read. Thus, the whole date/time read requires reading the time register first, followed by reading the date register. If the reads are done in reversed order, the shadow date register will remain locked until a future read operation. The future read will read the former date value that could be already invalid. Fix the read order of date/time registers in stm32_rtc_valid_alrm() Signed-off-by:
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Hugo Villeneuve authored
Add support for new NXP RTC PCF2131. Signed-off-by:
Hugo Villeneuve <hvilleneuve@dimonoff.com> Acked-by:
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Hugo Villeneuve authored
The PCF2127/29 do NOT support alarms with a 1 second resolution, but the PCF2131 does. Signed-off-by:
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Hugo Villeneuve authored
The watchdog value register cannot be read on the PCF2131 after being set. Add a new flag to identify which variant has read access to this register, and use this flag to selectively test if watchdog timer was started by bootloader. Signed-off-by:
Bruno Thomsen <bruno.thomsen@gmail.com> Link: https://lore.kernel.org/r/20230622145800.2442116-16-hugo@hugovil.comSigned-off-by:
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Hugo Villeneuve authored
Introduce in the configuration structure two new values to hold the watchdog clock source and the min_hw_heartbeat_ms value. The minimum and maximum timeout values are automatically computed from the watchdog clock source value for each variant. The PCF2131 has no 1Hz watchdog clock source, as is the case for PCF2127/29. The next best choice is using a 1/4Hz clock, giving a watchdog timeout range between 4 and 1016s. By using the same register configuration as for the PCF2127/29, the 1/4Hz clock source is selected. Note: the PCF2127 datasheet gives a min/max range between 1 and 255s, but it should be between 2 and 254s, because the watchdog is triggered when the timer value reaches 1, not 0. Signed-off-by:
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Hugo Villeneuve authored
The sequence for updating the time/date registers is slightly different between PCF2127/29 and PCF2131. For PCF2127/29, during write operations, the time counting circuits (memory locations 03h through 09h) are automatically blocked. For PCF2131, time/date registers write access requires setting the STOP bit and sending the clear prescaler instruction (CPR). STOP then needs to be released once write operation is completed. Signed-off-by:
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Hugo Villeneuve authored
The PCF2127 and PCF2129 have one output interrupt pin. The PCF2131 has two, named INT_A and INT_B. The hardware support that any interrupt source can be routed to either one or both of them. Force all interrupt sources to go to the INT A pin. Support to route any interrupt source to INT A/B pins is not supported by this driver at the moment. Signed-off-by:
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Hugo Villeneuve authored
This RTC is very similar in functionality to the PCF2127/29. Basically it: -supports two new control registers at offsets 4 and 5 -supports a new reset register (not implemented in this driver) -supports 4 tamper detection functions instead of 1 -has no nvmem (like the PCF2129) -has two output interrupt pins Because of that, most of the register addresses are very different, although they still follow the same layout. For example, the tamper registers have a different base address, but the offsets are all the same. Signed-off-by:
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Hugo Villeneuve authored
This will simplify the implementation of new variants into this driver. Signed-off-by:
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Hugo Villeneuve authored
This will simplify the implementation of new variants into this driver. Signed-off-by:
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Hugo Villeneuve authored
This will simplify the implementation of new variants into this driver. Signed-off-by:
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Hugo Villeneuve authored
This will simplify the implementation of new variants into this driver. Signed-off-by:
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Hugo Villeneuve authored
This will simplify the implementation of new variants into this driver. Some variants (PCF2131) have a 100th seconds register. This register is currently not supported in this driver. Signed-off-by:
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Hugo Villeneuve authored
Create variant-specific configuration structures to simplify the implementation of new variants into this driver. It will also avoid to have too many tests for a specific variant, or a list of variants for new devices, inside the code itself. Add configuration options for the support of the NVMEM, bit CD0 in register WD_CTL as well as the maximum number of registers for each variant, instead of hardcoding the variant (PCF2127) inside the i2c_device_id and spi_device_id structures. Also specify a different maximum number of registers (max_register) for the PCF2129. Signed-off-by:
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Hugo Villeneuve authored
Noted while reviewing new PCF2131 driver. Signed-off-by:
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Hugo Villeneuve authored
Noted while reviewing new PCF2131 driver. Signed-off-by:
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Hugo Villeneuve authored
Reading the 7 timetamp registers currently involves reading 25 registers solely to be able to print the content of the three control registers, in addition to the 7 timestamp registers. This print never occurs, unless the user enables dynamic debug in this driver or set CONFIG_RTC_DEBUG. Reading the timestamp registers should consist of reading 7 consecutive timestamp registers. This patch optimize the performance of reading the timestamp registers by reading 7 consecutive registers instead of 25, and dropping the print of the control registers. Signed-off-by:
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