1. 30 May, 2018 6 commits
    • Al Viro's avatar
      aio: fix io_destroy(2) vs. lookup_ioctx() race · b14cfa26
      Al Viro authored
      commit baf10564 upstream.
      
      kill_ioctx() used to have an explicit RCU delay between removing the
      reference from ->ioctx_table and percpu_ref_kill() dropping the refcount.
      At some point that delay had been removed, on the theory that
      percpu_ref_kill() itself contained an RCU delay.  Unfortunately, that was
      the wrong kind of RCU delay and it didn't care about rcu_read_lock() used
      by lookup_ioctx().  As the result, we could get ctx freed right under
      lookup_ioctx().  Tejun has fixed that in a6d7cff4 ("fs/aio: Add explicit
      RCU grace period when freeing kioctx"); however, that fix is not enough.
      
      Suppose io_destroy() from one thread races with e.g. io_setup() from another;
      CPU1 removes the reference from current->mm->ioctx_table[...] just as CPU2
      has picked it (under rcu_read_lock()).  Then CPU1 proceeds to drop the
      refcount, getting it to 0 and triggering a call of free_ioctx_users(),
      which proceeds to drop the secondary refcount and once that reaches zero
      calls free_ioctx_reqs().  That does
              INIT_RCU_WORK(&ctx->free_rwork, free_ioctx);
              queue_rcu_work(system_wq, &ctx->free_rwork);
      and schedules freeing the whole thing after RCU delay.
      
      In the meanwhile CPU2 has gotten around to percpu_ref_get(), bumping the
      refcount from 0 to 1 and returned the reference to io_setup().
      
      Tejun's fix (that queue_rcu_work() in there) guarantees that ctx won't get
      freed until after percpu_ref_get().  Sure, we'd increment the counter before
      ctx can be freed.  Now we are out of rcu_read_lock() and there's nothing to
      stop freeing of the whole thing.  Unfortunately, CPU2 assumes that since it
      has grabbed the reference, ctx is *NOT* going away until it gets around to
      dropping that reference.
      
      The fix is obvious - use percpu_ref_tryget_live() and treat failure as miss.
      It's not costlier than what we currently do in normal case, it's safe to
      call since freeing *is* delayed and it closes the race window - either
      lookup_ioctx() comes before percpu_ref_kill() (in which case ctx->users
      won't reach 0 until the caller of lookup_ioctx() drops it) or lookup_ioctx()
      fails, ctx->users is unaffected and caller of lookup_ioctx() doesn't see
      the object in question at all.
      
      Cc: stable@kernel.org
      Fixes: a6d7cff4 "fs/aio: Add explicit RCU grace period when freeing kioctx"
      Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b14cfa26
    • Al Viro's avatar
      affs_lookup(): close a race with affs_remove_link() · 5aba1dc0
      Al Viro authored
      commit 30da870c upstream.
      
      we unlock the directory hash too early - if we are looking at secondary
      link and primary (in another directory) gets removed just as we unlock,
      we could have the old primary moved in place of the secondary, leaving
      us to look into freed entry (and leaving our dentry with ->d_fsdata
      pointing to a freed entry).
      
      Cc: stable@vger.kernel.org # 2.4.4+
      Acked-by: default avatarDavid Sterba <dsterba@suse.com>
      Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5aba1dc0
    • Colin Ian King's avatar
      KVM: Fix spelling mistake: "cop_unsuable" -> "cop_unusable" · 211922cf
      Colin Ian King authored
      commit ba3696e9 upstream.
      
      Trivial fix to spelling mistake in debugfs_entries text.
      
      Fixes: 669e846e ("KVM/MIPS32: MIPS arch specific APIs for KVM")
      Signed-off-by: default avatarColin Ian King <colin.king@canonical.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kernel-janitors@vger.kernel.org
      Cc: <stable@vger.kernel.org> # 3.10+
      Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      211922cf
    • Maciej W. Rozycki's avatar
      MIPS: Fix ptrace(2) PTRACE_PEEKUSR and PTRACE_POKEUSR accesses to o32 FGRs · 0ed5a213
      Maciej W. Rozycki authored
      commit 9a3a92cc upstream.
      
      Check the TIF_32BIT_FPREGS task setting of the tracee rather than the
      tracer in determining the layout of floating-point general registers in
      the floating-point context, correcting access to odd-numbered registers
      for o32 tracees where the setting disagrees between the two processes.
      
      Fixes: 597ce172 ("MIPS: Support for 64-bit FP with O32 binaries")
      Signed-off-by: default avatarMaciej W. Rozycki <macro@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 3.14+
      Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      0ed5a213
    • Maciej W. Rozycki's avatar
      MIPS: ptrace: Expose FIR register through FP regset · b1e0cf61
      Maciej W. Rozycki authored
      commit 71e909c0 upstream.
      
      Correct commit 7aeb753b ("MIPS: Implement task_user_regset_view.")
      and expose the FIR register using the unused 4 bytes at the end of the
      NT_PRFPREG regset.  Without that register included clients cannot use
      the PTRACE_GETREGSET request to retrieve the complete FPU register set
      and have to resort to one of the older interfaces, either PTRACE_PEEKUSR
      or PTRACE_GETFPREGS, to retrieve the missing piece of data.  Also the
      register is irreversibly missing from core dumps.
      
      This register is architecturally hardwired and read-only so the write
      path does not matter.  Ignore data supplied on writes then.
      
      Fixes: 7aeb753b ("MIPS: Implement task_user_regset_view.")
      Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      Signed-off-by: default avatarMaciej W. Rozycki <macro@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 3.13+
      Patchwork: https://patchwork.linux-mips.org/patch/19273/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b1e0cf61
    • NeilBrown's avatar
      MIPS: c-r4k: Fix data corruption related to cache coherence · aa9a00ef
      NeilBrown authored
      commit 55a2aa08 upstream.
      
      When DMA will be performed to a MIPS32 1004K CPS, the L1-cache for the
      range needs to be flushed and invalidated first.
      The code currently takes one of two approaches.
      1/ If the range is less than the size of the dcache, then HIT type
         requests flush/invalidate cache lines for the particular addresses.
         HIT-type requests a globalised by the CPS so this is safe on SMP.
      
      2/ If the range is larger than the size of dcache, then INDEX type
         requests flush/invalidate the whole cache. INDEX type requests affect
         the local cache only. CPS does not propagate them in any way. So this
         invalidation is not safe on SMP CPS systems.
      
      Data corruption due to '2' can quite easily be demonstrated by
      repeatedly "echo 3 > /proc/sys/vm/drop_caches" and then sha1sum a file
      that is several times the size of available memory. Dropping caches
      means that large contiguous extents (large than dcache) are more likely.
      
      This was not a problem before Linux-4.8 because option 2 was never used
      if CONFIG_MIPS_CPS was defined. The commit which removed that apparently
      didn't appreciate the full consequence of the change.
      
      We could, in theory, globalize the INDEX based flush by sending an IPI
      to other cores. These cache invalidation routines can be called with
      interrupts disabled and synchronous IPI require interrupts to be
      enabled. Asynchronous IPI may not trigger writeback soon enough. So we
      cannot use IPI in practice.
      
      We can already test if IPI would be needed for an INDEX operation with
      r4k_op_needs_ipi(R4K_INDEX). If this is true then we mustn't try the
      INDEX approach as we cannot use IPI. If this is false (e.g. when there
      is only one core and hence one L1 cache) then it is safe to use the
      INDEX approach without IPI.
      
      This patch avoids options 2 if r4k_op_needs_ipi(R4K_INDEX), and so
      eliminates the corruption.
      
      Fixes: c00ab489 ("MIPS: Remove cpu_has_safe_index_cacheops")
      Signed-off-by: default avatarNeilBrown <neil@brown.name>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 4.8+
      Patchwork: https://patchwork.linux-mips.org/patch/19259/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      aa9a00ef
  2. 25 May, 2018 34 commits